Re: [myhdl-list] Floating Point Libraries

[Jan C. <jan...@mu...>]

On 15/04/11 08:56, Jan Decaluwe wrote:
    . . .
> My workaround proposal was intended for those who want to
> get started today, including conversion support.
> To be honest, usage can hardly be worse than using
> ip libraries such as altera. Thinking futher about it,
> I'm not even sure the altera ip is about efficiency -
> it may just be about obfuscation and vendor lock-in.

The Altera libraries are 32/64 bit, with options on both for 7/15 
cycle latencies, new result every clock cycle(?) - see:
   http://www.altera.com/literature/ug/ug_altfp_mfug.pdf

> In other words, if floating point ip is hot, there
> may be an opportunity here for someone who would like
> to develop a technology-independent MyHDL libary.

Is there any interest in 'digit-serial' techniques. These are 5-50 
times slower by design, but use a much narrower connecting buss. 
The performance loss may be recouped if the design can be 
paralelised sufficiently, and may result in reduction of chip area 
used overall.

Jan Coombs