Re: [myhdl-list] FW: Floating-point support
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From: Jan C. <jan...@mu...> - 2011-02-22 20:55:38
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On 20/03/08 22:12, Blubaugh, David A. wrote: . . . > I was wondering that floating-point algorithms, like the FFT, could be > eventually supported by MyHDL, with a direct conversion of > floating-point python to VHDL or verilog? I believe one way to handle > this would be to develop a module which handles the floating-point > procedure for addition, subtraction, multiplication, and division, which > has been defined by IEEE and then import this module to handle the > computational tasks within MyHDL. Is that possible? I definitely hope > so!!!! > > Also, is there a method to automatically generate pipeline architectures > with MyHDL? Thanks for all of the help and answers!!!! Hi David & Jan, I've just been trawling the archives to try to get up to speed, and saw this post. It interests me greatly, as I have practical implementations in mind. Is it still of current interest to you or anyone else? Jan Coombs -- (there should be no kisses in my mail address) |