Re: [myhdl-list] Converting std_logic_vector to signed and vice versa
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jandecaluwe
From: Kevin S. <sta...@gm...> - 2011-01-10 18:58:38
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>signed is not a subtype of std_logic_vector. However, type >conversions between the two are trivial because they are >closely related, meaning that you can cast using the >target type name as a conversion function. Ah yes, but both are types made up of arrays of std_logic. On Mon, Jan 10, 2011 at 2:19 AM, Jan Decaluwe <ja...@ja...> wrote: > Kevin Stanton wrote: > > The signed type is a subtype of std_logic_vector (see the > > ieee.numeric_std package). Assuming you can used a signed binary word > > throughout, there should be no need to convert to std_logic_vector, > > unless you need to do arithmetic elsewhere that is unsigned and you wish > > to convert it to unsigned format. > > signed is not a subtype of std_logic_vector. However, type > conversions between the two are trivial because they are > closely related, meaning that you can cast using the > target type name as a conversion function. > > > -- > Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com > Python as a HDL: http://www.myhdl.org > VHDL development, the modern way: http://www.sigasi.com > Analog design automation: http://www.mephisto-da.com > World-class digital design: http://www.easics.com > > > ------------------------------------------------------------------------------ > Gaining the trust of online customers is vital for the success of any > company > that requires sensitive data to be transmitted over the Web. Learn how to > best implement a security strategy that keeps consumers' information secure > and instills the confidence they need to proceed with transactions. > http://p.sf.net/sfu/oracle-sfdevnl > _______________________________________________ > myhdl-list mailing list > myh...@li... > https://lists.sourceforge.net/lists/listinfo/myhdl-list > -- Kevin R. Stanton c | 734•846•3915 e | sta...@gm... |