Re: [myhdl-list] Blog post about Verilog

[Jan D. <ja...@ja...>]

Kevin Stanton wrote:
> Excellent writeup.
> 
> I wish someone had written such a clear explanation back when I was 
> using Verilog for my college design project. We were so confused by that.

Nice to hear, especially from an American ;-)

After 20 years in this business, I find it astonishing
that my view on HDL design is only shared by a small minority.
Moreover, I don't know *any* Verilog-only guru that shares
them - and I blame the confusing aspects of the language for this.
The problem is - I think I'm right :-) This blog is an
opportunity to explain my thinking as clearly as possible.
A (hopefully) intermediate testament, so to speak.

Much more to come!

Jan


-- 
Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
    Python as a HDL: http://www.myhdl.org
    VHDL development, the modern way: http://www.sigasi.com
    Analog design automation: http://www.mephisto-da.com
    World-class digital design: http://www.easics.com