[myhdl-list] Interesting

[Christopher F. <chr...@gm...>]

Synopsys released a white paper on "coding guidelines for datapath
synthesis<http://techonline.com/learning/techpaper/193102987>".
 The paper is about using signed attribute for VHDL and Verilog.  States
that the QoR is better when signed is used versus handling signed manually
(I quickly perused the article might be more assertions).

This indirectly supports what Jan has already mentioned and discussed here
and in the "These Ints are made for
Counting"<http://www.jandecaluwe.com/hdldesign/counting.html>essay.

Thought I would share with the MyHDL community.

.chris