Re: [myhdl-list] new example for MyHDL, transciver diagram is coming

[Jose C. <jc...@gm...>]

On Tue, May 19, 2009 at 9:26 PM, Xiang Li <u46...@an...> wrote:

> Hi,
>
> This time I add a rough structure diagram of transceiver of UART program
> for your reference. Hopefully, it will help you to understand the code of
> UART transceiver.
>
> ----- Original Message -----
> From: Xiang Li <u46...@an...>
> Date: Monday, May 18, 2009 10:57 pm
> Subject: [myhdl-list] new example for MyHDL
> To: myh...@li...
>
> > Hello all, I am a new user of MyHDL project. MyHDL is really a good
> project, which is ideal for software guys who are familiar with python and
> trying to do hardware development . I just wrote a miniuart project using
> MyHDL(rewrote from the source code downloaded from opencore website), for
> those novices who just come to the hardware world, it is a very good example
> for you. But if you are the experienced guys, then it might  not be useful
> to you. This time I first attach one part of it, the receiver part source
> code and the generated verilog file, the others and document will be
> submitted in the next few days.   >
> -----------------------------------------------------------------
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> ------------------------------------------------------------------------------
> Crystal Reports - New Free Runtime and 30 Day Trial
> Check out the new simplified licensing option that enables
> unlimited royalty-free distribution of the report engine
> for externally facing server and web deployment.
> http://p.sf.net/sfu/businessobjects
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>
Nice diagram and it does help a lot more. Just curious, what software you
use to generate those graphics? I've been trying to find a good free tool
that does that, I've tried Dia but I don't like it very much.

Thanks!