Re: [myhdl-list] new example for MyHDL, transciver diagram is coming
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Re: [myhdl-list] new example for MyHDL, transciver diagram is coming
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From: Xiang Li <u46...@an...> - 2009-05-20 01:26:32
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Hi, <br><br>This time I add a rough structure diagram of transceiver of UART program for your reference. Hopefully, it will help you to understand the code of UART transceiver. <br><br>----- Original Message -----<br>From: Xiang Li <u46...@an...><br>Date: Monday, May 18, 2009 10:57 pm<br>Subject: [myhdl-list] new example for MyHDL<br>To: myh...@li...<br><br><font style="font-style: normal; font-weight: normal; background-color: rgb(245, 248, 240); font-size: 14px;">> </font>Hello all, I am a new user of MyHDL project. MyHDL is really a good project, which is ideal for software guys who are familiar with python and trying to do hardware development . I just wrote a miniuart project using MyHDL(rewrote from the source code downloaded from opencore website), for those novices who just come to the hardware world, it is a very good example for you. But if you are the experienced guys, then it might not be useful to you. This time I first attach one part of it, the receiver part source code and the generated verilog file, the others and document will be submitted in the next few days. > -----------------------------------------------------------------<br>> -------------<br>> Crystal Reports - New Free Runtime and 30 Day Trial<br>> Check out the new simplified licensing option that enables <br>> unlimited royalty-free distribution of the report engine <br>> for externally facing server and web deployment. <br>> http://p.sf.net/sfu/businessobjects> _______________________________________________<br>> myhdl-list mailing list<br>> myh...@li...<br>> https://lists.sourceforge.net/lists/listinfo/myhdl-list |
