Re: [myhdl-list] essay about integer arithmetic

[Neal B. <ndb...@gm...>]

Jan Decaluwe wrote:

> Andrew Lentvorski wrote:
> 
>> However, if we're talking about abstract behavior of numbers, how about
>> some fixed-point support?  One of the nice things about VHDL is the
>> ability to specify negative indicies that align with negative powers of
>> 2.  Verilog doesn't (or at least didn't) provide even this level of
>> support.
>> 
>> Writing, say, a delta-sigma modulator in any HDL language is kind of a
>> pain because we don't have an abstract "fixed point number" that you can
>> assert against.  Adding extra bits at either end to cover different
>> issues (Did it overflow?  I need more integer bits.  Is the error too
>> large?  I need more fractional bits.) is a pain when it interacts with
>> sign bits.
> 

I have written fixed-pt code using c++ boost::python, if anyone's interested.