Re: [myhdl-list] essay about integer arithmetic

[Jan D. <ja...@ja...>]

Neal Becker wrote:
> Jan Decaluwe wrote:
> 
>> This is an essay that I wanted to write for a long time.
>> It describes what I think is wrong with integer arithmetic
>> in VHDL and Verilog, and why MyHDL provides a solution.
>>
>> Before releasing it to the general public, I'm interested
>> to hear what you think about it.
>>
>>     http://www.jandecaluwe.com/hdldesign/counting.html
>>
>>
>>
> 
> If you really want to automate the bit widths, perhaps some kind of interval 
> arithmetic is wanted?

Note that the essay describes an existing implementation,
not something that would want for some future version.

-- 
Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
    Python as a hardware description language:
    http://www.myhdl.org