Re: [myhdl-list] [new] design flow question

[Neal B. <ndb...@gm...>]

Felton Christopher wrote:

>>>
>> I'm still a bit lost.  My question is, suppose, for example,  I want
>> to do a design targetting Xylinx.  Suppose I want to use an FIR
>> filter, using Xylinx FIR core generator.  Would this work with a
>> myhdl frontend, and if so, how would the design flow go?
>>
> 
> What tool do you currently use for your DSP algorithm simulation?
> 
>
You mean high-level simulation?  I use python with a library of my own based on boost::python and boost::ublas.