[myhdl-list] Time for an update

[Jan D. <ja...@ja...>]

Hi all:

I thought it was time for an update :-)

I've been quiet lately, but this doesn't mean that there
was no MyHDL activity from my part, to the contrary.

In the past 3 months I have - for the first time - done
a paid consultancy job based on MyHDL, using both
conversion to Verilog and VHDL as well as unit testing.
The project was the design of the digital part of
an ASIC, so I've been able to put the tool and the
methodology to a real test.

This has gone very well. I've really enjoyed it, and
learned a lot both in MyHDL details and in overall
methodology. This will keep me busy for quite some time!

So chances are you'll hear lot more from me in the
coming days and weeks. Based on this experience, I'll
also announce the availability of commercial support
from my part for MyHDL and MyHDL-related design jobs.

Best regards,

Jan

-- 
Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
Kaboutermansstraat 97, B-3000 Leuven, Belgium
     From Python to silicon:
     http://myhdl.jandecaluwe.com