Re: [myhdl-list] functional verification

[Jacob R. <jac...@gm...>]

Jan,

Thanks for your quick reply. I understand that open source projects
tend to be a labor of love. It is encouraging that there is activity
on the message boards and that you have beta releases coming out.

Regarding Ruby-vpi: I have not tried it but from the documentation I
have read, it appears the signals do not support analog/real ports.
The too have an example of  writing tests before you write any code.
One thing I like about their tool is they generate template files for
all aspects of the behavior verification:

test runner
bench
design
prototype
spec

I am becoming a big fan of templates. It is much easier to get new
people ramped up and to take over tasks veterans are bored with. It is
a little thing that makes ramp up time easy.

Regarding cosimulation: I spent some time looking at the code
differences between the two simulators and I was amazed how similar
the code was. I didn't understand the differences but I assume with
some time, I should be able to do a cosimulation. I also found posts
on the mailing list hinting at success with ncsim.

Finally, the latest version of specman seems to support analog ports.
I am going to look at that to see if it will work.

jr







On 9/25/07, Jan Decaluwe <ja...@ja...> wrote:
> Jacob Rael wrote:
> > Hello all,
> >
> > I ran across myhdl when I first started learning Python and it looked
> > really interesting.
> >
> > I am currently looking at how to do functional verification on our
> > designs. We are a mixed signal group and we deal with analog signals
> > at ports. Many of the HVL tools available assume only digital signals
> > so I am expanding my search beyond specman.
>
> Currently it's the same for MyHDL.
>
> > I like myhdl because it is Python based and I can see an easy path
> > from design verification based on simulation to chip verification
> > based on lab tests all within the same Python environment.
> >
> > I started looking at the Ruby tool, Ruby-vpi. On the surface, it looks
> > like it can do everything I want to do but I have not dived down into
> > the details. Also, I don't want to learn a new language.
>
> Does Ruby-vpi support analog signals then?
>
> > So, I have a few questions:
> >
> > 1. Our main simulator is ncsim. From the little I have read, I would
> > have to write a C-program to allow myhdl to talk via PLI to ncsim. Has
> > this already been written? What about other commercial simulators?
>
> There is support out-of-the box for Icarus and cver. Look in the cosimulation
> dir in the distro and in the manual. As PLI is supposed to be a standard,
> these C modules should work with other simulators - in practice adaptations
> may be necessary.
>
> I know people have used this with commercial simulators in the past
> (also with ncsim I believe).
>
> > 2. Is there any limitation in myhdl (or PLI) that would prevent analog
> > (wreal or electrical) signals from traveling in and out of ports?
>
> It's not supported in the MyHDL cosimulation modules currently.
> I assume there's no restriction in PLI but I haven't considered this.
>
> > 4. How active is the development on myhdl? The main Google links give
> > the impression there isn't much going on. I didn't discover the posts
> > on the newsgroups or the new site until I started digging deeper. I am
> > glad I saw recent posts. At first I thought the project had been
> > stagnant since version 0.5.1.
>
> As for as I'm concerned, thinking goes on continuously but development
> occurs in bursts, driven by time availability and external interest.
>
> On sourceforge, I only release "official" releases, but on the MyHDL
> website, development snaphots can be found.
>
> Jan
>
> --
> Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
> Kaboutermansstraat 97, B-3000 Leuven, Belgium
>      From Python to silicon:
>      http://myhdl.jandecaluwe.com
>
>
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-- 
Jacob Rael
jac...@gm...