Re: [myhdl-list] PhoenixSID 65X81 News page updated

[Jan D. <ja...@ja...>]

George Pantazopoulos wrote:
> This may be of interest. My verilog-wrapping and WISHBONE modules are
> still experimental, but at some point I'd like to share them:
> 
> http://myhdl.jandecaluwe.com/doku.php/projects:phoenixsid_65x81

George:

It's about time to announce all your achievements and the project page
in comp.arch.fpga. I would think there is a large interested
public over there (including FPGA vendors watching carefully.)

Or do you prefer me to do it :-) ?

Jan

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