Re: [myhdl-list] Tristate bus to external SRAM

[George P. <ge...@ga...>]

>
> Hi all,
>
>    I'm gettin' hungry to do some more FPGA stuff again. Could anyone gi=
ve
> me some pointers on how a tristate data bus could be implemented in
> myHDL?
>

     Maybe I should be more clear. I'm looking to create a *bidirectional=
*
bus to an external SRAM chip. I suppose somehow the output driver
needs to get tristated when the the bus is in input mode. I'm not
sure how to bring this about, or if the fpga software tool will infer
this for me, etc.

Any advice would be great!

Thanks

--=20
George Pantazopoulos
http://www.gammaburst.net