[myhdl-list] ListElementNotUnique error
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From: Jens P. A. <je...@if...> - 2006-05-24 13:51:38
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Hi, I hope someone who knows more MyHDL/Python than myself can have a look at this: I keep getting the following error from toVerilog(): List contains Signals that are not unique to it I have a list of signals. The signals are driven inside a module, called like this: signal_list = [Signal(intbv(0)[WIDTH:]) for i in range(NUMBER)] insts = [module_name(signal_list[i]) for i in range(NUMBER)] I want to compare the outputs from all the instances, to select the highest one. So after the previous code, I add the following: @always(clk.negedge) def select_best(): """Compare values and select the best one""" best=0 for nr in range(NR_REGS): if signal_list[nr] > signal_list[best]: # I have also tried .val on them best=nr max.next = best This gives me the ListElementNotUnique error from the toVerilog converter. Is it not supposed to be possible? How should it be done? Thanks, Jens Petter Abrahamsen. |