[myhdl-list] Re: cookbook addition

[Jan D. <ja...@ja...>]

George Pantazopoulos wrote:
> Excellent idea. How about adding the missing automated unit tests that we
> all know and love? :) And yeah, they're important, you were right about
> coming back to a project after a vacation and needing the assurance of
> automated tests :)

There you have it, my own preaching is backfiring :-)

Ok - I maintain the position that unit tests should be written for
every module, even if the test seems trivial. Now, in this case, the
modules themselves are artificially simple and actually trivial - as I
note in the intro, you normally wouldn't describe individual flip-flops.
(Or at least, I wouldn't).

The page is intended to let people make quick comparisons with other
HDLs, using things they know that require no explanation. (I use
the opportunity to demonstrate waveform tracing to let them know
it's there).

For a meaningful unit test, you try to approach the circuit from
some different angle at a (perhaps slightly) higher level. In this
case, I don't think there's anything else one can do than simply
copying the implementation. So I fear that people won't see the
point here, and the message may get lost.

However - I'm working on another page :-) that should clearly
illustrate the whole flow. I'm actually using the Xilinx ISE tutorial
and redoing it the "MyHDL way". It will show unit tests, ROM
inferencing, synthesis and retargeting to various FPGA/CPLD
technologies - so I think this is going to be an interesting page.

Jan

-- 
Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
Losbergenlaan 16, B-3010 Leuven, Belgium
     From Python to silicon:
     http://myhdl.jandecaluwe.com