Re: [myhdl-list] Re: co-simulation: vpi file

[George P. <ge...@ga...>]

Hi Jan,

> - does co-simulation work at all ??? If it does work, the error messages
> you get should come from unittest assertion statements, not from
> the Cosimulation module.  
>
>
> Note that the toVerilog tests (myhdl/test/toVerilog) have plenty of
> unit test modules that use co-simulation. All those tests have been
> run with cver and icarus. (Exception: test_signed fails with Icarus
> because it has bugs with signed arithmetic.)
>
In myhdl0.5a1/myhdl/test/
test_Cosimulation.py and test_all.py both pass all their tests.

However, in myhdl0.5a1/myhdl/test/toVerilog/
running test_always_comb.py (or any of the other ones I've tried) 
resulted in massive amounts of errors.

Below I pasted an excerpt from running test_always_comb.py:

My system configuration is:

Windows XP Professional SP2
cygwin (cygwin dll version 1.5.18)
myHDL 0.5a1
Icarus Verilog 0.8.2 (compiled on cygwin)

HTH,
George

Begin paste
-----------

test1 (__main__.AlwaysCombSimulationTest) ... ERROR
test2 (__main__.AlwaysCombSimulationTest) ... ERROR
test3 (__main__.AlwaysCombSimulationTest) ... ERROR
test4 (__main__.AlwaysCombSimulationTest) ... ERROR
test5 (__main__.AlwaysCombSimulationTest) ... ERROR

======================================================================
ERROR: test1 (__main__.AlwaysCombSimulationTest)
----------------------------------------------------------------------
Traceback (most recent call last):
  File "test_always_comb.py", line 130, in test1
    Simulation(self.bench(design1)).run(quiet=QUIET)
  File "test_always_comb.py", line 103, in bench
    design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v)
  File "test_always_comb.py", line 80, in design_v
    return setupCosimulation(**locals())
  File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in 
setupCosimulationCver
    return Cosimulation(cmd, **kwargs)
  File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line 
84, in __init__
    raise CosimulationError(_error.OSError, str(e))
CosimulationError: OSError: [Errno 2] No such file or directory

======================================================================
ERROR: test2 (__main__.AlwaysCombSimulationTest)
----------------------------------------------------------------------
Traceback (most recent call last):
  File "test_always_comb.py", line 133, in test2
    Simulation(self.bench(design2)).run(quiet=QUIET)
  File "test_always_comb.py", line 103, in bench
    design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v)
  File "test_always_comb.py", line 80, in design_v
    return setupCosimulation(**locals())
  File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in 
setupCosimulationCver
    return Cosimulation(cmd, **kwargs)
  File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line 
84, in __init__
    raise CosimulationError(_error.OSError, str(e))
CosimulationError: OSError: [Errno 2] No such file or directory

======================================================================
ERROR: test3 (__main__.AlwaysCombSimulationTest)
----------------------------------------------------------------------
Traceback (most recent call last):
  File "test_always_comb.py", line 136, in test3
    Simulation(self.bench(design3)).run(quiet=QUIET)
  File "test_always_comb.py", line 103, in bench
    design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v)
  File "test_always_comb.py", line 80, in design_v
    return setupCosimulation(**locals())
  File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in 
setupCosimulationCver
    return Cosimulation(cmd, **kwargs)
  File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line 
84, in __init__
    raise CosimulationError(_error.OSError, str(e))
CosimulationError: OSError: [Errno 2] No such file or directory

======================================================================
ERROR: test4 (__main__.AlwaysCombSimulationTest)
----------------------------------------------------------------------
Traceback (most recent call last):
  File "test_always_comb.py", line 139, in test4
    Simulation(self.bench(design4)).run(quiet=QUIET)
  File "test_always_comb.py", line 103, in bench
    design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v)
  File "test_always_comb.py", line 80, in design_v
    return setupCosimulation(**locals())
  File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in 
setupCosimulationCver
    return Cosimulation(cmd, **kwargs)
  File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line 
84, in __init__
    raise CosimulationError(_error.OSError, str(e))
CosimulationError: OSError: [Errno 2] No such file or directory

======================================================================
ERROR: test5 (__main__.AlwaysCombSimulationTest)
----------------------------------------------------------------------
Traceback (most recent call last):
  File "test_always_comb.py", line 142, in test5
    Simulation(self.bench(design5)).run(quiet=QUIET)
  File "test_always_comb.py", line 103, in bench
    design_v_inst = design_v(design.func_name, a, b, c, d, p_v, q_v, r_v)
  File "test_always_comb.py", line 80, in design_v
    return setupCosimulation(**locals())
  File "/tmp/myhdl-0.5a1/myhdl/test/toVerilog/util.py", line 22, in 
setupCosimulationCver
    return Cosimulation(cmd, **kwargs)
  File "/usr/lib/python2.4/site-packages/myhdl/_Cosimulation.py", line 
84, in __init__
    raise CosimulationError(_error.OSError, str(e))
CosimulationError: OSError: [Errno 2] No such file or directory

----------------------------------------------------------------------
Ran 5 tests in 1.079s

FAILED (errors=5)
ERROR


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