[myhdl-list] Re: Xilinx ISE error: unexpected token: '='

[Jan D. <ja...@ja...>]

George Pantazopoulos wrote:

>> Good to hear! At some point, please consider adding some info about
>> your project at the MyHDL web site (or ask me to do it.)
> 
> 
> Will do, as soon as it takes a little more form :) You've done a great 
> thing by developing myHDL. Do you have any help with it?

The best kind of help I'm getting is feedback from users - both academic
and instustrial - doing real projects with MyHDL.

For example, a significant number of new features, and my trigger to
work on 0.5, comes from user feedback.

I hope to increase the number of users in the future. MyHDL 0.5 will
(for the first time) be announced in comp.lang.fpga, I think the time
is ripe for it. I also hope users will start contributing to the
MyHDL web site, e.g. by describing details about their projects
and MyHDL usage on the web site. The infrastructure is ready for that -
it's just a matter of registering to add/modify info.

Regards,

Jan

-- 
Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
Losbergenlaan 16, B-3010 Leuven, Belgium
     Electronic design with Python:
     http://myhdl.jandecaluwe.com