[myhdl-list] Re: Some thoughts on toVerilog, toVHDL, etc.

[Jan D. <ja...@ja...>]

Günter Dannoritzer wrote:
> Hi,
> 
> When browsing for netlists I ran across this page about a free netlist 
> format:
> 
>     http://www.confluent.org/wiki/doku.php?id=fnf:index
> 
> This gave me an idea and I was wondering how feasible this really is? 
> How difficult would it be in MyHDL instead of creating individual 
> toVerilog, toVHDL, etc. modules, to go through a neutral netlist and 
> from there create HDL code?
> 
> I think this netlist format steamed from the confluence language, which 
> I am not really familiar with. However, I read that it is possible to 
> convert confluence in all types of other languages, like Verilog, VHDL, 
> but also programming language like C. This is also pictured in the web 
> link I gave above. Now I was wondering when the netlist format is the 
> key to that flexibility, whether MyHDL could take favor of developments 
> already done in that area?

I don't think so.

MyHDL directly converts from RTL/behavior to (perhaps somewhat lower
level) RTL/behavior in the target language.

If toVerilog converted to netlist, it would be a synthesis tool.
But that's a much bigger effort, and once in Verilog/VHDL, several
decent synthesis tools are available. Moreover, despite appearances,
toVerilog can also be used to convert non-synthesizable code, and that
can be very useful also.

Alternatively, if toVerilog restricted the MyHDL input to a netlist-type 
of format, the restrictions would be so high as to render the whole
thing not very interesting.

Let me add that I fail to see the point of Confluence itself. It's
one more attempt in a long tradition of non-procedural HDL languages.
The reasoning is that as hardware is parallel, the HDL should *only*
have parallel contructs too. In my opinion, this reasoning is flawed.
The evidence of sucessful HDLs supports my views on this.

It is easy to claim, as Confluence does, that you need much fewer
lines of code for a specific type of block, if you include it as a
primitive in your language. The real point is that there are many
kinds of useful hardware descriptions, including synthesizable ones,
that need procedural constructs, and that therefore simply cannot be
descibed elegantly in a non-procedural language like Confluence.

Regards,

Jan

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