Re: [myhdl-list] Re: always_comb problem

[David B. <dav...@fr...>]

Thanks for the explanation. I use "print" statements as debug functions b=
ut I
could as well use graphical functions if I do signal processing. In other=
 words
in this example the problem was caused by "print" but it could be anythin=
g that
is not a signal or variable affectation. Then your solution doesn't work.
Rather than adding a "pass" for everything we want to skip, we should onl=
y
"keep" the signal/variable affectations and "pass" everything else. Is th=
ere a
way to do that?

David.

Selon Jan Decaluwe <ja...@ja...>:

> David Brochart wrote:
> > Hello,
> >
> > In the following code:
> >
> > ---------------------------------------------------------------------=
-----
> >
> > from myhdl import intbv, Signal, Simulation, instances, delay, always=
_comb
> >
> > def test(a, b):
> >     c =3D intbv(2)
> >     def testFunc():
> >         b.next =3D a.val + c
> >         print b.val, a.val
> >     return always_comb(testFunc)
> >
> > def a_gen(a):
> >     while 1:
> >         yield delay(10)
> >         a.next =3D a.val + 1
> >
> > def top():
> >     a =3D Signal(intbv(0))
> >     b =3D Signal(intbv())
> >     test_i =3D test(a, b)
> >     a_gen_i =3D a_gen(a)
> >     return instances()
> >
> >
> > top_inst =3D top()
> > sim =3D Simulation(top_inst)
> > sim.run(100)
> >
> > ---------------------------------------------------------------------=
-----
> >
> > It seems that the "always_comb" function doesn't like the "print" in =
the
> "test"
> > function.
>
> Correct. Here's the background:
>
> always_comb inspects source code to see how signals are used. It flags
> "inout"
> usage as an error. Normally this is what you want (to get combinatorial
> semantics),
> but it may be too severe on "innocent" cases, as in this case.
>
> For those interested, I'll explain how this happens in the myhdl source=
 code,
> as well as the solution. Source inspection occurs by traversing an abst=
ract
> syntax tree, generated using the Python compiler package. See class
> _SigNameVisitor
> in the file myhdl/_always_comb.py. Adding the follows methods solves th=
is
> problem
> by avoiding that the traversal proceeds through print statements:
>
> class _SigNameVisitor(object):
>     ....
>     ....
>
>     def visitPrintnl(self, node):
>         pass # skip
>
>     def visitPrint(self, node):
>         pass # skip
>
> If have implemented this patch in my development tree, and the resultin=
g
> file is attached.
>
> > If I use the "while 1 - yield" structure it works fine, but it would
> > be nice to be able to use "always_comb" and still be able to insert d=
ebug
> > functions inside the code.
>
> But isn't it confusing that you will not necessarily see the resulting
> output value at the correct time (as the generator is not sensitive
> to the output signal)?
>
> Regards, Jan
>
> --
> Jan Decaluwe - Resources bvba - http://jandecaluwe.com
> Losbergenlaan 16, B-3010 Leuven, Belgium
>     Python is fun, and now you can design hardware with it:
>     http://jandecaluwe.com/Tools/MyHDL/Overview.html
>