[myhdl-list] Re: Icarus Verilog and MyHDL
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From: Jan D. <ja...@ja...> - 2004-03-03 09:02:24
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Vijay Kumar wrote: > Hi, > I would like to use MyHDL for co simulation with Icarus Verilog. But the test > programs are not getting simulated. The assertion (verilog_time & 0xFFFF.. == > myhdl... * 1000 + delta) (Ok, that is approx what the assertion is. But I guess > you can understand which one it is.) is failing. > > I understand what is happening(I read the docs for co simulation with Icarus > verilog) but I do not know what to do! Like I said even the test programs that > came with MyHDL fail to co-simulate. > > Please help me. Let's try. I *suspect* that this relates to the issue mentioned in the cosimulation/icarus/README.txt file, repeated here: """ Between snapshot 20030518 (used in MyHDL 0.3), and 20031009, the Icarus scheduler has been improved. This requires a small update of myhdl.c. The current version is supposed to work with recent snapshots - the older version is available in myhdl.c.20030518. """ In other words, make sure you use a version of myhdl.c which is compatible with your Icarus. I would advise you to use a recent Icarus snapshot and myhdl 0.4; those should work together (although I don't check all Icarus snapshots). In my development I just added cosimulation support for Cver; this worked with the latest myhdl.c almost unchanged. This suggests that the scheduling as done in more recent Icarus snapshots is indeed the better way. I noticed a flaw of mine: the file myhdl.c.20030518 is not in the MyHDL 0.4 distribution as promised. My current distutils setup doesn't pick it up - use myhdl.c from MyHDL 0.3 if you must have it. If problems persist, let me know, but please do include version information of all tools. Regards, Jan -- Jan Decaluwe - Resources bvba - http://jandecaluwe.com Losbergenlaan 16, B-3010 Leuven, Belgium Python is fun, and now you can design hardware with it: http://jandecaluwe.com/Tools/MyHDL/Overview.html |