[myhdl-list] Icarus Verilog and MyHDL

[Vijay K. <ec...@ni...>]

Hi,
I would like to use MyHDL for co simulation with Icarus Verilog. But the test 
programs are not getting simulated. The assertion (verilog_time & 0xFFFF.. == 
myhdl... * 1000 + delta) (Ok, that is approx what the assertion is. But I guess 
you can understand which one it is.) is failing.

I understand what is happening(I read the docs for co simulation with Icarus 
verilog) but I do not know what to do! Like I said even the test programs that 
came with MyHDL fail to co-simulate.

Please help me.

Vijay


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