RE: [myhdl-list] Re: MyHDL question

[Frank P. <pal...@co...>]

Thanks Jan, this is just what I needed.  I will give this a try and let =
you
know how it works out.

It's kind of silly, but the chip I was modelling was a simple 74LS93 =
4-bit
ripple counter which has 2 clock inputs, one for Q0 and one for Q1-Q3.  =
It
is possible that both clocks could appear at the same time.

My long term plan is to try to do some simulations of some old Black & =
White
coin-op arcade games (like Pong, etc.), based on the schematics.  These
games were built from about 1973-1981 and have no CPU's, only a bunch of
discrete logic chips.  I'm going to try to enter the structural data =
from
the schematics, build a small library of TTL parts, and use MyHDL & =
PyGame
to try to generate screenshots.

I'm sure that none of the simulations will approach "real-time", but I =
have
another idea to achieve that later.

I've done something like this with structural VHDL, but IMHO =
Python/MyHDL is
much nicer :)

Thanks again!
-Frank