Re: [myhdl-list] intbv.saturate, intbv.wrap

[Thomas T. <tho...@de...>]

> Why can't you use modulo operations ('%')

I can use it.
As conversion of modulo to Verilog works, I could skip the 
__debug__/__verilog__ clause  - in the hope that the compiler optimizes 
the modulo operation out (not tested yet).

Christopher's hint at putting the comb before the integrator could also 
be useful. But with large decimation rates the delay for this first comb 
grows large too.




Thomas