Re: [myhdl-list] intbv.saturate, intbv.wrap

[Jan D. <ja...@ja...>]

Christopher L. Felton wrote:
> I missed the earlier discussion, but my opinion the wrap is used very 
> often in DSP applications.  Any time you use an integrator (CIC, loop 
> filters, etc) you frequently take advantage of the wrap.  Even FIR 
> filters will often use the wrap "feature".

I suspect those DSP algorithms are not specified in Verilog/VHDL.
It wouldn't be surprizing if the specs used modulo operations -
the high-level version of a wrap. We could do this in MyHDL also,
even at the RTL level. (I have often done this in VHDL.)

Jan

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