[myhdl-list] always_comb from a change in Signal list does not get triggered
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From: Günter D. <dan...@we...> - 2008-06-13 09:53:02
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Hi,
I am trying to create a word wide shift register and the output register
is connected with an always_comb to the output signal of the function.
Now this always_comb gets only triggered one time, even so I see the
output register signal change during the shift operation.
This is my code:
def pipe(clk,en,din, dout, N,width):
pipe = [Signal(intbvSigned(width)) for i in range(N)]
print "N: ", N
@always(clk.posedge)
def rtl1():
if en:
for i in downrange(N,1):
print "i: %d"% i
pipe[i].next = pipe[i-1]
pipe[0].next = din
print "pipe: %s"% pipe
@always_comb
def rtl2():
print "pipe[N-1]: %d"% pipe[N-1]
dout.next = pipe[N-1]
return instances()
I attached the test bench for it. Running the test bench will fill the
pipe with values and print the output dout.
I changed the code so that the pipe memory has only N-1 entries and dout
being the Nth register, which worked fine. I just would like to know
what I am doing wrong so that the always_comb gets not triggered anymore?
BTW, in the above example I am using a convenience function to create a
signed intbv instance:
------------------------------------------------------
def intbvSigned(width, value=0):
max = 2**(width-1)
min = -max
r = intbv(value, min, max)
return r
Thanks for any help.
Guenter
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