Re: [myhdl-list] OT; Verilog syntax highlighter for GeSHi

[Jan D. <ja...@ja...>]

Günter Dannoritzer wrote:
> Hi Jan,
> 
> Slightly off topic, but when I was searching for a Verilog syntax
> highlighter for GeSHi I got a few hits on the myhdl web page.
> 
> I noticed that you must have some kind of Verilog syntax highlighter 
> going, as all the keywords for Verilog are shown bold.
> 
> Anyhow, I have created one for GeSHi following somewhat the color scheme
> used in vim.
> 
> I have uploaded it to a page and it can be downloaded from this link:
> 
> http://www.mikrocontroller.net/attachment/35709/verilog.php

Thanks Guenter,

Will you try to get this in the geshi distribution?

It's quite some time ago already, but I think I reasoned as follows.
Dokuwiki also uses geshi, but geshi had (has) no Verilog support.
It had vhdl, so I thought Verilog would soon be available. In the mean
time, I used a quick hack for Verilog based on the Python file.
I have attached it for your reference. (Note: this is a private hack
so the header is not consistent with the content - not for
distribution.)

I'm sure your file is much more complete and I plan to use it (or,
if you get it into geshi, that will happen automatically).

Jan

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