Re: [myhdl-list] FW: Floating-point support

[Blubaugh, D. A. <dbl...@be...>]

Thank you very much for your response.  



The commercial packages that I am referring to is the ImpulseC complier.
This compiler can extract c source code, which has been written with
floats and doubles.  Where upon it then converts most of the C- source
code, including the float and double mathematical processing, and
converts it directly into VHDL or verilog.  This is done for high
precision and numerical applications research, like the Fast Fourier
Transform.  


I was wondering that floating-point algorithms, like the FFT,  could be
eventually supported by MyHDL, with a direct conversion of
floating-point python to VHDL or verilog?  I believe one way to handle
this would be to develop a module which handles the floating-point
procedure for addition, subtraction, multiplication, and division, which
has been defined by IEEE and then import this module to handle the
computational tasks within MyHDL.  Is that possible?   I definitely hope
so!!!! 


Also, is there a method to automatically generate pipeline architectures
with MyHDL?   Thanks for all of the help and answers!!!!


David Blubaugh 







 

-----Original Message-----
From: myh...@li...
[mailto:myh...@li...] On Behalf Of Jan
Decaluwe
Sent: Thursday, March 20, 2008 5:53 PM
To: myh...@li...
Subject: Re: [myhdl-list] FW: Floating-point support

Blubaugh, David A. wrote:
> Would anyone know as to how to develop floating point support for the 
> MyHDL module?  Has anyone worked with any alternative versions of the 
> IEEE standard for floating -point?  Also, has anyone developed a 
> floating-point library for a module within the python environment in 
> order to execute numerical computations.  I would imagine since I am 
> translating python to verilog by using MyHDL , that I will have to 
> develop the floating-point support module in python source code as
well ??
> 
> I believe this is what will be required in order to develop 
> floating-point capable algorithms within Verilog.  If I can develop 
> this one feature from MyHDL, it would allow this module to be fairly 
> competitive with commercial products.

I am no expert in floating point. What is it exactly that the commercial
products you refer to do?

Jan

--
Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
Kaboutermansstraat 97, B-3000 Leuven, Belgium
     From Python to silicon:
     http://myhdl.jandecaluwe.com


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