Re: [myhdl-list] Bit-wise inversion issue

[Jan D. <ja...@ja...>]

Jan Decaluwe wrote:

> Conclusion
> ----------
> 
> The drawback of the "Pure Python" solution is probably fatal
> for practical purposes. Therefore, I propose to keep the
> "Practical Hardware" solution.

I have implemented this, including conversion support for
Verilog and VHDL.

This will be included in the upcoming development release 0.6dev7.

Jan

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