Re: [myhdl-list] List of Signals == Memory

[Christopher L. F. <cf...@uc...>]

I agree I wouldn't like to see anything the currently works broken.   
In my original post I had proposed a something that would keep the  
feature but break current implementation.  Don't know if that would be  
acceptable.

Basically, I would like to use list syntax in generators, to preserve  
memory instantiation I proposed I seperate type.  I proposed this only  
because of my current understanding of the analyze and convert code.   
I had suggested (still lot to resolve before getting to this point)  
that another type be added, kinda like the following.

from myhdl import Signal

class Memory(Signal):
     pass

 >>> from memory_class import *
 >>> reload(memory_class)
<module 'memory_class' from 'memory_class.py'>
 >>> x = Memory(0)
 >>> type(x)
<class 'memory_class.Memory'>

Basically just an empty class that has all the same attributes and  
behavior as a signal.  This way the analyze and convert can easily  
tell if a list is intended to be memory or just a generic container  
for signals.

Declaring memory would look like

RAM = [Memory(intbv(0)[8:]) for i in range(N)]

This is probably getting a little head of myself.


On Feb 22, 2008, at 9:35 AM, Jan Decaluwe wrote:

> Tom Dillon wrote:
>> Hi,
>>
>> I am not quite following this discussion, sorry.
>>
>> Just want to make sure we would loose our ability to infer RAMs  
>> from lists, I thought that was a
>> nice feature.
>
> No worries. We'll investigate if certain restrictions can be lifted,
> but I don't want to lose anything that we can do today.
>
> Jan
>
> -- 
> Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
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