A 32-bit MIPS simple single cycle processor based on triadic Harvard architecture with a RISC-like ISA.

This project is done in Cairo University-Faculty of Enigneering, Electronics and Electrical Communication department (EECE-2017)

Features

  • VHDL
  • Microprocessor
  • MIPS
  • 32-BIT
  • Modelsim
  • RISC
  • Harvard Architecture

Project Samples

32-BIT GENERAL PURPOSE INTEGER PROCESSOR Screenshot 1 32-BIT GENERAL PURPOSE INTEGER PROCESSOR Screenshot 2

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Additional Project Details

Registered

2015-11-15
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