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From: Peter C. <pc...@ca...> - 2009-02-06 15:22:34
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On Thu, 2009-01-29 at 15:08 -0800, Eric Anholt wrote:
> We can support any combination of (a8r8g8b8, x8r8g8b8, r5g6b5) x (z0,z24,z24s8)
> on either class of chipsets. The only restriction is no mixing bpp when also
> mixing tiling. This shouldn't be occurring currently.
Is it worth adding these in the intelInitScreen() path as well as the
intelInitScreen2() path?
I guess the zero-copy TFP problem they were added to help fix is only
present in the DRI2 enabled case, but should similar FBConfig be added
to both for consistency?
> ---
> src/mesa/drivers/dri/common/utils.c | 3 +-
> src/mesa/drivers/dri/common/utils.h | 3 +-
> src/mesa/drivers/dri/intel/intel_screen.c | 54 +++++++++++++++++++++++++++-
> src/mesa/drivers/dri/swrast/swrast.c | 8 ++--
> 4 files changed, 60 insertions(+), 8 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/common/utils.c b/src/mesa/drivers/dri/common/utils.c
> index 30c860b..10f7db8 100644
> --- a/src/mesa/drivers/dri/common/utils.c
> +++ b/src/mesa/drivers/dri/common/utils.c
> @@ -734,7 +734,8 @@ driCreateConfigs(GLenum fb_format, GLenum fb_type,
> return configs;
> }
>
> -const __DRIconfig **driConcatConfigs(__DRIconfig **a, __DRIconfig **b)
> +const __DRIconfig **driConcatConfigs(const __DRIconfig **a,
> + const __DRIconfig **b)
> {
> const __DRIconfig **all;
> int i, j, index;
> diff --git a/src/mesa/drivers/dri/common/utils.h b/src/mesa/drivers/dri/common/utils.h
> index 0c974db..b0908e5 100644
> --- a/src/mesa/drivers/dri/common/utils.h
> +++ b/src/mesa/drivers/dri/common/utils.h
> @@ -133,7 +133,8 @@ driCreateConfigs(GLenum fb_format, GLenum fb_type,
> unsigned num_depth_stencil_bits,
> const GLenum * db_modes, unsigned num_db_modes);
>
> -const __DRIconfig **driConcatConfigs(__DRIconfig **a, __DRIconfig **b);
> +const __DRIconfig **driConcatConfigs(const __DRIconfig **a,
> + const __DRIconfig **b);
>
> int
> driGetConfigAttrib(const __DRIconfig *config,
> diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
> index fe890c3..aad53fb 100644
> --- a/src/mesa/drivers/dri/intel/intel_screen.c
> +++ b/src/mesa/drivers/dri/intel/intel_screen.c
> @@ -671,6 +671,17 @@ static const
> __DRIconfig **intelInitScreen2(__DRIscreenPrivate *psp)
> {
> intelScreenPrivate *intelScreen;
> + GLenum fb_format[3];
> + GLenum fb_type[3];
> + /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
> + * support pageflipping at all.
> + */
> + static const GLenum back_buffer_modes[] = {
> + GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML
> + };
> + uint8_t depth_bits[4], stencil_bits[4];
> + int color;
> + const __DRIconfig **configs = NULL;
>
> /* Calling driInitExtensions here, with a NULL context pointer,
> * does not actually enable the extensions. It just makes sure
> @@ -710,8 +721,47 @@ __DRIconfig **intelInitScreen2(__DRIscreenPrivate *psp)
> intelScreen->irq_active = 1;
> psp->extensions = intelScreenExtensions;
>
> - return driConcatConfigs(intelFillInModes(psp, 16, 16, 0, 1),
> - intelFillInModes(psp, 32, 24, 8, 1));
> + depth_bits[0] = 0;
> + stencil_bits[0] = 0;
> + depth_bits[1] = 16;
> + stencil_bits[1] = 0;
> + depth_bits[2] = 24;
> + stencil_bits[2] = 0;
> + depth_bits[3] = 24;
> + stencil_bits[3] = 8;
> +
> + fb_format[0] = GL_RGB;
> + fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
> +
> + fb_format[1] = GL_RGB;
> + fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
> +
> + fb_format[2] = GL_RGBA;
> + fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
> +
> + for (color = 0; color < ARRAY_SIZE(fb_format); color++) {
> + const __DRIconfig **new_configs;
> +
> + new_configs = (const __DRIconfig **)
> + driCreateConfigs(fb_format[color], fb_type[color],
> + depth_bits,
> + stencil_bits,
> + ARRAY_SIZE(depth_bits),
> + back_buffer_modes,
> + ARRAY_SIZE(back_buffer_modes));
> + if (configs == NULL)
> + configs = new_configs;
> + else
> + configs = driConcatConfigs(configs, new_configs);
> + }
> +
> + if (configs == NULL) {
> + fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
> + __LINE__);
> + return NULL;
> + }
> +
> + return configs;
> }
>
> const struct __DriverAPIRec driDriverAPI = {
> diff --git a/src/mesa/drivers/dri/swrast/swrast.c b/src/mesa/drivers/dri/swrast/swrast.c
> index 4197603..38c165e 100644
> --- a/src/mesa/drivers/dri/swrast/swrast.c
> +++ b/src/mesa/drivers/dri/swrast/swrast.c
> @@ -129,7 +129,7 @@ setupLoaderExtensions(__DRIscreen *psp,
> }
> }
>
> -static __DRIconfig **
> +static const __DRIconfig **
> swrastFillInModes(__DRIscreen *psp,
> unsigned pixel_bits, unsigned depth_bits,
> unsigned stencil_bits, GLboolean have_back_buffer)
> @@ -189,7 +189,7 @@ swrastFillInModes(__DRIscreen *psp,
> return NULL;
> }
>
> - return configs;
> + return (const __DRIconfig **)configs;
> }
>
> static __DRIscreen *
> @@ -198,7 +198,7 @@ driCreateNewScreen(int scrn, const __DRIextension **extensions,
> {
> static const __DRIextension *emptyExtensionList[] = { NULL };
> __DRIscreen *psp;
> - __DRIconfig **configs8, **configs16, **configs32;
> + const __DRIconfig **configs8, **configs16, **configs32;
>
> (void) data;
>
> @@ -217,7 +217,7 @@ driCreateNewScreen(int scrn, const __DRIextension **extensions,
> configs16 = swrastFillInModes(psp, 16, 16, 0, 1);
> configs32 = swrastFillInModes(psp, 32, 24, 8, 1);
>
> - configs16 = (__DRIconfig **)driConcatConfigs(configs8, configs16);
> + configs16 = driConcatConfigs(configs8, configs16);
>
> *driver_configs = driConcatConfigs(configs16, configs32);
>
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
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