Re: [Madwifi-devel] Frequency Hopping
Status: Beta
Brought to you by:
otaku
From: Vishal S. <vis...@gm...> - 2010-03-29 12:36:56
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I have written following function. However it is giving problems. Check if it works for you //logic to change the channel -- vs uint32_t channelSelect, ii,data,synthDelay,ulCount, num_q = 0, num_tx_pending = 0; uint64_t curr_time = ath_hal_gettsf64(ah); #define AR_Q0_STS 0x0a00 #define AR_Q_STS_PEND_FR_CNT 0x00000003 /* Mask for Pending Frame Count */ #define AR_Q_TXE 0x0840 /* MAC Transmit Queue disable */ if(freq == 2447) { freq = 2462; //update the datastructures storing channel information sc->sc_curchan.channel = 2462; ((sc->sc_ic).ic_curchan)->ic_ freq = 2462; //(AH_PRIVATE_CUSTOM(ah)->ah_curchan)->channel = 2432; ((sc->sc_ic).ic_curchan)->ic_ieee = 11; }else if(freq == 2462) { freq = 2447; //update the datastructures storing channel information sc->sc_curchan.channel = 2447; ((sc->sc_ic).ic_curchan)->ic_freq = 2447; //(AH_PRIVATE_CUSTOM(ah)->ah_curchan)->channel = 2412; ((sc->sc_ic).ic_curchan)->ic_ieee = 8; } difftime[0] = ath_hal_gettsf64(sc->sc_ah); channelSelect = ((freq - 672) * 2 - 3040)/10; channelSelect = (channelSelect << 2) & 0xff; channelSelect = ath_hal_reverseBits_vs(channelSelect, 8); channelSelect = (channelSelect << 4) | 0x1005; ATH_HAL_LOCK_IRQ((sc->sc_ah)->ah_sc); ath_hal_intrset(ah, 0); fractel_ath_stoprecv(sc); //function similar to ar5212StopDmaReceive in latest revision //check if any tx is pending for(num_q = 0; num_q < HAL_NUM_TX_QUEUES; num_q++) { num_tx_pending = ath_reg_read(sc, (AR_Q0_STS + (num_q << 2))) & AR_Q_STS_PEND_FR_CNT; if (num_tx_pending == 0) { if(ath_reg_read(sc, AR_Q_TXE) & (1 << num_q)) num_tx_pending = 1; } if(num_tx_pending >= 1) { condition_log = 2228; log(0, (char *)__func__, freq, num_tx_pending, "tx is not stopped"); goto freq_changed; } } //request analog bus grant ath_reg_write(sc, 0x997C, 0x00000001); for(ulCount=0; ulCount<100; ulCount++) { if(ath_reg_read(sc, 0x9c20)) break; udelay(5); } if(ulCount >= 100) { condition_log = 2228; log(0, (char *)__func__, freq, synthDelay, "ulCount exceeded"); ath_reg_write(sc, 0x997C, 0); goto freq_changed; } //disable PHY -- 0x981C ==> AR_PHY_ACTIVE ath_reg_write(sc, 0x981C, 0x00000000); udelay(0xA); difftime[1] = ath_hal_gettsf64(sc->sc_ah); //set internal registers -- logic similar to ar5112SetChannel in latest revision ath_reg_write(sc, 0x989c, (channelSelect & 0xff)); channelSelect = (channelSelect >> 8) & 0x7f; ath_reg_write(sc, 0x98d8, channelSelect); udelay(0xA); //enable phy ath_reg_write(sc, 0x981C, 0x00000001); //wait for frequency synth to settle 0x9914 ==> AR_PHY_RX_DELAY, 0x00003FFF ==> AR_PHY_RX_DELAY_DELAY data = ath_reg_read(sc, 0x9914) & 0x00003FFF; synthDelay = (4 * data) / 22; udelay(synthDelay + 100); difftime[2] = ath_hal_gettsf64(sc->sc_ah); //release RFBUS ath_reg_write(sc, 0x997C, 0); //calibrate AGC and start noise floor calculation ath_reg_write(sc, 0x9860, ath_reg_read(sc, 0x9860) | 0x00000001 | 0x00000002); //enable bus errors ath_reg_write(sc, 0x00ac, ath_reg_read(sc,0x00ac) | 0x00010000 | 0x00020000 | 0x00040000); freq_changed: sc->sc_imask = HAL_INT_RX | HAL_INT_TX | HAL_INT_RXEOL | HAL_INT_RXORN | HAL_INT_FATAL | HAL_INT_GLOBAL; fractel_ath_startrecv(sc); //function similar to ar5212EnableReceive in latest revision ath_hal_intrset(ah, sc->sc_imask); ATH_HAL_UNLOCK_IRQ((sc->sc_ah)->ah_sc); difftime[4] = ath_hal_gettsf64(sc->sc_ah); #undef AR_Q0_STS #undef AR_Q_STS_PEND_FR_CNT #undef AR_Q_TXE Vishal On Mon, Mar 29, 2010 at 5:35 PM, Mohammad Abdelhadi <mo....@gm...>wrote: > > > Hi Vishal, > > While I was checking the mailinglist, I found a function that was > suggested for you by Ivan: > > void ar5212SetChannel5112work2192(UINT32 freq) > > { > /* Step 5 MHz */ > UINT32 ii,channelSelect; > volatile UINT32 *hard_reg; > > channelSelect = ((freq - 672) * 2 - 3040)/10; > channelSelect = (channelSelect << 2) & 0xff; > channelSelect = ath_hal_reverseBits(channelSelect, 8); > > > channelSelect = (channelSelect << 4) | 0x1005; > > hard_reg = (void*)0xB8510024; *hard_reg = 0x0; > sysUDelayFlash (0x3E8); > hard_reg = (void*)0xb851981c; *hard_reg = 0x0; > sysUDelayFlash (0xA); > hard_reg = (void*)0xb851989C; *hard_reg = (channelSelect & 0xff); > > channelSelect = (channelSelect >> 8) & 0x7f; > hard_reg = (void*)0xb85198D8; *hard_reg = channelSelect; > sysUDelayFlash (0xA); > hard_reg = (void*)0xb851981c; *hard_reg = 0x1; > sysUDelayFlash (0x64); > hard_reg = (void*)0xb8519860; > *hard_reg = *hard_reg |0x2; > channelSelect = 0x2; > for (ii=0; (ii< 0x3FFFE) && channelSelect ;ii++)channelSelect = > *hard_reg & 0x2; > > hard_reg = (void*)0xB8510024; *hard_reg = 0x1; > > > } > > > And I tried to use it, but I got a lot of errors. Therefore, could you > please tell me how to use this function in details. > > Thank you so much... > > -- > Mohammad Jaser Abdelhadi > > ---------------------------------------------------------------------------- > Communications Engineering-Senior Student > Princess Sumaya University for Technology > Mobile: +962777030924 > Email: moh...@ya... \ mo....@gm... > > > > > ------------------------------------------------------------------------------ > Download Intel® Parallel Studio Eval > Try the new software tools for yourself. Speed compiling, find bugs > proactively, and fine-tune applications for parallel performance. > See why Intel Parallel Studio got high marks during beta. > http://p.sf.net/sfu/intel-sw-dev > _______________________________________________ > Madwifi-devel mailing list > Mad...@li... > https://lists.sourceforge.net/lists/listinfo/madwifi-devel > > |