linuxsh-dev

Re: Syscall restarted with the clobbered 5th argument

[Paul M. <le...@li...>]

On Sun, Jun 17, 2007 at 07:20:15AM +0900, Kaz Kojima wrote:
> I'm working on the latest GNU libc with the 2.6.22-rc4 kernel and
> I've found a few kernel problems.  This is the first one.
> 
> We use R0 as the 5th argument of syscall.  When the syscall restarts
> after signal handling, we should restore the old value of R0.
> The attached patch does it.  Without this patch, I've experienced random
> failures in the situation which signals are issued frequently.
> 
Applied, thanks. I'll add this to the 2.6.22 queue.

Re: Give a functional include/asm-sh/futex.h

[Paul M. <le...@li...>]

On Sun, Jun 17, 2007 at 07:27:05AM +0900, Kaz Kojima wrote:
> The last problem is that the newer libc needs more complete futex
> support in the kernel.  Now SH uses include/asm-generic/futex.h
> which doesn't give the required functions.  The attached patch is
> an obvious "last resort" implementation for the uni processor.
> If the CPU has ll/sc insns, they can be used like as the other
> architectures do.  I'll leave the llsc version to the folks who
> can access such CPU.
> 
Hmm.. this all looks terribly generic, if glibc requires the generic
implementation to be extended, perhaps this change should be made against
asm-generic/futex.h instead?

Re: 2.6.22-rc5

[Paul M. <le...@li...>]

On Sun, Jun 17, 2007 at 10:50:21PM +0100, Adrian McMenamin wrote:
> Just to say this builds and boots cleanly for the Dreamcast, no errors
> or warnings I can see
> 
Thanks for testing, Adrian.

2.6.22-rc5

[Adrian M. <ad...@ne...>]

Just to say this builds and boots cleanly for the Dreamcast, no errors
or warnings I can see

Re: 2.6.22-rc4 not compiling on the SH4/Dreamcast

[Paul M. <le...@li...>]

On Sat, Jun 16, 2007 at 09:24:11PM +0100, Adrian McMenamin wrote:
> This is a patched 2.6.21.5 - which might be an issue. But this is what I
> get:
> 
> LD      .tmp_vmlinux1
> arch/sh/kernel/built-in.o: In function `restore_all':
> arch/sh/kernel/cpu/sh4/../sh3/entry.S:(.text+0x50cc): undefined
> reference to `in_nmi'
> make: *** [.tmp_vmlinux1] Error 1
> 
Fixed in current git. You can either toss an ifdef around the label or
simply enable KGDB if you wish to work around it in the interim, or
barring that, wait for -rc5.

Give a functional include/asm-sh/futex.h

[Kaz K. <kk...@rr...>]

The last problem is that the newer libc needs more complete futex
support in the kernel.  Now SH uses include/asm-generic/futex.h
which doesn't give the required functions.  The attached patch is
an obvious "last resort" implementation for the uni processor.
If the CPU has ll/sc insns, they can be used like as the other
architectures do.  I'll leave the llsc version to the folks who
can access such CPU.

Regards,
	kaz

Signed-off-by: Kaz Kojima <kk...@rr...>

--- GIT/linux-2.6/include/asm-sh/futex.h	2006-08-29 08:00:06.000000000 +0900
+++ linux-2.6.22-rc4/include/asm-sh/futex.h	2007-06-14 17:36:40.000000000 +0900
@@ -1,6 +1,101 @@
 #ifndef _ASM_FUTEX_H
 #define _ASM_FUTEX_H
 
-#include <asm-generic/futex.h>
+#ifdef __KERNEL__
 
+#include <linux/futex.h>
+#include <asm/errno.h>
+#include <asm/uaccess.h>
+
+static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
+{
+	int op = (encoded_op >> 28) & 7;
+	int cmp = (encoded_op >> 24) & 15;
+	int oparg = (encoded_op << 8) >> 20;
+	int cmparg = (encoded_op << 20) >> 20;
+	int oldval = 0, ret;
+	unsigned long flags;
+
+	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
+		oparg = 1 << oparg;
+
+	if (!access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
+		return -EFAULT;
+
+	pagefault_disable();
+
+	local_irq_save(flags);
+
+	switch (op) {
+	case FUTEX_OP_SET:
+		ret = get_user(oldval, uaddr);
+		if (!ret)
+			ret = put_user(oparg, uaddr);
+		break;
+	case FUTEX_OP_ADD:
+		ret = get_user(oldval, uaddr);
+		if (!ret)
+			ret = put_user(oldval + oparg, uaddr);
+		break;
+	case FUTEX_OP_OR:
+		ret = get_user(oldval, uaddr);
+		if (!ret)
+			ret = put_user(oldval | oparg, uaddr);
+		break;
+	case FUTEX_OP_ANDN:
+		ret = get_user(oldval, uaddr);
+		if (!ret)
+			ret = put_user(oldval & oparg, uaddr);
+		break;
+	case FUTEX_OP_XOR:
+		ret = get_user(oldval, uaddr);
+		if (!ret)
+			ret = put_user(oldval ^ oparg, uaddr);
+		break;
+	default:
+		ret = -ENOSYS;
+	}
+
+	local_irq_restore(flags);
+
+	pagefault_enable();
+
+	if (!ret) {
+		switch (cmp) {
+		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
+		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
+		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
+		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
+		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
+		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
+		default: ret = -ENOSYS;
+		}
+	}
+	return ret;
+}
+
+static inline int
+futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
+{
+	int ret, prev;
+	unsigned long flags;
+
+	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
+		return -EFAULT;
+
+	local_irq_save(flags);
+
+	ret = get_user(prev, uaddr);
+	if (!ret && oldval == prev)
+		ret = put_user(newval, uaddr);
+
+	local_irq_restore(flags);
+
+	if (ret)
+		return ret;
+
+        return prev;
+}
+
+#endif /* __KERNEL__ */
 #endif

Terminate .eh_frame in VDSO with a 4-byte 0

[Kaz K. <kk...@rr...>]

The 2nd one is about VDSO.
It's assumed that .eh_frame is terminated with 4-byte 0 in shared
libraries and executable.  It seems to be the case for VDSOs too.
Without this terminator, I saw failures when unwinding from VDSO,
though I don't know how other architectures handle this issue.
For the normal libs, crtendS.o gives this terminator.  We can use
such terminating objects.  Or we can add a 4-byte 0 with modifying
the linker script like as the patch below.

BTW, I've found that SH boards set CONFIG_VSYSCALL=y as default.
Brave enough! :-)

Regards,
	kaz

--- GIT/linux-2.6/arch/sh/kernel/vsyscall/vsyscall.lds.S	2006-12-02 20:23:20.000000000 +0900
+++ linux-2.6.22-rc4/arch/sh/kernel/vsyscall/vsyscall.lds.S	2007-06-15 18:06:38.000000000 +0900
@@ -36,7 +36,10 @@ SECTIONS
   .text           : { *(.text) }		:text =0x90909090
   .note		  : { *(.note.*) }		:text :note
   .eh_frame_hdr   : { *(.eh_frame_hdr) }	:text :eh_frame_hdr
-  .eh_frame       : { KEEP (*(.eh_frame)) }	:text
+  .eh_frame       : {
+	KEEP (*(.eh_frame))
+	LONG (0)
+  }						:text
   .dynamic        : { *(.dynamic) }		:text :dynamic
   .useless        : {
   	*(.got.plt) *(.got)

Syscall restarted with the clobbered 5th argument

[Kaz K. <kk...@rr...>]

Hi,

I'm working on the latest GNU libc with the 2.6.22-rc4 kernel and
I've found a few kernel problems.  This is the first one.

We use R0 as the 5th argument of syscall.  When the syscall restarts
after signal handling, we should restore the old value of R0.
The attached patch does it.  Without this patch, I've experienced random
failures in the situation which signals are issued frequently.

Regards,
	kaz

Signed-off-by: Kaz Kojima <kk...@rr...>

--- GIT/linux-2.6/arch/sh/kernel/signal.c	2007-06-09 07:33:58.000000000 +0900
+++ linux-2.6.22-rc4/arch/sh/kernel/signal.c	2007-06-15 10:56:43.000000000 +0900
@@ -481,7 +481,7 @@ give_sigsegv:
 
 static int
 handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
-	      sigset_t *oldset, struct pt_regs *regs)
+	      sigset_t *oldset, struct pt_regs *regs, unsigned int save_r0)
 {
 	int ret;
 
@@ -500,6 +500,7 @@ handle_signal(unsigned long sig, struct 
 				}
 			/* fallthrough */
 			case -ERESTARTNOINTR:
+				regs->regs[0] = save_r0;
 				regs->pc -= instruction_size(
 						ctrl_inw(regs->pc - 4));
 				break;
@@ -583,7 +584,8 @@ static void do_signal(struct pt_regs *re
 	signr = get_signal_to_deliver(&info, &ka, regs, NULL);
 	if (signr > 0) {
 		/* Whee!  Actually deliver the signal.  */
-		if (handle_signal(signr, &ka, &info, oldset, regs) == 0) {
+		if (handle_signal(signr, &ka, &info, oldset, regs, save_r0)
+		    == 0) {
 			/* a signal was successfully delivered; the saved
 			 * sigmask will have been stored in the signal frame,
 			 * and will be restored by sigreturn, so we can simply

2.6.22-rc4 not compiling on the SH4/Dreamcast

[Adrian M. <ad...@ne...>]

This is a patched 2.6.21.5 - which might be an issue. But this is what I
get:

LD      .tmp_vmlinux1
arch/sh/kernel/built-in.o: In function `restore_all':
arch/sh/kernel/cpu/sh4/../sh3/entry.S:(.text+0x50cc): undefined
reference to `in_nmi'
make: *** [.tmp_vmlinux1] Error 1

glibc - reboot()

[Cmmn Ml <cm...@ya...>]

Hello,

I have a system based on SH7705, running sh-linux 2.6.16.9. I'm using BusyBox - 1.00 with glibc - 2.4. 

My problem is the BusyBox reboot command fails to reboot the system. It shows up following messages, 

"Please stand by while rebooting the system."
"Restarting system"

but does not actually reboot the system. According to my findings, the reason behind this problem is the reboot() function provided in the glibc doesn't work as expected. 

The rebooting functionality can be implemented in some other way, but I wonder is this a knows problem in sh-linux systems ?. If any one of you can give some thoughts on this, that'll be a great help.

Thank you,

Cmmn Ml



       
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Re: [PATCH] rework ipr code

[Paul M. <le...@li...>]

On Fri, Jun 15, 2007 at 06:29:17PM +0900, Magnus Damm wrote:
> sh: rework ipr code
> 
> This patch reworks the ipr code by grouping the offset array together with the
> ipr_data structure in a new data structure called ipr_desc. This new structure
> also contains the name of the controller in struct irq_chip. The idea behind 
> putting struct irq_chip in there is that we can use offsetof() to locate the 
> base addresses in the irq_chip callbacks. This strategy has much in common
> with the recently merged intc2 code.
> 
> One logic change has been made - the original ipr code enabled the interrupts
> by default but with this patch they are all disabled by default.
> 
Thanks, this sort of thing has been needed for some time. I suppose the
next step is to rip out the IPR defines from the headers, where they're
still lingering around. I killed off most of those during the great IRQ
conversion of 9a7ef6d59f9d4780ff5bc9c4d05266b52dcb9211, but there's still
a bit to do.

>  Applies to the sh-2.6.23 development tree.
>  Modified files compiles for all cpus and boards below.
>  Boots and works fine on RTS7751R2D board.
> 
Also verified on SH7722, SH7780, and SH7785.

I've applied it and pushed it out, folks using something other than those
listed CPU subtypes are advised to test in the near future.

Re: rip out broken boards

[Paul M. <le...@li...>]

On Fri, Jun 15, 2007 at 06:36:07PM +0900, Magnus Damm wrote:
> On 6/15/07, Paul Mundt <le...@li...> wrote:
> > On Fri, Jun 15, 2007 at 04:59:05PM +0900, Magnus Damm wrote:
> > > Here is a list of boards that doesn't compile in the 2.6.23
> > > development tree [1]:
> > >
> > > CONFIG_SH_7300_SOLUTION_ENGINE
> > > CONFIG_SH_73180_SOLUTION_ENGINE
> >
> > Killing these off seems fine, I doubt there are any users left for any of
> > these.
> 
> Will you remove them or do you want patches?
> 
Patches are always welcome, though it's probably worth waiting for a week
or so to see if anyone suddenly finds themselves interested in ancient
SH-Mobile support.. The person who did the 73180 port hasn't had the
hardware in years, at least.

> > > CONFIG_SH_7710VOIPGW
> > > CONFIG_SH_7343_SOLUTION_ENGINE
> > >
> > These there are users for, but they're mostly stuck on older kernels. It
> > would be worth keeping them at least partially working until they've had
> > a chance to rebase. I also do not have hardware for the first one, so
> > this is fairly difficult to verify.
> 
> Ok, I'll work on fixing up the 7343 board next week then. If anyone
> else has time and that 7710 board handy then I'd be happy to help out
> fixing that board as well.
> 
I have (older) trees for both of these if it's something you want to dig
in to. Most of that's just driver stuff, though.

Re: rip out broken boards

[Magnus D. <mag...@gm...>]

On 6/15/07, Paul Mundt <le...@li...> wrote:
> On Fri, Jun 15, 2007 at 04:59:05PM +0900, Magnus Damm wrote:
> > Here is a list of boards that doesn't compile in the 2.6.23
> > development tree [1]:
> >
> > CONFIG_SH_7300_SOLUTION_ENGINE
> > CONFIG_SH_73180_SOLUTION_ENGINE
>
> Killing these off seems fine, I doubt there are any users left for any of
> these.

Will you remove them or do you want patches?

> > CONFIG_SH_7710VOIPGW
> > CONFIG_SH_7343_SOLUTION_ENGINE
> >
> These there are users for, but they're mostly stuck on older kernels. It
> would be worth keeping them at least partially working until they've had
> a chance to rebase. I also do not have hardware for the first one, so
> this is fairly difficult to verify.

Ok, I'll work on fixing up the 7343 board next week then. If anyone
else has time and that 7710 board handy then I'd be happy to help out
fixing that board as well.

/ magnus

[PATCH] rework ipr code

[Magnus D. <mag...@gm...>]

sh: rework ipr code

This patch reworks the ipr code by grouping the offset array together with the
ipr_data structure in a new data structure called ipr_desc. This new structure
also contains the name of the controller in struct irq_chip. The idea behind 
putting struct irq_chip in there is that we can use offsetof() to locate the 
base addresses in the irq_chip callbacks. This strategy has much in common
with the recently merged intc2 code.

One logic change has been made - the original ipr code enabled the interrupts
by default but with this patch they are all disabled by default.

Signed-off-by: Magnus Damm <da...@ig...>
---

 Applies to the sh-2.6.23 development tree.
 Modified files compiles for all cpus and boards below.
 Boots and works fine on RTS7751R2D board.

 arch/sh/boards/se/770x/irq.c           |  124 +++++++++++++-------------------
 arch/sh/boards/se/7722/irq.c           |   15 +++
 arch/sh/boards/se/7751/irq.c           |   63 ++++++----------
 arch/sh/boards/sh03/setup.c            |   28 +++++--
 arch/sh/boards/shmin/setup.c           |   30 +++++--
 arch/sh/boards/snapgear/setup.c        |   28 +++++--
 arch/sh/boards/titan/setup.c           |   22 +++++
 arch/sh/kernel/cpu/irq/ipr.c           |   59 +++++++--------
 arch/sh/kernel/cpu/sh2/setup-sh7619.c  |   24 +++---
 arch/sh/kernel/cpu/sh2a/setup-sh7206.c |   24 +++---
 arch/sh/kernel/cpu/sh3/setup-sh7705.c  |   40 +++++-----
 arch/sh/kernel/cpu/sh3/setup-sh7709.c  |   84 +++++++++++++++------
 arch/sh/kernel/cpu/sh3/setup-sh7710.c  |   42 +++++-----
 arch/sh/kernel/cpu/sh4/setup-sh7750.c  |   58 +++++++++-----
 arch/sh/kernel/cpu/sh4/setup-sh7760.c  |   32 ++++----
 arch/sh/kernel/cpu/sh4a/setup-sh7722.c |   21 +++--
 include/asm-sh/hw_irq.h                |   25 ++++++
 include/asm-sh/irq.h                   |   30 -------
 include/asm-sh/sh03/io.h               |    4 -
 include/asm-sh/snapgear.h              |    4 -
 20 files changed, 431 insertions(+), 326 deletions(-)

--- 0001/arch/sh/boards/se/770x/irq.c
+++ work/arch/sh/boards/se/770x/irq.c	2007-06-15 16:49:54.000000000 +0900
@@ -15,46 +15,7 @@
 #include <asm/io.h>
 #include <asm/se.h>
 
-/* 
- * If the problem of make_ipr_irq is solved, 
- * this code will become unnecessary. :-) 
- */
-static void se770x_disable_ipr_irq(unsigned int irq)
-{
-	struct ipr_data *p = get_irq_chip_data(irq);
-
-	ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr);
-}
-
-static void se770x_enable_ipr_irq(unsigned int irq)
-{
-	struct ipr_data *p = get_irq_chip_data(irq);
-
-	ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr);
-}
-
-static struct irq_chip se770x_irq_chip = {
-	.name           = "MS770xSE-FPGA",
-	.mask           = se770x_disable_ipr_irq,
-	.unmask         = se770x_enable_ipr_irq,
-	.mask_ack       = se770x_disable_ipr_irq,
-};
-
-void make_se770x_irq(struct ipr_data *table, unsigned int nr_irqs)
-{
-	int i;
-
-	for (i = 0; i < nr_irqs; i++) {
-		unsigned int irq = table[i].irq;
-		disable_irq_nosync(irq);
-		set_irq_chip_and_handler_name(irq, &se770x_irq_chip,
-			handle_level_irq, "level");
-		set_irq_chip_data(irq, &table[i]);
-		se770x_enable_ipr_irq(irq);
-	}
-}
-
-static struct ipr_data se770x_ipr_map[] = {
+static struct ipr_data ipr_irq_table[] = {
 	/*
 	* Super I/O (Just mimic PC):
 	*  1: keyboard
@@ -68,46 +29,67 @@ static struct ipr_data se770x_ipr_map[] 
 	*/
 #if defined(CONFIG_CPU_SUBTYPE_SH7705)
 	/* This is default value */
-	{ 13, 0, 8,  0x0f-13 ,BCR_ILCRA},
-	{ 5 , 0, 4,  0x0f- 5 ,BCR_ILCRA},
-	{ 10, 0, 0,  0x0f-10, BCR_ILCRB},
-	{ 7 , 0, 4,  0x0f- 7, BCR_ILCRC},
-	{ 3 , 0, 0,  0x0f- 3, BCR_ILCRC},
-	{ 1 , 0, 12, 0x0f- 1, BCR_ILCRD},
-	{ 12, 0, 4,  0x0f-12, BCR_ILCRD}, /* LAN */
-	{ 2 , 0, 8,  0x0f- 2, BCR_ILCRE}, /* PCIRQ2 */
-	{ 6 , 0, 4,  0x0f- 6, BCR_ILCRE}, /* PCIRQ1 */
-	{ 14, 0, 0,  0x0f-14, BCR_ILCRE}, /* PCIRQ0 */
-	{ 0 , 0, 12, 0x0f   , BCR_ILCRF}, 
-	{ 4 , 0, 4,  0x0f- 4, BCR_ILCRF},
-	{ 8 , 0, 12, 0x0f- 8, BCR_ILCRG},
-	{ 9 , 0, 8,  0x0f- 9, BCR_ILCRG},
-	{ 11, 0, 4,  0x0f-11, BCR_ILCRG},
+	{ 13, 0, 8,  0x0f-13, },
+	{ 5 , 0, 4,  0x0f- 5, },
+	{ 10, 1, 0,  0x0f-10, },
+	{ 7 , 2, 4,  0x0f- 7, },
+	{ 3 , 2, 0,  0x0f- 3, },
+	{ 1 , 3, 12, 0x0f- 1, },
+	{ 12, 3, 4,  0x0f-12, }, /* LAN */
+	{ 2 , 4, 8,  0x0f- 2, }, /* PCIRQ2 */
+	{ 6 , 4, 4,  0x0f- 6, }, /* PCIRQ1 */
+	{ 14, 4, 0,  0x0f-14, }, /* PCIRQ0 */
+	{ 0 , 5, 12, 0x0f   , }, 
+	{ 4 , 5, 4,  0x0f- 4, },
+	{ 8 , 6, 12, 0x0f- 8, },
+	{ 9 , 6, 8,  0x0f- 9, },
+	{ 11, 6, 4,  0x0f-11, },
 #else
-	{ 14, 0,  8, 0x0f-14 ,BCR_ILCRA},
-	{ 12, 0,  4, 0x0f-12 ,BCR_ILCRA},
-	{  8, 0,  4, 0x0f- 8 ,BCR_ILCRB},
-	{  6, 0, 12, 0x0f- 6 ,BCR_ILCRC},
-	{  5, 0,  8, 0x0f- 5 ,BCR_ILCRC},
-	{  4, 0,  4, 0x0f- 4 ,BCR_ILCRC},
-	{  3, 0,  0, 0x0f- 3 ,BCR_ILCRC},
-	{  1, 0, 12, 0x0f- 1 ,BCR_ILCRD},
+	{ 14, 0,  8, 0x0f-14, },
+	{ 12, 0,  4, 0x0f-12, },
+	{  8, 1,  4, 0x0f- 8, },
+	{  6, 2, 12, 0x0f- 6, },
+	{  5, 2,  8, 0x0f- 5, },
+	{  4, 2,  4, 0x0f- 4, },
+	{  3, 2,  0, 0x0f- 3, },
+	{  1, 3, 12, 0x0f- 1, },
 #if defined(CONFIG_STNIC)
 	/* ST NIC */
-	{ 10, 0,  4, 0x0f-10 ,BCR_ILCRD}, 	/* LAN */
+	{ 10, 3,  4, 0x0f-10, }, 	/* LAN */
 #endif
 	/* MRSHPC IRQs setting */
-	{  0, 0, 12, 0x0f- 0 ,BCR_ILCRE},	/* PCIRQ3 */
-	{ 11, 0,  8, 0x0f-11 ,BCR_ILCRE}, 	/* PCIRQ2 */
-	{  9, 0,  4, 0x0f- 9 ,BCR_ILCRE}, 	/* PCIRQ1 */
-	{  7, 0,  0, 0x0f- 7 ,BCR_ILCRE}, 	/* PCIRQ0 */
+	{  0, 4, 12, 0x0f- 0, },	/* PCIRQ3 */
+	{ 11, 4,  8, 0x0f-11, }, 	/* PCIRQ2 */
+	{  9, 4,  4, 0x0f- 9, }, 	/* PCIRQ1 */
+	{  7, 4,  0, 0x0f- 7, }, 	/* PCIRQ0 */
 	/* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
 	/* NOTE: #2 and #13 are not used on PC */
-	{ 13, 0,  4, 0x0f-13 ,BCR_ILCRG}, 	/* SLOTIRQ2 */
-	{  2, 0,  0, 0x0f- 2 ,BCR_ILCRG}, 	/* SLOTIRQ1 */
+	{ 13, 6,  4, 0x0f-13, }, 	/* SLOTIRQ2 */
+	{  2, 6,  0, 0x0f- 2, }, 	/* SLOTIRQ1 */
 #endif
 };
 
+static unsigned long ipr_offsets[] = {
+	BCR_ILCRA,
+	BCR_ILCRB,
+	BCR_ILCRC,
+	BCR_ILCRD,
+	BCR_ILCRE,
+	BCR_ILCRF,
+	BCR_ILCRG,
+};
+
+static struct ipr_desc ipr_irq_desc = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
+
+	.ipr_data	= ipr_irq_table,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
+	.chip = {
+		.name	= "IPR-se770x",
+	},
+};
+
 /*
  * Initialize IRQ setting
  */
@@ -122,5 +104,5 @@ void __init init_se_IRQ(void)
 	ctrl_outw(0, BCR_ILCRF);
 	ctrl_outw(0, BCR_ILCRG);
 
-	make_se770x_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map));
+	register_ipr_controller(&ipr_irq_desc);
 }
--- 0001/arch/sh/boards/se/7722/irq.c
+++ work/arch/sh/boards/se/7722/irq.c	2007-06-15 18:12:20.000000000 +0900
@@ -19,15 +19,24 @@
 #define INTC_INTMSK0             0xFFD00044
 #define INTC_INTMSKCLR0          0xFFD00064
 
+struct se7722_data {
+	unsigned char irq;
+	unsigned char ipr_idx;
+	unsigned char shift;
+	unsigned short priority;
+	unsigned long addr;
+};
+
+
 static void disable_se7722_irq(unsigned int irq)
 {
-	struct ipr_data *p = get_irq_chip_data(irq);
+	struct se7722_data *p = get_irq_chip_data(irq);
 	ctrl_outw( ctrl_inw( p->addr ) | p->priority , p->addr );
 }
 
 static void enable_se7722_irq(unsigned int irq)
 {
-	struct ipr_data *p = get_irq_chip_data(irq);
+	struct se7722_data *p = get_irq_chip_data(irq);
 	ctrl_outw( ctrl_inw( p->addr ) & ~p->priority , p->addr );
 }
 
@@ -38,7 +47,7 @@ static struct irq_chip se7722_irq_chip _
 	.mask_ack       = disable_se7722_irq,
 };
 
-static struct ipr_data ipr_irq_table[] = {
+static struct se7722_data ipr_irq_table[] = {
 	/* irq        ,idx,sft, priority     , addr   */
 	{ MRSHPC_IRQ0 , 0 , 0 , MRSHPC_BIT0 , IRQ01_MASK } ,
 	{ MRSHPC_IRQ1 , 0 , 0 , MRSHPC_BIT1 , IRQ01_MASK } ,
--- 0001/arch/sh/boards/se/7751/irq.c
+++ work/arch/sh/boards/se/7751/irq.c	2007-06-15 16:49:54.000000000 +0900
@@ -14,44 +14,31 @@
 #include <asm/irq.h>
 #include <asm/se7751.h>
 
-static struct ipr_data se7751_ipr_map[] = {
-  /* Leave old Solution Engine code in for reference. */
-#if defined(CONFIG_SH_SOLUTION_ENGINE)
-	/*
-	 * Super I/O (Just mimic PC):
-	 *  1: keyboard
-	 *  3: serial 0
-	 *  4: serial 1
-	 *  5: printer
-	 *  6: floppy
-	 *  8: rtc
-	 * 12: mouse
-	 * 14: ide0
-	 */
-	{ 14, BCR_ILCRA, 2, 0x0f-14 },
-	{ 12, BCR_ILCRA, 1, 0x0f-12 },
-	{  8, BCR_ILCRB, 1, 0x0f- 8 },
-	{  6, BCR_ILCRC, 3, 0x0f- 6 },
-	{  5, BCR_ILCRC, 2, 0x0f- 5 },
-	{  4, BCR_ILCRC, 1, 0x0f- 4 },
-	{  3, BCR_ILCRC, 0, 0x0f- 3 },
-	{  1, BCR_ILCRD, 3, 0x0f- 1 },
-
-	{ 10, BCR_ILCRD, 1, 0x0f-10 }, /* LAN */
-
-	{  0, BCR_ILCRE, 3, 0x0f- 0 }, /* PCIRQ3 */
-	{ 11, BCR_ILCRE, 2, 0x0f-11 }, /* PCIRQ2 */
-	{  9, BCR_ILCRE, 1, 0x0f- 9 }, /* PCIRQ1 */
-	{  7, BCR_ILCRE, 0, 0x0f- 7 }, /* PCIRQ0 */
-
-	/* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
-	/* NOTE: #2 and #13 are not used on PC */
-	{ 13, BCR_ILCRG, 1, 0x0f-13 }, /* SLOTIRQ2 */
-	{  2, BCR_ILCRG, 0, 0x0f- 2 }, /* SLOTIRQ1 */
-#elif defined(CONFIG_SH_7751_SOLUTION_ENGINE)
-	{ 13, BCR_ILCRD, 3, 2 },
+static struct ipr_data ipr_irq_table[] = {
+	{ 13, 3, 3, 2 },
 	/* Add additional entries here as drivers are added and tested. */
-#endif
+};
+
+static unsigned long ipr_offsets[] = {
+	BCR_ILCRA,
+	BCR_ILCRB,
+	BCR_ILCRC,
+	BCR_ILCRD,
+	BCR_ILCRE,
+	BCR_ILCRF,
+	BCR_ILCRG,
+};
+
+static struct ipr_desc ipr_irq_desc = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
+
+	.ipr_data	= ipr_irq_table,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
+
+	.chip = {
+		.name	= "IPR-se7751",
+	},
 };
 
 /*
@@ -59,5 +46,5 @@ static struct ipr_data se7751_ipr_map[] 
  */
 void __init init_7751se_IRQ(void)
 {
-	make_ipr_irq(se7751_ipr_map, ARRAY_SIZE(se7751_ipr_map));
+	register_ipr_controller(&ipr_irq_desc);
 }
--- 0001/arch/sh/boards/sh03/setup.c
+++ work/arch/sh/boards/sh03/setup.c	2007-06-15 16:49:54.000000000 +0900
@@ -15,17 +15,33 @@
 #include <asm/sh03/sh03.h>
 #include <asm/addrspace.h>
 
-static struct ipr_data sh03_ipr_map[] = {
-	{ IRL0_IRQ, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY },
-	{ IRL1_IRQ, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY },
-	{ IRL2_IRQ, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY },
-	{ IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY },
+static struct ipr_data ipr_irq_table[] = {
+	{ IRL0_IRQ, 0, IRL0_IPR_POS, IRL0_PRIORITY },
+	{ IRL1_IRQ, 0, IRL1_IPR_POS, IRL1_PRIORITY },
+	{ IRL2_IRQ, 0, IRL2_IPR_POS, IRL2_PRIORITY },
+	{ IRL3_IRQ, 0, IRL3_IPR_POS, IRL3_PRIORITY },
+};
+
+static unsigned long ipr_offsets[] = {
+	INTC_IPRD,
+};
+
+static struct ipr_desc ipr_irq_desc = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
+
+	.ipr_data	= ipr_irq_table,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
+
+	.chip = {
+		.name	= "IPR-sh03",
+	},
 };
 
 static void __init init_sh03_IRQ(void)
 {
 	ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
-	make_ipr_irq(sh03_ipr_map, ARRAY_SIZE(sh03_ipr_map));
+	register_ipr_controller(&ipr_irq_desc);
 }
 
 extern void *cf_io_base;
--- 0001/arch/sh/boards/shmin/setup.c
+++ work/arch/sh/boards/shmin/setup.c	2007-06-15 17:23:10.000000000 +0900
@@ -6,28 +6,44 @@
  * SHMIN Support.
  */
 #include <linux/init.h>
+#include <linux/irq.h>
 #include <asm/machvec.h>
 #include <asm/shmin.h>
 #include <asm/clock.h>
-#include <asm/irq.h>
 #include <asm/io.h>
 
 #define PFC_PHCR	0xa400010eUL
 #define INTC_ICR1	0xa4000010UL
 #define INTC_IPRC	0xa4000016UL
 
-static struct ipr_data shmin_ipr_map[] = {
-	{ .irq=32, .addr=INTC_IPRC, .shift= 0, .priority=0 },
-	{ .irq=33, .addr=INTC_IPRC, .shift= 4, .priority=0 },
-	{ .irq=34, .addr=INTC_IPRC, .shift= 8, .priority=8 },
-	{ .irq=35, .addr=INTC_IPRC, .shift=12, .priority=0 },
+static struct ipr_data ipr_irq_table[] = {
+	{ 32, 0, 0, 0 },
+	{ 33, 0, 4, 0 },
+	{ 34, 0, 8, 8 },
+	{ 35, 0, 12, 0 },
+};
+
+static unsigned long ipr_offsets[] = {
+	INTC_IPRC,
+};
+
+static struct ipr_desc ipr_irq_desc = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
+
+	.ipr_data	= ipr_irq_table,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
+
+	.chip = {
+		.name	= "IPR-shmin",
+	},
 };
 
 static void __init init_shmin_irq(void)
 {
 	ctrl_outw(0x2a00, PFC_PHCR);	// IRQ0-3=IRQ
 	ctrl_outw(0x0aaa, INTC_ICR1);	// IRQ0-3=IRQ-mode,Low-active.
-	make_ipr_irq(shmin_ipr_map, ARRAY_SIZE(shmin_ipr_map));
+	register_ipr_controller(&ipr_irq_desc);
 }
 
 static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size)
--- 0001/arch/sh/boards/snapgear/setup.c
+++ work/arch/sh/boards/snapgear/setup.c	2007-06-15 16:49:54.000000000 +0900
@@ -68,11 +68,27 @@ module_init(eraseconfig_init);
  * IRL3 = crypto
  */
 
-static struct ipr_data snapgear_ipr_map[] = {
-	make_ipr_irq(IRL0_IRQ, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY);
-	make_ipr_irq(IRL1_IRQ, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY);
-	make_ipr_irq(IRL2_IRQ, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY);
-	make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY);
+static struct ipr_data ipr_irq_table[] = {
+	{ IRL0_IRQ, 0, IRL0_IPR_POS, IRL0_PRIORITY },
+	{ IRL1_IRQ, 0, IRL1_IPR_POS, IRL1_PRIORITY },
+	{ IRL2_IRQ, 0, IRL2_IPR_POS, IRL2_PRIORITY },
+	{ IRL3_IRQ, 0, IRL3_IPR_POS, IRL3_PRIORITY },
+};
+
+static unsigned long ipr_offsets[] = {
+	INTC_IPRD,
+};
+
+static struct ipr_desc ipr_irq_desc = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
+
+	.ipr_data	= ipr_irq_table,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
+
+	.chip = {
+		.name	= "IPR-snapgear",
+	},
 };
 
 static void __init init_snapgear_IRQ(void)
@@ -82,7 +98,7 @@ static void __init init_snapgear_IRQ(voi
 
 	printk("Setup SnapGear IRQ/IPR ...\n");
 
-	make_ipr_irq(snapgear_ipr_map, ARRAY_SIZE(snapgear_ipr_map));
+	register_ipr_controller(&ipr_irq_desc);
 }
 
 /*
--- 0001/arch/sh/boards/titan/setup.c
+++ work/arch/sh/boards/titan/setup.c	2007-06-15 16:49:54.000000000 +0900
@@ -12,7 +12,7 @@
 #include <asm/titan.h>
 #include <asm/io.h>
 
-static struct ipr_data titan_ipr_map[] = {
+static struct ipr_data ipr_irq_table[] = {
 	/* IRQ, IPR idx, shift, prio */
 	{ TITAN_IRQ_WAN,   3, 12, 8 },	/* eth0 (WAN) */
 	{ TITAN_IRQ_LAN,   3,  8, 8 },	/* eth1 (LAN) */
@@ -20,12 +20,30 @@ static struct ipr_data titan_ipr_map[] =
 	{ TITAN_IRQ_USB,   3,  0, 8 },	/* mPCI B (bottom), USB */
 };
 
+static unsigned long ipr_offsets[] = { /* stolen from setup-sh7750.c */
+	0xffd00004UL,	/* 0: IPRA */
+	0xffd00008UL,	/* 1: IPRB */
+	0xffd0000cUL,	/* 2: IPRC */
+	0xffd00010UL,	/* 3: IPRD */
+};
+
+static struct ipr_desc ipr_irq_desc = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
+
+	.ipr_data	= ipr_irq_table,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
+
+	.chip = {
+		.name	= "IPR-titan",
+	},
+};
 static void __init init_titan_irq(void)
 {
 	/* enable individual interrupt mode for externals */
 	ipr_irq_enable_irlm();
 	/* register ipr irqs */
-	make_ipr_irq(titan_ipr_map, ARRAY_SIZE(titan_ipr_map));
+	register_ipr_controller(&ipr_irq_desc);
 }
 
 static struct sh_machine_vector mv_titan __initmv = {
--- 0001/arch/sh/kernel/cpu/irq/ipr.c
+++ work/arch/sh/kernel/cpu/irq/ipr.c	2007-06-15 16:49:54.000000000 +0900
@@ -22,58 +22,57 @@
 #include <linux/io.h>
 #include <linux/interrupt.h>
 
+static inline struct ipr_desc *get_ipr_desc(unsigned int irq)
+{
+	struct irq_chip *chip = get_irq_chip(irq);
+	return (void *)((char *)chip - offsetof(struct ipr_desc, chip));
+}
+
 static void disable_ipr_irq(unsigned int irq)
 {
 	struct ipr_data *p = get_irq_chip_data(irq);
+	unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
 	/* Set the priority in IPR to 0 */
-	ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr);
+	ctrl_outw(ctrl_inw(addr) & (0xffff ^ (0xf << p->shift)), addr);
 }
 
 static void enable_ipr_irq(unsigned int irq)
 {
 	struct ipr_data *p = get_irq_chip_data(irq);
+	unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
 	/* Set priority in IPR back to original value */
-	ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr);
+	ctrl_outw(ctrl_inw(addr) | (p->priority << p->shift), addr);
 }
 
-static struct irq_chip ipr_irq_chip = {
-	.name		= "IPR",
-	.mask		= disable_ipr_irq,
-	.unmask		= enable_ipr_irq,
-	.mask_ack	= disable_ipr_irq,
-};
+/*
+ * The shift value is now the number of bits to shift, not the number of
+ * bits/4. This is to make it easier to read the value directly from the
+ * datasheets. The IPR address is calculated using the ipr_offset table.
+ */
 
-unsigned int map_ipridx_to_addr(int idx) __attribute__ ((weak));
-unsigned int map_ipridx_to_addr(int idx)
-{
-	return 0;
-}
-
-void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs)
+void register_ipr_controller(struct ipr_desc *desc)
 {
 	int i;
 
-	for (i = 0; i < nr_irqs; i++) {
-		unsigned int irq = table[i].irq;
+	desc->chip.mask = disable_ipr_irq;
+	desc->chip.unmask = enable_ipr_irq;
+	desc->chip.mask_ack = disable_ipr_irq;
 
-		if (!irq)
-			irq = table[i].irq = i;
+	for (i = 0; i < desc->nr_irqs; i++) {
+		struct ipr_data *p = desc->ipr_data + i;
 
-		/* could the IPR index be mapped, if not we ignore this */
-		if (!table[i].addr) {
-			table[i].addr = map_ipridx_to_addr(table[i].ipr_idx);
-			if (!table[i].addr)
-				continue;
-		}
+		BUG_ON(p->ipr_idx >= desc->nr_offsets);
+		BUG_ON(!desc->ipr_offsets[p->ipr_idx]);
 
-		disable_irq_nosync(irq);
-		set_irq_chip_and_handler_name(irq, &ipr_irq_chip,
+		disable_irq_nosync(p->irq);
+		set_irq_chip_and_handler_name(p->irq, &desc->chip,
 				      handle_level_irq, "level");
-		set_irq_chip_data(irq, &table[i]);
-		enable_ipr_irq(irq);
+		set_irq_chip_data(p->irq, p);
+		disable_ipr_irq(p->irq);
 	}
 }
-EXPORT_SYMBOL(make_ipr_irq);
+
+EXPORT_SYMBOL(register_ipr_controller);
 
 #if !defined(CONFIG_CPU_HAS_PINT_IRQ)
 int ipr_irq_demux(int irq)
--- 0001/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ work/arch/sh/kernel/cpu/sh2/setup-sh7619.c	2007-06-15 17:54:44.000000000 +0900
@@ -52,7 +52,7 @@ static int __init sh7619_devices_setup(v
 }
 __initcall(sh7619_devices_setup);
 
-static struct ipr_data sh7619_ipr_map[] = {
+static struct ipr_data ipr_irq_table[] = {
 	{ 86, 0,  4, 2 },	/* CMI0 */
 	{ 88, 1, 12, 3 },	/* SCIF0_ERI */
 	{ 89, 1, 12, 3 },	/* SCIF0_RXI */
@@ -68,7 +68,7 @@ static struct ipr_data sh7619_ipr_map[] 
 	{ 99, 1,  4, 3 },	/* SCIF2_TXI */
 };
 
-static unsigned int ipr_offsets[] = {
+static unsigned long ipr_offsets[] = {
 	0xf8080000,	/* IPRC */
 	0xf8080002,	/* IPRD */
 	0xf8080004,	/* IPRE */
@@ -76,15 +76,19 @@ static unsigned int ipr_offsets[] = {
 	0xf8080008,	/* IPRG */
 };
 
-/* given the IPR index return the address of the IPR register */
-unsigned int map_ipridx_to_addr(int idx)
-{
-	if (unlikely(idx >= ARRAY_SIZE(ipr_offsets)))
-		return 0;
-	return ipr_offsets[idx];
-}
+static struct ipr_desc ipr_irq_desc = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
+
+	.ipr_data	= ipr_irq_table,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
+
+	.chip = {
+		.name	= "IPR-sh7619",
+	},
+};
 
 void __init init_IRQ_ipr(void)
 {
-	make_ipr_irq(sh7619_ipr_map, ARRAY_SIZE(sh7619_ipr_map));
+	register_ipr_controller(&ipr_irq_desc);
 }
--- 0001/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ work/arch/sh/kernel/cpu/sh2a/setup-sh7206.c	2007-06-15 18:00:20.000000000 +0900
@@ -57,7 +57,7 @@ static int __init sh7206_devices_setup(v
 }
 __initcall(sh7206_devices_setup);
 
-static struct ipr_data sh7206_ipr_map[] = {
+static struct ipr_data ipr_irq_table[] = {
 	{ 140,  7, 12, 2 },	/* CMI0 */
 	{ 164,  8,  4, 2 },	/* MTU2_TGI1A */
 	{ 240, 13, 12, 3 },	/* SCIF0_BRI */
@@ -78,7 +78,7 @@ static struct ipr_data sh7206_ipr_map[] 
 	{ 255, 13,  0, 3 },	/* SCIF3_TXI */
 };
 
-static unsigned int ipr_offsets[] = {
+static unsigned long ipr_offsets[] = {
 	0xfffe0818,	/* IPR01 */
 	0xfffe081a,	/* IPR02 */
 	0,		/* unused */
@@ -95,15 +95,19 @@ static unsigned int ipr_offsets[] = {
 	0xfffe0c10,	/* IPR14 */
 };
 
-/* given the IPR index return the address of the IPR register */
-unsigned int map_ipridx_to_addr(int idx)
-{
-	if (unlikely(idx >= ARRAY_SIZE(ipr_offsets)))
-		return 0;
-	return ipr_offsets[idx];
-}
+static struct ipr_desc ipr_irq_desc = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
+
+	.ipr_data	= ipr_irq_table,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
+
+	.chip = {
+		.name	= "IPR-sh7206",
+	},
+};
 
 void __init init_IRQ_ipr(void)
 {
-	make_ipr_irq(sh7206_ipr_map, ARRAY_SIZE(sh7206_ipr_map));
+	register_ipr_controller(&ipr_irq_desc);
 }
--- 0001/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ work/arch/sh/kernel/cpu/sh3/setup-sh7705.c	2007-06-15 16:49:54.000000000 +0900
@@ -48,7 +48,7 @@ static int __init sh7705_devices_setup(v
 }
 __initcall(sh7705_devices_setup);
 
-static struct ipr_data sh7705_ipr_map[] = {
+static struct ipr_data ipr_irq_table[] = {
 	/* IRQ, IPR-idx, shift, priority */
 	{ 16, 0, 12, 2 }, /* TMU0 TUNI*/
 	{ 17, 0,  8, 2 }, /* TMU1 TUNI */
@@ -70,25 +70,29 @@ static struct ipr_data sh7705_ipr_map[] 
 };
 
 static unsigned long ipr_offsets[] = {
-	0xFFFFFEE2	/* 0: IPRA */
-,	0xFFFFFEE4	/* 1: IPRB */
-,	0xA4000016	/* 2: IPRC */
-,	0xA4000018	/* 3: IPRD */
-,	0xA400001A	/* 4: IPRE */
-,	0xA4080000	/* 5: IPRF */
-,	0xA4080002	/* 6: IPRG */
-,	0xA4080004	/* 7: IPRH */
+	0xFFFFFEE2,	/* 0: IPRA */
+	0xFFFFFEE4,	/* 1: IPRB */
+	0xA4000016,	/* 2: IPRC */
+	0xA4000018,	/* 3: IPRD */
+	0xA400001A,	/* 4: IPRE */
+	0xA4080000,	/* 5: IPRF */
+	0xA4080002,	/* 6: IPRG */
+	0xA4080004,	/* 7: IPRH */
 };
 
-/* given the IPR index return the address of the IPR register */
-unsigned int map_ipridx_to_addr(int idx)
-{
-	if (idx >= ARRAY_SIZE(ipr_offsets))
-		return 0;
-	return ipr_offsets[idx];
-}
+static struct ipr_desc ipr_irq_desc = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
+
+	.ipr_data	= ipr_irq_table,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
+
+	.chip = {
+		.name	= "IPR-sh7705",
+	},
+};
 
-void __init init_IRQ_ipr()
+void __init init_IRQ_ipr(void)
 {
-	make_ipr_irq(sh7705_ipr_map, ARRAY_SIZE(sh7705_ipr_map));
+	register_ipr_controller(&ipr_irq_desc);
 }
--- 0001/arch/sh/kernel/cpu/sh3/setup-sh7709.c
+++ work/arch/sh/kernel/cpu/sh3/setup-sh7709.c	2007-06-15 17:22:47.000000000 +0900
@@ -52,32 +52,66 @@ static int __init sh7709_devices_setup(v
 }
 __initcall(sh7709_devices_setup);
 
-#define IPRx(A,N)	.addr=A, .shift=N
-#define IPRA(N)	IPRx(0xfffffee2UL,N)
-#define IPRB(N)	IPRx(0xfffffee4UL,N)
-#define IPRC(N)	IPRx(0xa4000016UL,N)
-#define IPRD(N)	IPRx(0xa4000018UL,N)
-#define IPRE(N)	IPRx(0xa400001aUL,N)
-
-static struct ipr_data sh7709_ipr_map[] = {
-	[16]		= { IPRA(12), 2 }, /* TMU TUNI0 */
-	[17]		= { IPRA(8),  4 }, /* TMU TUNI1 */
-	[18 ... 19]	= { IPRA(4),  1 }, /* TMU TUNI1 */
-	[20 ... 22]	= { IPRA(0),  2 }, /* RTC CUI */
-	[23 ... 26]	= { IPRB(4),  3 }, /* SCI */
-	[27]		= { IPRB(12), 2 }, /* WDT ITI */
-	[32]		= { IPRC(0),  1 }, /* IRQ 0 */
-	[33]		= { IPRC(4),  1 }, /* IRQ 1 */
-	[34]		= { IPRC(8),  1 }, /* IRQ 2 APM */
-	[35]		= { IPRC(12), 1 }, /* IRQ 3 TOUCHSCREEN */
-	[36]		= { IPRD(0),  1 }, /* IRQ 4 */
-	[37]		= { IPRD(4),  1 }, /* IRQ 5 */
-	[48 ... 51]	= { IPRE(12), 7 }, /* DMA */
-	[52 ... 55]	= { IPRE(8),  3 }, /* IRDA */
-	[56 ... 59]	= { IPRE(4),  3 }, /* SCIF */
+static struct ipr_data ipr_irq_table[] = {
+	{ 16, 0, 12, 2 }, /* TMU TUNI0 */
+	{ 17, 0, 8,  4 }, /* TMU TUNI1 */
+	{ 18, 0, 4,  1 }, /* TMU TUNI1 */
+	{ 19, 0, 4,  1 }, /* TMU TUNI1 */
+	{ 20, 0, 0,  2 }, /* RTC CUI */
+	{ 21, 0, 0,  2 }, /* RTC CUI */
+	{ 22, 0, 0,  2 }, /* RTC CUI */
+
+	{ 23, 1, 4,  3 }, /* SCI */
+	{ 24, 1, 4,  3 }, /* SCI */
+	{ 25, 1, 4,  3 }, /* SCI */
+	{ 26, 1, 4,  3 }, /* SCI */
+	{ 27, 1, 12, 3 }, /* WDT ITI */
+
+	{ 32, 2, 0,  1 }, /* IRQ 0 */
+	{ 33, 2, 4,  1 }, /* IRQ 1 */
+	{ 34, 2, 8,  1 }, /* IRQ 2 APM */
+	{ 35, 2, 12, 1 }, /* IRQ 3 TOUCHSCREEN */
+
+	{ 36, 3, 0,  1 }, /* IRQ 4 */
+	{ 37, 3, 4,  1 }, /* IRQ 5 */
+
+	{ 48, 4, 12, 7 }, /* DMA */
+	{ 49, 4, 12, 7 }, /* DMA */
+	{ 50, 4, 12, 7 }, /* DMA */
+	{ 51, 4, 12, 7 }, /* DMA */
+
+	{ 52, 4, 8,  3 }, /* IRDA */
+	{ 53, 4, 8,  3 }, /* IRDA */
+	{ 54, 4, 8,  3 }, /* IRDA */
+	{ 55, 4, 8,  3 }, /* IRDA */
+
+	{ 56, 4, 4,  3 }, /* SCIF */
+	{ 57, 4, 4,  3 }, /* SCIF */
+	{ 58, 4, 4,  3 }, /* SCIF */
+	{ 59, 4, 4,  3 }, /* SCIF */
+};
+
+static unsigned long ipr_offsets[] = {
+	0xfffffee2,	/* 0: IPRA */
+	0xfffffee4,	/* 1: IPRB */
+	0xa4000016,	/* 2: IPRC */
+	0xa4000018,	/* 3: IPRD */
+	0xa400001a,	/* 4: IPRE */
+};
+
+static struct ipr_desc ipr_irq_desc = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
+
+	.ipr_data	= ipr_irq_table,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
+
+	.chip = {
+		.name	= "IPR-sh7709",
+	},
 };
 
-void __init init_IRQ_ipr()
+void __init init_IRQ_ipr(void)
 {
-	make_ipr_irq(sh7709_ipr_map, ARRAY_SIZE(sh7709_ipr_map));
+	register_ipr_controller(&ipr_irq_desc);
 }
--- 0001/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ work/arch/sh/kernel/cpu/sh3/setup-sh7710.c	2007-06-15 16:49:54.000000000 +0900
@@ -49,7 +49,7 @@ static int __init sh7710_devices_setup(v
 }
 __initcall(sh7710_devices_setup);
 
-static struct ipr_data sh7710_ipr_map[] = {
+static struct ipr_data ipr_irq_table[] = {
 	/* IRQ, IPR-idx, shift, priority */
 	{ 16, 0, 12, 2 }, /* TMU0 TUNI*/
 	{ 17, 0,  8, 2 }, /* TMU1 TUNI */
@@ -78,26 +78,30 @@ static struct ipr_data sh7710_ipr_map[] 
 };
 
 static unsigned long ipr_offsets[] = {
-	0xA414FEE2	/* 0: IPRA */
-,	0xA414FEE4	/* 1: IPRB */
-,	0xA4140016	/* 2: IPRC */
-,	0xA4140018	/* 3: IPRD */
-,	0xA414001A	/* 4: IPRE */
-,	0xA4080000	/* 5: IPRF */
-,	0xA4080002	/* 6: IPRG */
-,	0xA4080004	/* 7: IPRH */
-,	0xA4080006	/* 8: IPRI */
+	0xA414FEE2,	/* 0: IPRA */
+	0xA414FEE4,	/* 1: IPRB */
+	0xA4140016,	/* 2: IPRC */
+	0xA4140018,	/* 3: IPRD */
+	0xA414001A,	/* 4: IPRE */
+	0xA4080000,	/* 5: IPRF */
+	0xA4080002,	/* 6: IPRG */
+	0xA4080004,	/* 7: IPRH */
+	0xA4080006,	/* 8: IPRI */
 };
 
-/* given the IPR index return the address of the IPR register */
-unsigned int map_ipridx_to_addr(int idx)
-{
-	if (idx >= ARRAY_SIZE(ipr_offsets))
-		return 0;
-	return ipr_offsets[idx];
-}
+static struct ipr_desc ipr_irq_desc = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
+
+	.ipr_data	= ipr_irq_table,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
+
+	.chip = {
+		.name	= "IPR-sh7710",
+	},
+};
 
-void __init init_IRQ_ipr()
+void __init init_IRQ_ipr(void)
 {
-	make_ipr_irq(sh7710_ipr_map, ARRAY_SIZE(sh7710_ipr_map));
+	register_ipr_controller(&ipr_irq_desc);
 }
--- 0001/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ work/arch/sh/kernel/cpu/sh4/setup-sh7750.c	2007-06-15 16:49:54.000000000 +0900
@@ -82,7 +82,7 @@ static int __init sh7750_devices_setup(v
 }
 __initcall(sh7750_devices_setup);
 
-static struct ipr_data sh7750_ipr_map[] = {
+static struct ipr_data ipr_irq_table[] = {
 	/* IRQ, IPR-idx, shift, priority */
 	{ 16, 0, 12, 2 }, /* TMU0 TUNI*/
 	{ 17, 0, 12, 2 }, /* TMU1 TUNI */
@@ -106,8 +106,27 @@ static struct ipr_data sh7750_ipr_map[] 
 	{ 38, 2,  8, 7 }, /* DMAC DMAE */
 };
 
+static unsigned long ipr_offsets[] = {
+	0xffd00004UL,	/* 0: IPRA */
+	0xffd00008UL,	/* 1: IPRB */
+	0xffd0000cUL,	/* 2: IPRC */
+	0xffd00010UL,	/* 3: IPRD */
+};
+
+static struct ipr_desc ipr_irq_desc = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
+
+	.ipr_data	= ipr_irq_table,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
+
+	.chip = {
+		.name	= "IPR-sh7750",
+	},
+};
+
 #ifdef CONFIG_CPU_SUBTYPE_SH7751
-static struct ipr_data sh7751_ipr_map[] = {
+static struct ipr_data ipr_irq_table_sh7751[] = {
 	{ 44, 2,  8, 7 }, /* DMAC DMTE4 */
 	{ 45, 2,  8, 7 }, /* DMAC DMTE5 */
 	{ 46, 2,  8, 7 }, /* DMAC DMTE6 */
@@ -118,21 +137,26 @@ static struct ipr_data sh7751_ipr_map[] 
 	/*{ 72, INTPRI00,  8, ? },*/ /* TMU3 TUNI */
 	/*{ 76, INTPRI00, 12, ? },*/ /* TMU4 TUNI */
 };
-#endif
 
-static unsigned long ipr_offsets[] = {
-	0xffd00004UL,	/* 0: IPRA */
-	0xffd00008UL,	/* 1: IPRB */
-	0xffd0000cUL,	/* 2: IPRC */
-	0xffd00010UL,	/* 3: IPRD */
+static struct ipr_desc ipr_irq_desc_sh7751 = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
+
+	.ipr_data	= ipr_irq_table_sh7751,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table_sh7751),
+
+	.chip = {
+		.name	= "IPR-sh7751",
+	},
 };
+#endif
 
-/* given the IPR index return the address of the IPR register */
-unsigned int map_ipridx_to_addr(int idx)
+void __init init_IRQ_ipr(void)
 {
-	if (idx >= ARRAY_SIZE(ipr_offsets))
-		return 0;
-	return ipr_offsets[idx];
+	register_ipr_controller(&ipr_irq_desc);
+#ifdef CONFIG_CPU_SUBTYPE_SH7751
+	register_ipr_controller(&ipr_irq_desc_sh7751);
+#endif
 }
 
 #define INTC_ICR	0xffd00000UL
@@ -143,11 +167,3 @@ void ipr_irq_enable_irlm(void)
 {
 	ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
 }
-
-void __init init_IRQ_ipr()
-{
-	make_ipr_irq(sh7750_ipr_map, ARRAY_SIZE(sh7750_ipr_map));
-#ifdef CONFIG_CPU_SUBTYPE_SH7751
-	make_ipr_irq(sh7751_ipr_map, ARRAY_SIZE(sh7751_ipr_map));
-#endif
-}
--- 0002/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ work/arch/sh/kernel/cpu/sh4/setup-sh7760.c	2007-06-15 16:49:54.000000000 +0900
@@ -109,7 +109,12 @@ static struct intc2_desc intc2_irq_desc 
 	},
 };
 
-static struct ipr_data sh7760_ipr_map[] = {
+void __init init_IRQ_intc2(void)
+{
+	register_intc2_controller(&intc2_irq_desc);
+}
+
+static struct ipr_data ipr_irq_table[] = {
 	/* IRQ, IPR-idx, shift, priority */
 	{ 16, 0, 12, 2 }, /* TMU0 TUNI*/
 	{ 17, 0,  8, 2 }, /* TMU1 TUNI */
@@ -146,20 +151,19 @@ static unsigned long ipr_offsets[] = {
 	0xffd00010UL,	/* 3: IPRD */
 };
 
-/* given the IPR index return the address of the IPR register */
-unsigned int map_ipridx_to_addr(int idx)
-{
-	if (idx >= ARRAY_SIZE(ipr_offsets))
-		return 0;
-	return ipr_offsets[idx];
-}
+static struct ipr_desc ipr_irq_desc = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
 
-void __init init_IRQ_intc2(void)
-{
-	register_intc2_controller(&intc2_irq_desc);
-}
+	.ipr_data	= ipr_irq_table,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
+
+	.chip = {
+		.name	= "IPR-sh7760",
+	},
+};
 
-void __init  init_IRQ_ipr(void)
+void __init init_IRQ_ipr(void)
 {
-	make_ipr_irq(sh7760_ipr_map, ARRAY_SIZE(sh7760_ipr_map));
+	register_ipr_controller(&ipr_irq_desc);
 }
--- 0001/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ work/arch/sh/kernel/cpu/sh4a/setup-sh7722.c	2007-06-15 16:49:54.000000000 +0900
@@ -44,7 +44,7 @@ static int __init sh7722_devices_setup(v
 }
 __initcall(sh7722_devices_setup);
 
-static struct ipr_data sh7722_ipr_map[] = {
+static struct ipr_data ipr_irq_table[] = {
 	/* IRQ, IPR-idx, shift, prio */
 	{ 16, 0, 12, 2 }, /* TMU0 */
 	{ 17, 0,  8, 2 }, /* TMU1 */
@@ -69,16 +69,21 @@ static unsigned long ipr_offsets[] = {
 	0xa408002c, /* 11: IPRL */
 };
 
-unsigned int map_ipridx_to_addr(int idx)
-{
-	if (unlikely(idx >= ARRAY_SIZE(ipr_offsets)))
-		return 0;
-	return ipr_offsets[idx];
-}
+static struct ipr_desc ipr_irq_desc = {
+	.ipr_offsets	= ipr_offsets,
+	.nr_offsets	= ARRAY_SIZE(ipr_offsets),
+
+	.ipr_data	= ipr_irq_table,
+	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
+
+	.chip = {
+		.name	= "IPR-sh7722",
+	},
+};
 
 void __init init_IRQ_ipr(void)
 {
-	make_ipr_irq(sh7722_ipr_map, ARRAY_SIZE(sh7722_ipr_map));
+	register_ipr_controller(&ipr_irq_desc);
 }
 
 void __init plat_mem_setup(void)
--- 0002/include/asm-sh/hw_irq.h
+++ work/include/asm-sh/hw_irq.h	2007-06-15 16:49:54.000000000 +0900
@@ -24,4 +24,29 @@ struct intc2_desc {
 void register_intc2_controller(struct intc2_desc *);
 void init_IRQ_intc2(void);
 
+struct ipr_data {
+	unsigned char irq;
+	unsigned char ipr_idx;		/* Index for the IPR registered */
+	unsigned char shift;		/* Number of bits to shift the data */
+	unsigned char priority;		/* The priority */
+};
+
+struct ipr_desc {
+	unsigned long *ipr_offsets;
+	unsigned int nr_offsets;
+	struct ipr_data *ipr_data;
+	unsigned int nr_irqs;
+	struct irq_chip chip;
+};
+
+void register_ipr_controller(struct ipr_desc *);
+void init_IRQ_ipr(void);
+
+/*
+ * Enable individual interrupt mode for external IPR IRQs.
+ */
+void ipr_irq_enable_irlm(void);
+
+
+
 #endif /* __ASM_SH_HW_IRQ_H */
--- 0002/include/asm-sh/irq.h
+++ work/include/asm-sh/irq.h	2007-06-15 16:49:54.000000000 +0900
@@ -31,37 +31,7 @@ extern unsigned short *irq_mask_register
  * PINT IRQs
  */
 void init_IRQ_pint(void);
-
-/*
- * The shift value is now the number of bits to shift, not the number of
- * bits/4. This is to make it easier to read the value directly from the
- * datasheets. The IPR address, addr, will be set from ipr_idx via the
- * map_ipridx_to_addr function.
- */
-struct ipr_data {
-	unsigned int irq;
-	int ipr_idx;		/* Index for the IPR registered */
-	int shift;		/* Number of bits to shift the data */
-	int priority;		/* The priority */
-	unsigned int addr;	/* Address of Interrupt Priority Register */
-};
-
-/*
- * Given an IPR IDX, map the value to an IPR register address.
- */
-unsigned int map_ipridx_to_addr(int idx);
-
-/*
- * Enable individual interrupt mode for external IPR IRQs.
- */
-void ipr_irq_enable_irlm(void);
-
-/*
- * Function for "on chip support modules".
- */
-void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs);
 void make_imask_irq(unsigned int irq);
-void init_IRQ_ipr(void);
 
 static inline int generic_irq_demux(int irq)
 {
--- 0001/include/asm-sh/sh03/io.h
+++ work/include/asm-sh/sh03/io.h	2007-06-15 16:49:54.000000000 +0900
@@ -14,22 +14,18 @@
 #define INTC_IPRD	0xffd00010UL
 
 #define IRL0_IRQ	2
-#define IRL0_IPR_ADDR	INTC_IPRD
 #define IRL0_IPR_POS	3
 #define IRL0_PRIORITY	13
 
 #define IRL1_IRQ	5
-#define IRL1_IPR_ADDR	INTC_IPRD
 #define IRL1_IPR_POS	2
 #define IRL1_PRIORITY	10
 
 #define IRL2_IRQ	8
-#define IRL2_IPR_ADDR	INTC_IPRD
 #define IRL2_IPR_POS	1
 #define IRL2_PRIORITY	7
 
 #define IRL3_IRQ	11
-#define IRL3_IPR_ADDR	INTC_IPRD
 #define IRL3_IPR_POS	0
 #define IRL3_PRIORITY	4
 
--- 0001/include/asm-sh/snapgear.h
+++ work/include/asm-sh/snapgear.h	2007-06-15 16:49:54.000000000 +0900
@@ -20,22 +20,18 @@
  */
 
 #define IRL0_IRQ		2
-#define IRL0_IPR_ADDR	INTC_IPRD
 #define IRL0_IPR_POS	3
 #define IRL0_PRIORITY	13
 
 #define IRL1_IRQ		5
-#define IRL1_IPR_ADDR	INTC_IPRD
 #define IRL1_IPR_POS	2
 #define IRL1_PRIORITY	10
 
 #define IRL2_IRQ		8
-#define IRL2_IPR_ADDR	INTC_IPRD
 #define IRL2_IPR_POS	1
 #define IRL2_PRIORITY	7
 
 #define IRL3_IRQ		11
-#define IRL3_IPR_ADDR	INTC_IPRD
 #define IRL3_IPR_POS	0
 #define IRL3_PRIORITY	4
 #endif

Re: rip out broken boards

[Paul M. <le...@li...>]

On Fri, Jun 15, 2007 at 04:59:05PM +0900, Magnus Damm wrote:
> Here is a list of boards that doesn't compile in the 2.6.23
> development tree [1]:
> 
> CONFIG_SH_7300_SOLUTION_ENGINE
> CONFIG_SH_73180_SOLUTION_ENGINE

Killing these off seems fine, I doubt there are any users left for any of
these.

> CONFIG_SH_7710VOIPGW
> CONFIG_SH_7343_SOLUTION_ENGINE
> 
These there are users for, but they're mostly stuck on older kernels. It
would be worth keeping them at least partially working until they've had
a chance to rebase. I also do not have hardware for the first one, so
this is fairly difficult to verify.

rip out broken boards

[Magnus D. <mag...@gm...>]

Hi everyone,

Here is a list of boards that doesn't compile in the 2.6.23
development tree [1]:

CONFIG_SH_7710VOIPGW
CONFIG_SH_7300_SOLUTION_ENGINE
CONFIG_SH_73180_SOLUTION_ENGINE
CONFIG_SH_7343_SOLUTION_ENGINE

All boards above seem to use constants related to ipr irq tables that
are nowhere to be found. Unless someone steps up and fixes this I
suggest that we rip them out from the tree. There is no point in
keeping broken boards in the tree. We can always re-add them properly
later on.

[1] http://git.kernel.org/?p=linux/kernel/git/lethal/sh-2.6.23.git;a=summary

Thanks,

/ magnus

Re: [PATCH] rework intc2 code

[Paul M. <le...@li...>]

On Thu, Jun 14, 2007 at 09:15:36PM +0900, Magnus Damm wrote:
> sh: rework intc2 code
> 
> The shared intc2 code currently contains cpu-specific #ifdefs. This is a tad
> unclean and it prevents us from using the shared code to drive board-specific
> irqs on the se7780 board. 
> 
> This patch reworks the intc2 code by moving the base addresses of the intc2
> registers into struct intc2_desc. This new structure also contains the name
> of the controller in struct irq_chip. The idea behind putting struct irq_chip
> in there is that we can use offsetof() to locate the base addresses in the
> irq_chip callbacks.
> 
> One logic change has been made - the original shared intc2 code enabled the
> interrupts by default but with this patch they are all disabled by default.
> 
> Signed-off-by: Magnus Damm <da...@ig...>
> 
Applied, thanks.

[PATCH] rework intc2 code

[Magnus D. <mag...@gm...>]

sh: rework intc2 code

The shared intc2 code currently contains cpu-specific #ifdefs. This is a tad
unclean and it prevents us from using the shared code to drive board-specific
irqs on the se7780 board. 

This patch reworks the intc2 code by moving the base addresses of the intc2
registers into struct intc2_desc. This new structure also contains the name
of the controller in struct irq_chip. The idea behind putting struct irq_chip
in there is that we can use offsetof() to locate the base addresses in the
irq_chip callbacks.

One logic change has been made - the original shared intc2 code enabled the
interrupts by default but with this patch they are all disabled by default.

Signed-off-by: Magnus Damm <da...@ig...>

---

 Compiles for sh7760, sh7780 and sh7785. Kernel boots on a hl7780 board.

 arch/sh/boards/se/7780/irq.c           |   45 +++++++-----------------
 arch/sh/kernel/cpu/irq/intc2.c         |   60 ++++++++++++++------------------
 arch/sh/kernel/cpu/sh4/setup-sh7760.c  |   15 +++++++-
 arch/sh/kernel/cpu/sh4a/setup-sh7780.c |   15 +++++++-
 arch/sh/kernel/cpu/sh4a/setup-sh7785.c |   16 ++++++++
 include/asm-sh/hw_irq.h                |   19 ++++++++++
 include/asm-sh/irq.h                   |   10 -----
 7 files changed, 104 insertions(+), 76 deletions(-)

--- 0001/arch/sh/boards/se/7780/irq.c
+++ work/arch/sh/boards/se/7780/irq.c	2007-06-14 19:36:57.000000000 +0900
@@ -16,28 +16,6 @@
 #include <asm/io.h>
 #include <asm/se7780.h>
 
-#define INTC_INTMSK0             0xFFD00044
-#define INTC_INTMSKCLR0          0xFFD00064
-
-static void disable_se7780_irq(unsigned int irq)
-{
-	struct intc2_data *p = get_irq_chip_data(irq);
-	ctrl_outl(1 << p->msk_shift, INTC_INTMSK0 + p->msk_offset);
-}
-
-static void enable_se7780_irq(unsigned int irq)
-{
-	struct intc2_data *p = get_irq_chip_data(irq);
-	ctrl_outl(1 << p->msk_shift, INTC_INTMSKCLR0 + p->msk_offset);
-}
-
-static struct irq_chip se7780_irq_chip __read_mostly = {
-	.name           = "SE7780",
-	.mask           = disable_se7780_irq,
-	.unmask         = enable_se7780_irq,
-	.mask_ack       = disable_se7780_irq,
-};
-
 static struct intc2_data intc2_irq_table[] = {
 	{ 2,  0, 31, 0, 31, 3 }, /* daughter board EXTINT1 */
 	{ 4,  0, 30, 0, 30, 3 }, /* daughter board EXTINT2 */
@@ -51,13 +29,24 @@ static struct intc2_data intc2_irq_table
 	{ 0 , 0, 24, 0, 24, 3 }, /* SM501 */
 };
 
+static struct intc2_desc intc2_irq_desc = {
+	.prio_base	= 0, /* N/A */
+	.msk_base	= 0xffd00044,
+	.mskclr_base	= 0xffd00064,
+
+	.intc2_data	= intc2_irq_table,
+	.nr_irqs	= ARRAY_SIZE(intc2_irq_table),
+
+	.chip = {
+		.name	= "INTC2-se7780",
+	},
+};
+
 /*
  * Initialize IRQ setting
  */
 void __init init_se7780_IRQ(void)
 {
-	int i ;
-
 	/* enable all interrupt at FPGA */
 	ctrl_outw(0, FPGA_INTMSK1);
 	/* mask SM501 interrupt */
@@ -79,11 +68,5 @@ void __init init_se7780_IRQ(void)
 	/* FPGA + 0x0A */
 	ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
 
-	for (i = 0; i < ARRAY_SIZE(intc2_irq_table); i++) {
-		disable_irq_nosync(intc2_irq_table[i].irq);
-		set_irq_chip_and_handler_name( intc2_irq_table[i].irq, &se7780_irq_chip,
-			handle_level_irq, "level");
-		set_irq_chip_data( intc2_irq_table[i].irq, &intc2_irq_table[i] );
-		disable_se7780_irq(intc2_irq_table[i].irq);
-	}
+	register_intc2_controller(&intc2_irq_desc);
 }
--- 0001/arch/sh/kernel/cpu/irq/intc2.c
+++ work/arch/sh/kernel/cpu/irq/intc2.c	2007-06-14 20:10:28.000000000 +0900
@@ -14,36 +14,26 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7760)
-#define INTC2_BASE	0xfe080000
-#define INTC2_INTMSK	(INTC2_BASE + 0x40)
-#define INTC2_INTMSKCLR	(INTC2_BASE + 0x60)
-#elif defined(CONFIG_CPU_SUBTYPE_SH7780) || \
-      defined(CONFIG_CPU_SUBTYPE_SH7785)
-#define INTC2_BASE	0xffd40000
-#define INTC2_INTMSK	(INTC2_BASE + 0x38)
-#define INTC2_INTMSKCLR	(INTC2_BASE + 0x3c)
-#endif
+static inline struct intc2_desc *get_intc2_desc(unsigned int irq)
+{
+	struct irq_chip *chip = get_irq_chip(irq);
+	return (void *)((char *)chip - offsetof(struct intc2_desc, chip));
+}
 
 static void disable_intc2_irq(unsigned int irq)
 {
 	struct intc2_data *p = get_irq_chip_data(irq);
-	ctrl_outl(1 << p->msk_shift, INTC2_INTMSK + p->msk_offset);
+	struct intc2_desc *d = get_intc2_desc(irq);
+	ctrl_outl(1 << p->msk_shift, d->msk_base + p->msk_offset);
 }
 
 static void enable_intc2_irq(unsigned int irq)
 {
 	struct intc2_data *p = get_irq_chip_data(irq);
-	ctrl_outl(1 << p->msk_shift, INTC2_INTMSKCLR + p->msk_offset);
+	struct intc2_desc *d = get_intc2_desc(irq);
+	ctrl_outl(1 << p->msk_shift, d->mskclr_base + p->msk_offset);
 }
 
-static struct irq_chip intc2_irq_chip = {
-	.name		= "INTC2",
-	.mask		= disable_intc2_irq,
-	.unmask		= enable_intc2_irq,
-	.mask_ack	= disable_intc2_irq,
-};
-
 /*
  * Setup an INTC2 style interrupt.
  * NOTE: Unlike IPR interrupts, parameters are not shifted by this code,
@@ -56,30 +46,36 @@ static struct irq_chip intc2_irq_chip = 
  *
  * in the intc2_data table.
  */
-void make_intc2_irq(struct intc2_data *table, unsigned int nr_irqs)
+void register_intc2_controller(struct intc2_desc *desc)
 {
 	int i;
 
-	for (i = 0; i < nr_irqs; i++) {
+	desc->chip.mask = disable_intc2_irq;
+	desc->chip.unmask = enable_intc2_irq;
+	desc->chip.mask_ack = disable_intc2_irq;
+
+	for (i = 0; i < desc->nr_irqs; i++) {
 		unsigned long ipr, flags;
-		struct intc2_data *p = table + i;
+		struct intc2_data *p = desc->intc2_data + i;
 
 		disable_irq_nosync(p->irq);
 
-		/* Set the priority level */
-		local_irq_save(flags);
-
-		ipr = ctrl_inl(INTC2_BASE + p->ipr_offset);
-		ipr &= ~(0xf << p->ipr_shift);
-		ipr |= p->priority << p->ipr_shift;
-		ctrl_outl(ipr, INTC2_BASE + p->ipr_offset);
+		if (desc->prio_base) {
+			/* Set the priority level */
+			local_irq_save(flags);
+
+			ipr = ctrl_inl(desc->prio_base + p->ipr_offset);
+			ipr &= ~(0xf << p->ipr_shift);
+			ipr |= p->priority << p->ipr_shift;
+			ctrl_outl(ipr, desc->prio_base + p->ipr_offset);
 
-		local_irq_restore(flags);
+			local_irq_restore(flags);
+		}
 
-		set_irq_chip_and_handler_name(p->irq, &intc2_irq_chip,
+		set_irq_chip_and_handler_name(p->irq, &desc->chip,
 					      handle_level_irq, "level");
 		set_irq_chip_data(p->irq, p);
 
-		enable_intc2_irq(p->irq);
+		disable_intc2_irq(p->irq);
 	}
 }
--- 0001/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ work/arch/sh/kernel/cpu/sh4/setup-sh7760.c	2007-06-14 19:27:01.000000000 +0900
@@ -96,6 +96,19 @@ static struct intc2_data intc2_irq_table
 	{109,12,  0, 4,  0,  3},	/* CMTI */
 };
 
+static struct intc2_desc intc2_irq_desc = {
+	.prio_base	= 0xfe080000,
+	.msk_base	= 0xfe080040,
+	.mskclr_base	= 0xfe080060,
+
+	.intc2_data	= intc2_irq_table,
+	.nr_irqs	= ARRAY_SIZE(intc2_irq_table),
+
+	.chip = {
+		.name	= "INTC2-sh7760",
+	},
+};
+
 static struct ipr_data sh7760_ipr_map[] = {
 	/* IRQ, IPR-idx, shift, priority */
 	{ 16, 0, 12, 2 }, /* TMU0 TUNI*/
@@ -143,7 +156,7 @@ unsigned int map_ipridx_to_addr(int idx)
 
 void __init init_IRQ_intc2(void)
 {
-	make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));
+	register_intc2_controller(&intc2_irq_desc);
 }
 
 void __init  init_IRQ_ipr(void)
--- 0001/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ work/arch/sh/kernel/cpu/sh4a/setup-sh7780.c	2007-06-14 19:32:22.000000000 +0900
@@ -102,7 +102,20 @@ static struct intc2_data intc2_irq_table
 	{ 68, 0x14,  8, 0, 18, 2 },	/* PCIC4 */
 };
 
+static struct intc2_desc intc2_irq_desc = {
+	.prio_base	= 0xffd40000,
+	.msk_base	= 0xffd40038,
+	.mskclr_base	= 0xffd4003c,
+
+	.intc2_data	= intc2_irq_table,
+	.nr_irqs	= ARRAY_SIZE(intc2_irq_table),
+
+	.chip = {
+		.name	= "INTC2-sh7780",
+	},
+};
+
 void __init init_IRQ_intc2(void)
 {
-	make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));
+	register_intc2_controller(&intc2_irq_desc);
 }
--- 0001/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ work/arch/sh/kernel/cpu/sh4a/setup-sh7785.c	2007-06-14 19:28:13.000000000 +0900
@@ -97,7 +97,21 @@ static struct intc2_data intc2_irq_table
 	{ 60, 12, 16, 0, 7, 3 },	/* SCIF5 ERI, RXI, BRI, TXI */
 };
 
+static struct intc2_desc intc2_irq_desc = {
+	.prio_base	= 0xffd40000,
+	.msk_base	= 0xffd40038,
+	.mskclr_base	= 0xffd4003c,
+
+	.intc2_data	= intc2_irq_table,
+	.nr_irqs	= ARRAY_SIZE(intc2_irq_table),
+
+	.chip = {
+		.name	= "INTC2-sh7785",
+	},
+};
+
 void __init init_IRQ_intc2(void)
 {
-	make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));
+	register_intc2_controller(&intc2_irq_desc);
 }
+
--- 0001/include/asm-sh/hw_irq.h
+++ work/include/asm-sh/hw_irq.h	2007-06-14 20:07:35.000000000 +0900
@@ -5,4 +5,23 @@
 
 extern atomic_t irq_err_count;
 
+struct intc2_data {
+	unsigned short irq;
+	unsigned char ipr_offset, ipr_shift;
+	unsigned char msk_offset, msk_shift;
+	unsigned char priority;
+};
+
+struct intc2_desc {
+	unsigned long prio_base;
+	unsigned long msk_base;
+	unsigned long mskclr_base;
+	struct intc2_data *intc2_data;
+	unsigned int nr_irqs;
+	struct irq_chip chip;
+};
+
+void register_intc2_controller(struct intc2_desc *);
+void init_IRQ_intc2(void);
+
 #endif /* __ASM_SH_HW_IRQ_H */
--- 0001/include/asm-sh/irq.h
+++ work/include/asm-sh/irq.h	2007-06-14 20:03:14.000000000 +0900
@@ -63,16 +63,6 @@ void make_ipr_irq(struct ipr_data *table
 void make_imask_irq(unsigned int irq);
 void init_IRQ_ipr(void);
 
-struct intc2_data {
-	unsigned short irq;
-	unsigned char ipr_offset, ipr_shift;
-	unsigned char msk_offset, msk_shift;
-	unsigned char priority;
-};
-
-void make_intc2_irq(struct intc2_data *, unsigned int nr_irqs);
-void init_IRQ_intc2(void);
-
 static inline int generic_irq_demux(int irq)
 {
 	return irq;

Re: Latest stable version ?

[Carl S. <sha...@gm...>]

If you have an sh4, then there's also a well tested gcc 4.1 toolchain
and the standard user-space apps and libraries packages in RPM format
(srpms also available) at
http://www.stlinux.com/pub/stlinux/2.3ear/STLinux/

There is also the beta uClibc with NPTL threads for sh4 and glibc 2.5

Paul's been working hard recently to push the sh kernel changes into
mainline.  There is also the sh kernel GIT development trees at
http://git.kernel.org (look for the linux/kernel/git/lethal/*
projects).

Carl

On 6/5/07, Cmmn Ml <cm...@ya...> wrote:
> Hello,
>
> I'm new to sh-linux developments. Can some body please tell me what is the
> latest stable sh-linux version and the tool chain version ? and direct me to
> the place where I can get those.
>
>
> Thanks in advance...
>
> Cmmn Ml
>
>
>  ________________________________
> Moody friends. Drama queens. Your life? Nope! - their life, your story.
>  Play Sims Stories at Yahoo! Games.
>
>
> -------------------------------------------------------------------------
> This SF.net email is sponsored by DB2 Express
> Download DB2 Express C - the FREE version of DB2 express and take
> control of your XML. No limits. Just data. Click to get it now.
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> _______________________________________________
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> lin...@li...
> https://lists.sourceforge.net/lists/listinfo/linuxsh-dev
>
>

Re: [PATCH] sh: in_nmi depends on KGDB_NMI

[Paul M. <le...@li...>]

On Tue, Jun 05, 2007 at 07:23:44PM +0200, Manuel Lauss wrote:
> 
> 'in_nmi' is only available with CONFIG_KGDB_NMI.
> 
> Signed-off-by:	Manuel Lauss <ma...@ro...>
> 
Already fixed in current git, unfortunately it missed rc4, so it will be
fixed in rc5.

[PATCH] sh: in_nmi depends on KGDB_NMI

[Manuel L. <ma...@ro...>]

'in_nmi' is only available with CONFIG_KGDB_NMI.

Signed-off-by:	Manuel Lauss <ma...@ro...>

--- a/arch/sh/kernel/cpu/sh3/entry.S	2007-06-05 07:46:39.344135000 +0200
+++ d/arch/sh/kernel/cpu/sh3/entry.S	2007-06-05 10:08:29.054135000 +0200
@@ -320,7 +320,9 @@ skip_restore:
 
 	.align	2
 5:	.long	0x00001000	! DSP
-6:	.long	in_nmi
+#if defined(CONFIG_KGDB_NMI)
+6:	.long	in_nmi
+#endif
 7:	.long	0x30000000
 
 ! common exception handler

Re: Latest stable version ?

[Robert P. J. D. <rp...@mi...>]

On Tue, 5 Jun 2007, Cmmn Ml wrote:

> Hello,
>
> I'm new to sh-linux developments. Can some body please tell me what
> is the latest stable sh-linux version and the tool chain version ?
> and direct me to the place where I can get those.

you can always build a toolchain with crosstool, or there's a new
release at kpitgnutools.com.

rday
-- 
========================================================================
Robert P. J. Day
Linux Consulting, Training and Annoying Kernel Pedantry
Waterloo, Ontario, CANADA

http://fsdev.net/wiki/index.php?title=Main_Page
========================================================================

Latest stable version ?

[Cmmn Ml <cm...@ya...>]

Hello, 

I'm new to sh-linux developments. Can some body please tell me what is the latest stable sh-linux version and the tool chain version ? and direct me to the place where I can get those.


Thanks in advance...

Cmmn Ml

       
---------------------------------
Moody friends. Drama queens. Your life? Nope! - their life, your story.
 Play Sims Stories at Yahoo! Games. 

Re: What compiler version to use for the kernel

[Paul M. <le...@li...>]

On Wed, May 30, 2007 at 09:38:54AM +0200, EXTERNAL Brunner Markus (Praktikant;  ST-FIR/Eng) wrote:
> I have problems using newer versions of gcc with my old 2.4.22 kernel. 
> GCC 3.2.3 with binutils 2.15 is the latest compiler I can use. Newer
> ones result in a "Unable to handle kernel paging request" error most of
> the time.
> 
> Does anybody still use 2.4 kernels? What compiler version do you use?
> 
> Unfortunatelly 2.4.22 is the only kernel runnig on that board so far,
> but I will port the latest 2.4 kernel to the board soon. 

There hasn't been any updates for the 2.4 kernels in years. I vaguely
recall pushing some fixes about 3 years ago, but it's been completely
unsupported since then. It's very possible you're going to hit bugs, and
I wouldn't expect the kernel or compilers to produce something usable
from that codebase. If you get something that even partially works,
you're certainly ahead of the curve.

> It's a sh3-dsp (7720) based board, are there any hints for porting? 
> I've seen that there is dsp support in 2.4.34, but no 7720 in the cpu
> type to select. 
> Is that sufficient for my 7720, or will I need to migrate the patches
> from my current kernel?

If you can find a close enough subtype thats in the kernel, you can
probably patch around that. You'll have to pay special attention to the
exception vector tables to make sure there are no mismatches across the
subtypes. Most of the SH-3 subtypes end up being "reasonably" close to
each other, so perhaps you'll get lucky.

The CONFIG_SH_DSP code is known to be buggy in 2.4, there are a number of
issues related to the stack frame layout. You may be able to dig those
out of 2.6 and backport, but there's really not much point.

2.4 stopped being viable almost 4 years ago now, it's at the point now
where it's just sad. You can either switch to 2.6, continue hacking on
your out of tree patches, or switch to another OS. 2.4 has not and will
not be supported.

Re: Build errors on Dreamcast with 2.6.22-rc3

[Paul M. <le...@li...>]

On Sat, May 26, 2007 at 10:02:31PM +0200, Manuel Lauss wrote:
> Adrian McMenamin wrote:
> > There used to be a lot of these sort of errors for -rc2, but most have
> > now gone, but still getting these...
> > 
> > WARNING: arch/sh/kernel/built-in.o(.text+0x87b4): Section mismatch:
> > reference to .init.data: (between 'get_sys_timer' and 'tmu_timer_start')
> > WARNING: arch/sh/kernel/built-in.o(.text+0x87b8): Section mismatch:
> > reference to .init.data: (between 'get_sys_timer' and 'tmu_timer_start')
> 
> These two can be removed by adding "__init" to 'get_sys_timer()',
> 
Well, no, that will break future sys_timer references. Dropping
__initdata from sys_timers and timer_override does the job, though.

> > WARNING: arch/sh/boards/dreamcast/built-in.o(.data+0x0): Section
> > mismatch: reference to .init.text: (between 'mv_dreamcast' and
> > 'systemasic_int')
> 
> and this one by removing the "__init" from all functions which are referenced
> by the machvec.
> 
> I think these warnings are bogus in general because both get_sys_timer and
> sh_mv.mv_init_irq() are called only once: during kernel init.
> 
Yes, those are bogus. The recent machvec tidying for 2.6.23 has these
fixed, since the section was renamed to something that modpost could
identify as a machvec section and __initmv was changed to unconditionally
set this section attribute. Other architectures (ia64, ppc, etc.) with
machvecs of their own had this problem, too.

The problem currently is that __initmv is a no-op for the general case,
whereas 2.6.23 reworks this to always place the machvec in its own
section (which we copy out of over top of the always-present generic
machvec if the section is non-zero size and discard immediately
afterwards).

> > WARNING: drivers/built-in.o(.text+0x168e0): Section mismatch: reference
> > to .init.data: (between 'pvr2fb_check_var' and 'pvr2fb_interrupt')
> > WARNING: drivers/built-in.o(.text+0x1701c): Section mismatch: reference
> > to .init.data: (between 'pvr2fb_pci_probe' and 'read_mem')
> > WARNING: drivers/built-in.o(.text+0x17024): Section mismatch: reference
> > to .init.text: (between 'pvr2fb_pci_probe' and 'read_mem')
> > WARNING: drivers/built-in.o(.data+0x738): Section mismatch: reference
> > to .init.text: (between 'board_list' and 'pvr2fb_pci_driver')
> > WARNING: drivers/built-in.o(.data+0x750): Section mismatch: reference
> > to .init.text: (between 'board_list' and 'pvr2fb_pci_driver')
> 
These are because of the board_list references, though the usage is quite
legal. These can be ignored for now.