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From: Fabio G. <fab...@au...> - 2007-08-20 07:25:19
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I supposed, but I tried. Sorry and thanks a lot. Best regards. Alle 08:06, luned=EC 20 agosto 2007, Paul Mundt ha scritto: > On Sat, Aug 18, 2007 at 12:18:35PM +0200, Fabio Giovagnini wrote: > > I'd like to use the -msx option to compile with such a mucroprocessor; > > I'm using GNUH8 toolchain from ktip V0702, but is seems being not worki= ng > > properly. > > Could you suggest which version of binutils, newlib and gcc I should te= st > > to try -msx compiling option? > > Please contact KPIT directly with these questions, I don't imagine > there's anyone on the list that can help with this. =2D-=20 =46abio Giovagnini Aurion s.r.l. via degli orti 11, 40050 Funo di Argelato (BO) P.I e C.F. 00885711200 Tel. +39.335.8350919 =46ax +39.051.8659009 www.aurion-tech.com account telefono VoIP skype (www.skype.com): aurion.giovagnini |
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From: Paul M. <le...@li...> - 2007-08-20 06:08:13
|
On Sat, Aug 18, 2007 at 12:18:35PM +0200, Fabio Giovagnini wrote: > I'd like to use the -msx option to compile with such a mucroprocessor; I'm > using GNUH8 toolchain from ktip V0702, but is seems being not working > properly. > Could you suggest which version of binutils, newlib and gcc I should test to > try -msx compiling option? > Please contact KPIT directly with these questions, I don't imagine there's anyone on the list that can help with this. |
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From: Paul M. <le...@li...> - 2007-08-20 04:07:04
|
On Mon, Aug 20, 2007 at 08:19:38AM +0900, Paul Mundt wrote: > On Sat, Aug 18, 2007 at 12:13:00AM +0200, Markus Brunner wrote: > > The write size for the heartbeat module was adjusted with an ifdef > > That and the logic was inverted. I suppose this is going to be another > candidate for real platform data. > Try this patch with the regsize and inversion bit set in your platform data. Works fine for me, but you might want to confirm that everything is still functional. > > The default config won't compile, but this is a general dsp problem since 2.6.23-rc1 > > http://marc.info/?l=linuxsh-dev&m=118734760923296&w=2 > > > Should be fixed for -rc3. > Err, -rc4 that is. -- arch/sh/boards/renesas/r7780rp/setup.c | 16 +++++-- arch/sh/boards/se/7206/setup.c | 8 +++ arch/sh/boards/se/770x/setup.c | 8 +++ arch/sh/boards/se/7722/setup.c | 9 ---- arch/sh/boards/se/7751/setup.c | 8 +++ arch/sh/boards/se/7780/setup.c | 7 --- arch/sh/drivers/heartbeat.c | 70 ++++++++++++++++++++++++--------- include/asm-sh/heartbeat.h | 17 ++++++++ 8 files changed, 104 insertions(+), 39 deletions(-) commit 78518d8f1d5da7386d6caf6d83a9f7bf6057a463 Author: Paul Mundt <le...@li...> Date: Mon Aug 20 13:03:41 2007 +0900 sh: heartbeat driver update. Add some flags for the heartbeat driver, and kill off some duplication in the bit positions for the boards that don't have special cases. This also allows for variable access widths and inversion. Signed-off-by: Paul Mundt <le...@li...> diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c index adb529d..1062346 100644 --- a/arch/sh/boards/renesas/r7780rp/setup.c +++ b/arch/sh/boards/renesas/r7780rp/setup.c @@ -19,6 +19,7 @@ #include <asm/machvec.h> #include <asm/r7780rp.h> #include <asm/clock.h> +#include <asm/heartbeat.h> #include <asm/io.h> static struct resource r8a66597_usb_host_resources[] = { @@ -108,16 +109,23 @@ static struct platform_device cf_ide_device = { }, }; -static unsigned char heartbeat_bit_pos[] = { 2, 1, 0, 3, 6, 5, 4, 7 }; - static struct resource heartbeat_resources[] = { [0] = { .start = PA_OBLED, - .end = PA_OBLED + ARRAY_SIZE(heartbeat_bit_pos) - 1, + .end = PA_OBLED + 8 - 1, .flags = IORESOURCE_MEM, }, }; +#ifndef CONFIG_SH_R7785RP +static unsigned char heartbeat_bit_pos[] = { 2, 1, 0, 3, 6, 5, 4, 7 }; + +static struct heartbeat_data heartbeat_data = { + .bit_pos = heartbeat_bit_pos, + .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), +}; +#endif + static struct platform_device heartbeat_device = { .name = "heartbeat", .id = -1, @@ -125,7 +133,7 @@ static struct platform_device heartbeat_device = { /* R7785RP has a slightly more sensible FPGA.. */ #ifndef CONFIG_SH_R7785RP .dev = { - .platform_data = heartbeat_bit_pos, + .platform_data = heartbeat_data, }, #endif .num_resources = ARRAY_SIZE(heartbeat_resources), diff --git a/arch/sh/boards/se/7206/setup.c b/arch/sh/boards/se/7206/setup.c index a074b62..5f041f8 100644 --- a/arch/sh/boards/se/7206/setup.c +++ b/arch/sh/boards/se/7206/setup.c @@ -14,6 +14,7 @@ #include <asm/se7206.h> #include <asm/io.h> #include <asm/machvec.h> +#include <asm/heartbeat.h> static struct resource smc91x_resources[] = { [0] = { @@ -37,6 +38,11 @@ static struct platform_device smc91x_device = { static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 }; +static struct heartbeat_data heartbeat_data = { + .bit_pos = heartbeat_bit_pos, + .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), +}; + static struct resource heartbeat_resources[] = { [0] = { .start = PA_LED, @@ -49,7 +55,7 @@ static struct platform_device heartbeat_device = { .name = "heartbeat", .id = -1, .dev = { - .platform_data = heartbeat_bit_pos, + .platform_data = heartbeat_data, }, .num_resources = ARRAY_SIZE(heartbeat_resources), .resource = heartbeat_resources, diff --git a/arch/sh/boards/se/770x/setup.c b/arch/sh/boards/se/770x/setup.c index 2962da1..5172f99 100644 --- a/arch/sh/boards/se/770x/setup.c +++ b/arch/sh/boards/se/770x/setup.c @@ -12,6 +12,7 @@ #include <asm/se.h> #include <asm/io.h> #include <asm/smc37c93x.h> +#include <asm/heartbeat.h> void init_se_IRQ(void); @@ -90,6 +91,11 @@ static struct platform_device cf_ide_device = { static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 }; +static struct heartbeat_data heartbeat_data = { + .bit_pos = heartbeat_bit_pos, + .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), +}; + static struct resource heartbeat_resources[] = { [0] = { .start = PA_LED, @@ -102,7 +108,7 @@ static struct platform_device heartbeat_device = { .name = "heartbeat", .id = -1, .dev = { - .platform_data = heartbeat_bit_pos, + .platform_data = heartbeat_data, }, .num_resources = ARRAY_SIZE(heartbeat_resources), .resource = heartbeat_resources, diff --git a/arch/sh/boards/se/7722/setup.c b/arch/sh/boards/se/7722/setup.c index 495fc7e..8f1c8a6 100644 --- a/arch/sh/boards/se/7722/setup.c +++ b/arch/sh/boards/se/7722/setup.c @@ -18,12 +18,10 @@ #include <asm/io.h> /* Heartbeat */ -static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 }; - static struct resource heartbeat_resources[] = { [0] = { .start = PA_LED, - .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1, + .end = PA_LED + 8 - 1, .flags = IORESOURCE_MEM, }, }; @@ -31,9 +29,6 @@ static struct resource heartbeat_resources[] = { static struct platform_device heartbeat_device = { .name = "heartbeat", .id = -1, - .dev = { - .platform_data = heartbeat_bit_pos, - }, .num_resources = ARRAY_SIZE(heartbeat_resources), .resource = heartbeat_resources, }; @@ -109,7 +104,7 @@ static void __init se7722_setup(char **cmdline_p) ctrl_outl(0x00051001, MSTPCR0); ctrl_outl(0x00000000, MSTPCR1); /* KEYSC, VOU, BEU, CEU, VEU, VPU, LCDC */ - ctrl_outl(0xffffbfC0, MSTPCR2); + ctrl_outl(0xffffbfC0, MSTPCR2); ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ diff --git a/arch/sh/boards/se/7751/setup.c b/arch/sh/boards/se/7751/setup.c index 7873d07..5ed1968 100644 --- a/arch/sh/boards/se/7751/setup.c +++ b/arch/sh/boards/se/7751/setup.c @@ -13,9 +13,15 @@ #include <asm/machvec.h> #include <asm/se7751.h> #include <asm/io.h> +#include <asm/heartbeat.h> static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 }; +static struct heartbeat_data heartbeat_data = { + .bit_pos = heartbeat_bit_pos, + .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), +}; + static struct resource heartbeat_resources[] = { [0] = { .start = PA_LED, @@ -28,7 +34,7 @@ static struct platform_device heartbeat_device = { .name = "heartbeat", .id = -1, .dev = { - .platform_data = heartbeat_bit_pos, + .platform_data = heartbeat_data, }, .num_resources = ARRAY_SIZE(heartbeat_resources), .resource = heartbeat_resources, diff --git a/arch/sh/boards/se/7780/setup.c b/arch/sh/boards/se/7780/setup.c index 723f2fd..15c3ea4 100644 --- a/arch/sh/boards/se/7780/setup.c +++ b/arch/sh/boards/se/7780/setup.c @@ -16,12 +16,10 @@ #include <asm/io.h> /* Heartbeat */ -static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 }; - static struct resource heartbeat_resources[] = { [0] = { .start = PA_LED, - .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1, + .end = PA_LED + 8 - 1, .flags = IORESOURCE_MEM, }, }; @@ -29,9 +27,6 @@ static struct resource heartbeat_resources[] = { static struct platform_device heartbeat_device = { .name = "heartbeat", .id = -1, - .dev = { - .platform_data = heartbeat_bit_pos, - }, .num_resources = ARRAY_SIZE(heartbeat_resources), .resource = heartbeat_resources, }; diff --git a/arch/sh/drivers/heartbeat.c b/arch/sh/drivers/heartbeat.c index 10c1828..b76a14f 100644 --- a/arch/sh/drivers/heartbeat.c +++ b/arch/sh/drivers/heartbeat.c @@ -24,24 +24,44 @@ #include <linux/sched.h> #include <linux/timer.h> #include <linux/io.h> +#include <asm/heartbeat.h> #define DRV_NAME "heartbeat" -#define DRV_VERSION "0.1.0" +#define DRV_VERSION "0.1.1" -struct heartbeat_data { - void __iomem *base; - unsigned char bit_pos[8]; - struct timer_list timer; -}; +static unsigned char default_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 }; + +static inline void heartbeat_toggle_bit(struct heartbeat_data *hd, + unsigned bit, unsigned int inverted) +{ + unsigned int new; + + new = (1 << hd->bit_pos[bit]); + if (inverted) + new = ~new; + + switch (hd->regsize) { + case 32: + iowrite32(new, hd->base); + break; + case 16: + iowrite16(new, hd->base); + break; + default: + iowrite8(new, hd->base); + break; + } +} static void heartbeat_timer(unsigned long data) { struct heartbeat_data *hd = (struct heartbeat_data *)data; static unsigned bit = 0, up = 1; - ctrl_outw(1 << hd->bit_pos[bit], (unsigned long)hd->base); + heartbeat_toggle_bit(hd, bit, hd->flags & HEARTBEAT_INVERTED); + bit += up; - if ((bit == 0) || (bit == ARRAY_SIZE(hd->bit_pos)-1)) + if ((bit == 0) || (bit == (hd->nr_bits)-1)) up = -up; mod_timer(&hd->timer, jiffies + (110 - ((300 << FSHIFT) / @@ -64,21 +84,31 @@ static int heartbeat_drv_probe(struct platform_device *pdev) return -EINVAL; } - hd = kmalloc(sizeof(struct heartbeat_data), GFP_KERNEL); - if (unlikely(!hd)) - return -ENOMEM; - if (pdev->dev.platform_data) { - memcpy(hd->bit_pos, pdev->dev.platform_data, - ARRAY_SIZE(hd->bit_pos)); + hd = pdev->dev.platform_data; } else { - int i; + hd = kzalloc(sizeof(struct heartbeat_data), GFP_KERNEL); + if (unlikely(!hd)) + return -ENOMEM; + } + + hd->base = ioremap_nocache(res->start, res->end - res->start + 1); + if (!unlikely(hd->base)) { + dev_err(&pdev->dev, "ioremap failed\n"); + + if (!pdev->dev.platform_data) + kfree(hd); + + return -ENXIO; + } - for (i = 0; i < ARRAY_SIZE(hd->bit_pos); i++) - hd->bit_pos[i] = i; + if (!hd->nr_bits) { + hd->bit_pos = default_bit_pos; + hd->nr_bits = ARRAY_SIZE(default_bit_pos); } - hd->base = (void __iomem *)(unsigned long)res->start; + if (!hd->regsize) + hd->regsize = 8; /* default access size */ setup_timer(&hd->timer, heartbeat_timer, (unsigned long)hd); platform_set_drvdata(pdev, hd); @@ -91,10 +121,12 @@ static int heartbeat_drv_remove(struct platform_device *pdev) struct heartbeat_data *hd = platform_get_drvdata(pdev); del_timer_sync(&hd->timer); + iounmap(hd->base); platform_set_drvdata(pdev, NULL); - kfree(hd); + if (!pdev->dev.platform_data) + kfree(hd); return 0; } diff --git a/include/asm-sh/heartbeat.h b/include/asm-sh/heartbeat.h new file mode 100644 index 0000000..724a43e --- /dev/null +++ b/include/asm-sh/heartbeat.h @@ -0,0 +1,17 @@ +#ifndef __ASM_SH_HEARTBEAT_H +#define __ASM_SH_HEARTBEAT_H + +#include <linux/timer.h> + +#define HEARTBEAT_INVERTED (1 << 0) + +struct heartbeat_data { + void __iomem *base; + unsigned char *bit_pos; + unsigned int nr_bits; + struct timer_list timer; + unsigned int regsize; + unsigned long flags; +}; + +#endif /* __ASM_SH_HEARTBEAT_H */ |
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From: Paul M. <le...@li...> - 2007-08-20 01:23:14
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On Sat, Aug 18, 2007 at 01:56:32PM +0900, Paul Mundt wrote: > On Sat, Aug 18, 2007 at 06:36:14AM +0200, Markus Brunner wrote: > > > > > It made sense for SH2-DSP, I thought SH3-DSP would cope with it also. Is > > > this problem fixed if you reinsert this flag? > > > > Yes, it compiles fine after reinsertion. > > > Thanks, I'll take a look at it when I'm back at the office. > How about this? -- diff --git a/arch/sh/Makefile b/arch/sh/Makefile index e5c84d0..e678e0c 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -34,6 +34,8 @@ isa-y := $(isa-y)-nofpu endif endif +isa-y := $(isa-y)-up + cflags-$(CONFIG_CPU_SH2) := $(call cc-option,-m2,) cflags-$(CONFIG_CPU_SH2A) += $(call cc-option,-m2a,) \ $(call cc-option,-m2a-nofpu,) |
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From: Paul M. <le...@li...> - 2007-08-19 23:26:09
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On Sat, Aug 18, 2007 at 12:39:15AM +0200, Markus Brunner wrote: > Because there was no reply to my patch extracting the bitpositions for the > clocks into a dedicated file and have a generic colck-sh3.c, I used > clock-sh7710.c for the sh7720. > http://marc.info/?l=linuxsh-dev&m=118661270309548&w=2 I still have to think about this a bit, but it hasn't fallen off of my stack completely. Now that Obon is over, I'll try to look at it shortly. > Both CPUs have the same clock layout, however the sh7710 clock module is a bit > confusing. The bitmasks are 3 bit wide, but the CPU has only 2 bit wide > fields. > On both CPUs the additional bit is always read as 0, so this is no problem. > > Early_printk support was added. A init function for sh7720 was added. > The scif_sercon_putc could be reused, but the FIFO size got adjusted with an > ifdef. > Looks fine. I'll apply this and the PFC/GPIO stuff with a bit of header tidying and push it out to the 2.6.24 tree, thanks. |
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From: Paul M. <le...@li...> - 2007-08-19 23:22:36
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On Sat, Aug 18, 2007 at 12:17:55AM +0200, Markus Brunner wrote: > This adds gpio.h to asm-sh64 and asm-sh. On sh64 this is just a stub. > On sh gpio.h will pull in port.h. > gpio.h is already used by h8300 in sh-sci.h. > Now all 3 architectures using sh-sci have a gpio.h > Looks fine, but having a port.h seems pointless, when we can just call it gpio.h outright. There's not a lot of point in semantically dividing up PFC vs GPIO features at the moment. |
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From: Paul M. <le...@li...> - 2007-08-19 23:20:57
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On Sat, Aug 18, 2007 at 12:13:00AM +0200, Markus Brunner wrote: > The write size for the heartbeat module was adjusted with an ifdef That and the logic was inverted. I suppose this is going to be another candidate for real platform data. > The default config won't compile, but this is a general dsp problem since 2.6.23-rc1 > http://marc.info/?l=linuxsh-dev&m=118734760923296&w=2 > Should be fixed for -rc3. > --- sh-2.6-intc/arch/sh/boards/magicpanelr2/setup.c 1970-01-01 01:00:00.000000000 +0100 > +++ sh-2.6/arch/sh/boards/magicpanelr2/setup.c 2007-08-17 11:28:54.000000000 +0200 > +#include <linux/autoconf.h> This header is obsolete, use config.h if you really want it, but Kbuild includes it by default these days, so it's not particularly useful either way. > +#include <linux/init.h> > +#include <linux/irq.h> > +#include <linux/platform_device.h> > + > +#include <linux/hdreg.h> > +#include <linux/ide.h> > +#include <asm/magicpanelr2.h> > +#include <linux/irq.h> > +#include <linux/delay.h> > + linux/ headers before asm/ headers. > +#if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2 > + ctrl_outb(0x30, PORT_PMDR); > +#elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3 > + ctrl_outb(0xF0, PORT_PMDR); > +#else > +#error Unknown revision of PLATFORM_MP_R2 > +#endif > + Do you not have a version register you can check instead? The differences between the versions look pretty mundane, and you can likely support all of them in a single config if you do some run-time checking. |
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From: Fabio G. <fab...@au...> - 2007-08-18 10:09:33
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Hi all, I'd like to use the -msx option to compile with such a mucroprocessor; I'm using GNUH8 toolchain from ktip V0702, but is seems being not working properly. Could you suggest which version of binutils, newlib and gcc I should test to try -msx compiling option? Thanks in advance. -- Fabio Giovagnini Aurion s.r.l. via degli orti 11, 40050 Funo di Argelato (BO) P.I e C.F. 00885711200 Tel. +39.335.8350919 Fax +39.051.8659009 www.aurion-tech.com account telefono VoIP skype (www.skype.com): aurion.giovagnini |
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From: Paul M. <pau...@re...> - 2007-08-18 07:40:04
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On Sat, Aug 18, 2007 at 12:11:15AM +0200, Markus Brunner wrote: > this are the changes to the smc911x driver. > It was necessary to set the irq sense to low level. > Please send this to Jeff Garzik. On Sat, Aug 18, 2007 at 12:12:16AM +0200, Markus Brunner wrote: > this adds a MTD mapping for the onboard NOR flash on the Magic Panel R2. > The mapping module is based on the solutionengine mapping module. > And this to David Woodhouse. |
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From: Paul M. <le...@li...> - 2007-08-18 04:57:50
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On Sat, Aug 18, 2007 at 06:36:14AM +0200, Markus Brunner wrote: > > > It made sense for SH2-DSP, I thought SH3-DSP would cope with it also. Is > > this problem fixed if you reinsert this flag? > > Yes, it compiles fine after reinsertion. > Thanks, I'll take a look at it when I'm back at the office. |
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From: Markus B. <sup...@go...> - 2007-08-18 04:32:02
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> It made sense for SH2-DSP, I thought SH3-DSP would cope with it also. Is > this problem fixed if you reinsert this flag? Yes, it compiles fine after reinsertion. Regards Markus |
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From: Paul M. <le...@li...> - 2007-08-18 04:14:31
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On Fri, Aug 17, 2007 at 12:46:32PM +0200, EXTERNAL Brunner Markus (Praktikant; ST-FIR/Eng) wrote: > Hi, > > I'm getting the following compiler error when trying to compile any sh3 > dsp > > AS arch/sh/kernel/cpu/sh3/entry.o > arch/sh/kernel/cpu/sh3/entry.S: Assembler messages: > arch/sh/kernel/cpu/sh3/entry.S:271: Error: unknown opcode > arch/sh/kernel/cpu/sh3/entry.S:272: Error: unknown opcode > arch/sh/kernel/cpu/sh3/entry.S:273: Error: unknown opcode > arch/sh/kernel/cpu/sh3/entry.S:274: Error: unknown opcode > arch/sh/kernel/cpu/sh3/entry.S:275: Error: unknown opcode > arch/sh/kernel/cpu/sh3/entry.S:278: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:279: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:280: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:281: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:282: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:283: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:284: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:285: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:286: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:439: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:440: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:441: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:442: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:443: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:444: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:445: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:446: Error: invalid operands for opcode > arch/sh/kernel/cpu/sh3/entry.S:447: Error: invalid operands for opcode > make[3]: *** [arch/sh/kernel/cpu/sh3/entry.o] Error 1 > make[2]: *** [arch/sh/kernel/cpu/sh3] Error 2 > make[1]: *** [arch/sh/kernel/cpu] Error 2 > > > I figured out that this was introduced by 2.6.23-rc1 when the following > line was removed from arch/sh/Makefile > > cflags-$(CONFIG_SH_DSP) += -Wa,-dsp > > > Was it accidently removed, or is there any sense? > It made sense for SH2-DSP, I thought SH3-DSP would cope with it also. Is this problem fixed if you reinsert this flag? |
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From: Markus B. <sup...@go...> - 2007-08-17 22:36:02
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Hi, The ifdef in sh-sci.h around "#include asm/gpio.h" was removed, because every arch has now this header. On SH7720 the addresses for the PFC get included here. Because there was no reply to my patch extracting the bitpositions for the clocks into a dedicated file and have a generic colck-sh3.c, I used clock-sh7710.c for the sh7720. http://marc.info/?l=linuxsh-dev&m=118661270309548&w=2 Both CPUs have the same clock layout, however the sh7710 clock module is a bit confusing. The bitmasks are 3 bit wide, but the CPU has only 2 bit wide fields. On both CPUs the additional bit is always read as 0, so this is no problem. Early_printk support was added. A init function for sh7720 was added. The scif_sercon_putc could be reused, but the FIFO size got adjusted with an ifdef. Signed-off by: Markus Brunner <sup...@gm...> Signed-off by: Mark Jonas <to...@gm...> --- arch/sh/Kconfig.debug | 1 sh-2.6/arch/sh/drivers/dma/Kconfig | 1 sh-2.6/arch/sh/drivers/dma/dma-sh.c | 12 + sh-2.6/arch/sh/kernel/cpu/sh3/Makefile | 2 sh-2.6/arch/sh/kernel/cpu/sh3/probe.c | 3 sh-2.6/arch/sh/kernel/cpu/sh3/setup-sh7720.c | 211 +++++++++++++++++++++++++++ sh-2.6/arch/sh/kernel/early_printk.c | 38 ++++ sh-2.6/arch/sh/kernel/setup.c | 2 sh-2.6/arch/sh/kernel/timers/timer-tmu.c | 3 sh-2.6/arch/sh/mm/Kconfig | 8 + sh-2.6/drivers/serial/sh-sci.c | 33 ++++ sh-2.6/drivers/serial/sh-sci.h | 33 +++- sh-2.6/include/asm-sh/cpu-sh3/cache.h | 4 sh-2.6/include/asm-sh/cpu-sh3/dma.h | 13 + sh-2.6/include/asm-sh/cpu-sh3/mmu_context.h | 9 - sh-2.6/include/asm-sh/cpu-sh3/timer.h | 9 - sh-2.6/include/asm-sh/cpu-sh3/ubc.h | 3 sh-2.6/include/asm-sh/processor.h | 2 18 files changed, 360 insertions(+), 27 deletions(-) diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/boards/magicpanelr2/Kconfig sh-2.6/arch/sh/boards/magicpanelr2/Kconfig diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/boards/magicpanelr2/Makefile sh-2.6/arch/sh/boards/magicpanelr2/Makefile diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/boards/magicpanelr2/setup.c sh-2.6/arch/sh/boards/magicpanelr2/setup.c diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/drivers/dma/dma-sh.c sh-2.6/arch/sh/drivers/dma/dma-sh.c --- sh-2.6-intc/arch/sh/drivers/dma/dma-sh.c 2007-07-04 21:46:25.000000000 +0200 +++ sh-2.6/arch/sh/drivers/dma/dma-sh.c 2007-08-16 15:49:57.000000000 +0200 @@ -24,13 +24,18 @@ static int dmte_irq_map[] = { DMTE1_IRQ, DMTE2_IRQ, DMTE3_IRQ, -#if defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ +#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ + defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ defined(CONFIG_CPU_SUBTYPE_SH7760) || \ defined(CONFIG_CPU_SUBTYPE_SH7780) DMTE4_IRQ, DMTE5_IRQ, +#endif +#if defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ + defined(CONFIG_CPU_SUBTYPE_SH7760) || \ + defined(CONFIG_CPU_SUBTYPE_SH7780) DMTE6_IRQ, - DMTE7_IRQ, + DMTE7_IRQ, #endif }; @@ -196,7 +201,8 @@ static int sh_dmac_get_dma_residue(struc return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan); } -#ifdef CONFIG_CPU_SUBTYPE_SH7780 +#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ + defined(CONFIG_CPU_SUBTYPE_SH7780) #define dmaor_read_reg() ctrl_inw(DMAOR) #define dmaor_write_reg(data) ctrl_outw(data, DMAOR) #else diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/drivers/dma/Kconfig sh-2.6/arch/sh/drivers/dma/Kconfig --- sh-2.6-intc/arch/sh/drivers/dma/Kconfig 2007-07-31 12:11:46.000000000 +0200 +++ sh-2.6/arch/sh/drivers/dma/Kconfig 2007-08-03 09:36:45.000000000 +0200 @@ -12,6 +12,7 @@ config SH_DMA config NR_ONCHIP_DMA_CHANNELS int depends on SH_DMA + default "6" if CPU_SUBTYPE_SH7720 default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R default "12" if CPU_SUBTYPE_SH7780 default "4" diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/drivers/heartbeat.c sh-2.6/arch/sh/drivers/heartbeat.c diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/Kconfig sh-2.6/arch/sh/Kconfig diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/Kconfig.debug sh-2.6/arch/sh/Kconfig.debug --- sh-2.6-intc/arch/sh/Kconfig.debug 2007-08-08 22:59:29.000000000 +0200 +++ sh-2.6/arch/sh/Kconfig.debug 2007-08-16 16:15:07.000000000 +0200 @@ -34,6 +34,7 @@ config EARLY_SCIF_CONSOLE_PORT default "0xfffe9800" if CPU_SUBTYPE_SH7206 default "0xf8420000" if CPU_SUBTYPE_SH7619 default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705 + default "0xa4430000" if CPU_SUBTYPE_SH7720 default "0xffc30000" if CPU_SUBTYPE_SHX3 default "0xffe80000" if CPU_SH4 default "0x00000000" diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/kernel/cpu/sh3/Makefile sh-2.6/arch/sh/kernel/cpu/sh3/Makefile --- sh-2.6-intc/arch/sh/kernel/cpu/sh3/Makefile 2007-07-31 12:11:46.000000000 +0200 +++ sh-2.6/arch/sh/kernel/cpu/sh3/Makefile 2007-08-16 17:02:16.000000000 +0200 @@ -12,6 +12,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setu obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh770x.o obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o +obj-$(CONFIG_CPU_SUBTYPE_SH7720) += setup-sh7720.o # Primary on-chip clocks (common) clock-$(CONFIG_CPU_SH3) := clock-sh3.o @@ -19,5 +20,6 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7705) := cl clock-$(CONFIG_CPU_SUBTYPE_SH7706) := clock-sh7706.o clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7710.o +clock-$(CONFIG_CPU_SUBTYPE_SH7720) := clock-sh7710.o obj-y += $(clock-y) diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/kernel/cpu/sh3/probe.c sh-2.6/arch/sh/kernel/cpu/sh3/probe.c --- sh-2.6-intc/arch/sh/kernel/cpu/sh3/probe.c 2007-07-04 21:46:25.000000000 +0200 +++ sh-2.6/arch/sh/kernel/cpu/sh3/probe.c 2007-08-03 09:33:54.000000000 +0200 @@ -81,6 +81,9 @@ int __init detect_cpu_and_cache_system(v #if defined(CONFIG_CPU_SUBTYPE_SH7712) current_cpu_data.type = CPU_SH7712; #endif +#if defined(CONFIG_CPU_SUBTYPE_SH7720) + current_cpu_data.type = CPU_SH7720; +#endif #if defined(CONFIG_CPU_SUBTYPE_SH7705) current_cpu_data.type = CPU_SH7705; diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/kernel/cpu/sh3/setup-sh7720.c sh-2.6/arch/sh/kernel/cpu/sh3/setup-sh7720.c --- sh-2.6-intc/arch/sh/kernel/cpu/sh3/setup-sh7720.c 1970-01-01 01:00:00.000000000 +0100 +++ sh-2.6/arch/sh/kernel/cpu/sh3/setup-sh7720.c 2007-08-16 17:35:56.000000000 +0200 @@ -0,0 +1,211 @@ +/* + * SH7720 Setup + * + * Copyright (C) 2007 Markus Brunner, Mark Jonas + * + * Based on arch/sh/kernel/cpu/sh4/setup-sh7750.c: + * + * Copyright (C) 2006 Paul Mundt + * Copyright (C) 2006 Jamie Lenehan + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include <linux/platform_device.h> +#include <linux/init.h> +#include <linux/serial.h> +#include <linux/io.h> +#include <asm/sci.h> +#include <asm/rtc.h> + +#define INTC_ICR1 0xA4140010UL +#define INTC_ICR_IRLM 0x4000 +#define INTC_ICR_IRQ (~INTC_ICR_IRLM) + +static struct resource rtc_resources[] = { + [0] = { + .start = 0xa413fec0, + .end = 0xa413fec0 + 0x28 - 1, + .flags = IORESOURCE_IO, + }, + [1] = { + /* Period IRQ */ + .start = 21, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* Carry IRQ */ + .start = 22, + .flags = IORESOURCE_IRQ, + }, + [3] = { + /* Alarm IRQ */ + .start = 20, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct sh_rtc_platform_info rtc_info = { + .capabilities = RTC_CAP_4_DIGIT_YEAR, +}; + +static struct platform_device rtc_device = { + .name = "sh-rtc", + .id = -1, + .num_resources = ARRAY_SIZE(rtc_resources), + .resource = rtc_resources, + .dev = { + .platform_data = &rtc_info, + }, +}; + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xa4430000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 80, 80, 80, 80 }, + }, { + .mapbase = 0xa4438000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 81, 81, 81, 81 }, + }, { + + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct platform_device *sh7720_devices[] __initdata = { + &rtc_device, + &sci_device, +}; + +static int __init sh7720_devices_setup(void) +{ + return platform_add_devices(sh7720_devices, + ARRAY_SIZE(sh7720_devices)); +} +__initcall(sh7720_devices_setup); + +enum { + UNUSED = 0, + + /* interrupt sources */ + TMU0, TMU1, TMU2, RTC_ATI, RTC_PRI, RTC_CUI, + WDT, REF_RCMI, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND, + IRQ0, IRQ1, IRQ2, IRQ3, + USBF_SPD, TMU_SUNI, IRQ5, IRQ4, + DMAC1_DEI0, DMAC1_DEI1, DMAC1_DEI2, DMAC1_DEI3, LCDC, SSL, + ADC, DMAC2_DEI4, DMAC2_DEI5, USBFI0, USBFI1, CMT, + SCIF0, SCIF1, + PINT07, PINT815, TPU0, TPU1, TPU2, TPU3, IIC, + SIOF0, SIOF1, MMCI0, MMCI1, MMCI2, MMCI3, PCC, + USBHI, AFEIF, + H_UDI, + /* interrupt groups */ + TMU, RTC, SIM, DMAC1, USBFI, DMAC2, USB, TPU, MMC, +}; + +static struct intc_vect vectors[] __initdata = { + INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), + INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480), + INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0), + INTC_VECT(SIM_ERI, 0x4e0), INTC_VECT(SIM_RXI, 0x500), + INTC_VECT(SIM_TXI, 0x520), INTC_VECT(SIM_TEND, 0x540), + INTC_VECT(WDT, 0x560), INTC_VECT(REF_RCMI, 0x580), + /* H_UDI cannot be masked */ INTC_VECT(TMU_SUNI, 0x6c0), + INTC_VECT(USBF_SPD, 0x6e0), INTC_VECT(DMAC1_DEI0, 0x800), + INTC_VECT(DMAC1_DEI1, 0x820), INTC_VECT(DMAC1_DEI2, 0x840), + INTC_VECT(DMAC1_DEI3, 0x860), INTC_VECT(LCDC, 0x900), + INTC_VECT(SSL, 0x980), INTC_VECT(USBFI0, 0xa20), + INTC_VECT(USBFI1, 0xa40), INTC_VECT(USBHI, 0xa60), + INTC_VECT(DMAC2_DEI4, 0xb80), INTC_VECT(DMAC2_DEI5, 0xba0), + INTC_VECT(ADC, 0xbe0), INTC_VECT(SCIF0, 0xc00), + INTC_VECT(SCIF1, 0xc20), INTC_VECT(PINT07, 0xc80), + INTC_VECT(PINT815, 0xca0), INTC_VECT(SIOF0, 0xd00), + INTC_VECT(SIOF1, 0xd20), INTC_VECT(TPU0, 0xd80), + INTC_VECT(TPU1, 0xda0), INTC_VECT(TPU2, 0xdc0), + INTC_VECT(TPU3, 0xde0), INTC_VECT(IIC, 0xe00), + INTC_VECT(MMCI0, 0xe80), INTC_VECT(MMCI1, 0xea0), + INTC_VECT(MMCI2, 0xec0), INTC_VECT(MMCI3, 0xee0), + INTC_VECT(CMT, 0xf00), INTC_VECT(PCC, 0xf60), + INTC_VECT(AFEIF, 0xfe0), +}; + +static struct intc_group groups[] __initdata = { + INTC_GROUP(TMU, TMU0, TMU1, TMU2), + INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), + INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND), + INTC_GROUP(DMAC1, DMAC1_DEI0, DMAC1_DEI1, DMAC1_DEI2, DMAC1_DEI3), + INTC_GROUP(USBFI, USBFI0, USBFI1), + INTC_GROUP(DMAC2, DMAC2_DEI4, DMAC2_DEI5), + INTC_GROUP(TPU, TPU0, TPU1, TPU2, TPU3), + INTC_GROUP(MMC, MMCI0, MMCI1, MMCI2, MMCI3), +}; + +static struct intc_prio priorities[] __initdata = { + INTC_PRIO(SCIF0, 2), + INTC_PRIO(SCIF1, 2), + INTC_PRIO(DMAC1, 1), + INTC_PRIO(DMAC2, 1), + INTC_PRIO(RTC, 2), + INTC_PRIO(TMU, 2), + INTC_PRIO(TPU, 2), +}; + +static struct intc_prio_reg prio_registers[] __initdata = { + { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, + { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } }, + { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, + { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } }, + { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } }, + { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } }, + { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } }, + { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } }, + { 0xA4080006UL, 0, 16, 4, /* IPRI */ { SIOF0, SIOF1, MMC, PCC } }, + { 0xA4080008UL, 0, 16, 4, /* IPRJ */ { 0, USBHI, 0, AFEIF } }, +}; + +static __initdata DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups, + priorities, NULL, prio_registers, NULL); + +static struct intc_sense_reg sense_registers[] __initdata = { + { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } }, +}; + +static struct intc_vect vectors_irq[] __initdata = { + INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), + INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), + INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), +}; + +static __initdata DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq, + NULL, priorities, NULL, prio_registers, sense_registers); + +void __init plat_irq_setup_pins(int mode) +{ + switch (mode) { + case IRQ_MODE_IRQ: + ctrl_outw(ctrl_inw(INTC_ICR1) & INTC_ICR_IRQ, INTC_ICR1); + register_intc_controller(&intc_irq_desc); + break; + default: + BUG(); + } +} + +void __init plat_irq_setup(void) +{ + register_intc_controller(&intc_desc); +} diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/kernel/early_printk.c sh-2.6/arch/sh/kernel/early_printk.c --- sh-2.6-intc/arch/sh/kernel/early_printk.c 2007-08-08 23:15:53.000000000 +0200 +++ sh-2.6/arch/sh/kernel/early_printk.c 2007-08-17 14:47:40.000000000 +0200 @@ -13,6 +13,7 @@ #include <linux/tty.h> #include <linux/init.h> #include <linux/io.h> +#include <linux/delay.h> #ifdef CONFIG_SH_STANDARD_BIOS #include <asm/sh_bios.h> @@ -62,6 +63,18 @@ static struct console bios_console = { #include <linux/serial_core.h> #include "../../../drivers/serial/sh-sci.h" +#if defined(CONFIG_CPU_SUBTYPE_SH7720) +#define EPK_SCSMR_VALUE 0x000 +#define EPK_SCBRR_VALUE 0x00C +#define EPK_FIFO_SIZE 64 +#define EPK_FIFO_BITS (0x7f00 >> 8) +#else +#define EPK_FIFO_SIZE 16 +#define EPK_FIFO_BITS (0x1f00 >> 8) +#endif + + + static struct uart_port scif_port = { .mapbase = CONFIG_EARLY_SCIF_CONSOLE_PORT, .membase = (char __iomem *)CONFIG_EARLY_SCIF_CONSOLE_PORT, @@ -69,7 +82,7 @@ static struct uart_port scif_port = { static void scif_sercon_putc(int c) { - while (((sci_in(&scif_port, SCFDR) & 0x1f00 >> 8) == 16)) + while (((sci_in(&scif_port, SCFDR) & EPK_FIFO_BITS) >= EPK_FIFO_SIZE)) ; sci_out(&scif_port, SCxTDR, c); @@ -105,7 +118,22 @@ static struct console scif_console = { .index = -1, }; -#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_STANDARD_BIOS) +#if !defined(CONFIG_SH_STANDARD_BIOS) +#if defined(CONFIG_CPU_SUBTYPE_SH7720) +static void scif_sercon_init(char *s) +{ + sci_out(&scif_port, SCSCR, 0x0000 ); /* clear TE and RE */ + sci_out(&scif_port, SCFCR, 0x4006 ); /* reset */ + sci_out(&scif_port, SCSCR, 0x0000 ); /* select internal clock */ + sci_out(&scif_port, SCSMR, EPK_SCSMR_VALUE ); + sci_out(&scif_port, SCBRR, EPK_SCBRR_VALUE ); + + mdelay(1); /* wait 1-bit time */ + + sci_out(&scif_port, SCFCR, 0x0030 ); /* TTRG=b'11 */ + sci_out(&scif_port, SCSCR, 0x0030 ); /* TE, RE */ +} +#elif defined(CONFIG_CPU_SH4) #define DEFAULT_BAUD 115200 /* * Simple SCIF init, primarily aimed at SH7750 and other similar SH-4 @@ -146,7 +174,8 @@ static void scif_sercon_init(char *s) ctrl_outw(0, scif_port.mapbase + 36); ctrl_outw(0x30, scif_port.mapbase + 8); } -#endif /* CONFIG_CPU_SH4 && !CONFIG_SH_STANDARD_BIOS */ +#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */ +#endif /* !defined(CONFIG_SH_STANDARD_BIOS) */ #endif /* CONFIG_EARLY_SCIF_CONSOLE */ /* @@ -186,7 +215,8 @@ int __init setup_early_printk(char *buf) if (!strncmp(buf, "serial", 6)) { early_console = &scif_console; -#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_STANDARD_BIOS) +#if (defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SUBTYPE_SH7720)) && \ + !defined(CONFIG_SH_STANDARD_BIOS) scif_sercon_init(buf + 6); #endif } diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/kernel/setup.c sh-2.6/arch/sh/kernel/setup.c --- sh-2.6-intc/arch/sh/kernel/setup.c 2007-07-31 12:11:46.000000000 +0200 +++ sh-2.6/arch/sh/kernel/setup.c 2007-08-03 09:33:54.000000000 +0200 @@ -279,7 +279,7 @@ static const char *cpu_name[] = { [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710", - [CPU_SH7712] = "SH7712", + [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720", [CPU_SH7729] = "SH7729", [CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S", [CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751", [CPU_SH7751R] = "SH7751R", diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/kernel/timers/timer-tmu.c sh-2.6/arch/sh/kernel/timers/timer-tmu.c --- sh-2.6-intc/arch/sh/kernel/timers/timer-tmu.c 2007-07-31 12:11:46.000000000 +0200 +++ sh-2.6/arch/sh/kernel/timers/timer-tmu.c 2007-08-03 09:41:33.000000000 +0200 @@ -173,7 +173,8 @@ static int tmu_timer_init(void) tmu_timer_stop(); -#if !defined(CONFIG_CPU_SUBTYPE_SH7760) && \ +#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && \ + !defined(CONFIG_CPU_SUBTYPE_SH7760) && \ !defined(CONFIG_CPU_SUBTYPE_SH7785) && \ !defined(CONFIG_CPU_SUBTYPE_SHX3) ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/Makefile sh-2.6/arch/sh/Makefile diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/arch/sh/mm/Kconfig sh-2.6/arch/sh/mm/Kconfig --- sh-2.6-intc/arch/sh/mm/Kconfig 2007-08-08 22:59:29.000000000 +0200 +++ sh-2.6/arch/sh/mm/Kconfig 2007-08-16 16:19:53.000000000 +0200 @@ -111,6 +111,14 @@ config CPU_SUBTYPE_SH7712 help Select SH7712 if you have a SH3-DSP SH7712 CPU. +config CPU_SUBTYPE_SH7720 + bool "Support SH7720 processor" + select CPU_SH3 + select CPU_HAS_INTC_IRQ + select CPU_HAS_DSP + help + Select SH7720 if you have a SH3-DSP SH7720 CPU. + # SH-4 Processor Support config CPU_SUBTYPE_SH7750 diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/drivers/mtd/maps/Kconfig sh-2.6/drivers/mtd/maps/Kconfig diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/drivers/mtd/maps/magicpanelr2.c sh-2.6/drivers/mtd/maps/magicpanelr2.c diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/drivers/mtd/maps/Makefile sh-2.6/drivers/mtd/maps/Makefile diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/drivers/net/Kconfig sh-2.6/drivers/net/Kconfig diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/drivers/net/smc911x.c sh-2.6/drivers/net/smc911x.c diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/drivers/net/smc911x.h sh-2.6/drivers/net/smc911x.h diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/drivers/serial/sh-sci.c sh-2.6/drivers/serial/sh-sci.c --- sh-2.6-intc/drivers/serial/sh-sci.c 2007-08-08 22:59:29.000000000 +0200 +++ sh-2.6/drivers/serial/sh-sci.c 2007-08-16 16:01:17.000000000 +0200 @@ -4,6 +4,7 @@ * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO) * * Copyright (C) 2002 - 2006 Paul Mundt + * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007). * * based off of the old drivers/char/sh-sci.c by: * @@ -301,6 +302,38 @@ static void sci_init_pins_scif(struct ua } sci_out(port, SCFCR, fcr_val); } +#elif defined(CONFIG_CPU_SUBTYPE_SH7720) +static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) +{ + unsigned int fcr_val = 0; + unsigned short data; + + if (cflag & CRTSCTS) { + /* enable RTS/CTS */ + if (port->mapbase == 0xa4430000) { /* SCIF0 */ + /* Clear PTCR bit 9-2; enable all scif pins but sck */ + data = ctrl_inw(PORT_PTCR); + ctrl_outw((data & 0xfc03), PORT_PTCR); + } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ + /* Clear PVCR bit 9-2 */ + data = ctrl_inw(PORT_PVCR); + ctrl_outw((data & 0xfc03), PORT_PVCR); + } + fcr_val |= SCFCR_MCE; + } else { + if (port->mapbase == 0xa4430000) { /* SCIF0 */ + /* Clear PTCR bit 5-2; enable only tx and rx */ + data = ctrl_inw(PORT_PTCR); + ctrl_outw((data & 0xffc3), PORT_PTCR); + } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ + /* Clear PVCR bit 5-2 */ + data = ctrl_inw(PORT_PVCR); + ctrl_outw((data & 0xffc3), PORT_PVCR); + } + } + sci_out(port, SCFCR, fcr_val); +} + #elif defined(CONFIG_CPU_SH3) /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/drivers/serial/sh-sci.h sh-2.6/drivers/serial/sh-sci.h --- sh-2.6-intc/drivers/serial/sh-sci.h 2007-08-08 22:59:29.000000000 +0200 +++ sh-2.6/drivers/serial/sh-sci.h 2007-08-17 13:43:16.000000000 +0200 @@ -10,19 +10,19 @@ * Modified to support SH7300(SH-Mobile) SCIF. Takashi Kusuda (Jun 2003). * Modified to support H8/300 Series Yoshinori Sato (Feb 2004). * Removed SH7300 support (Jul 2007). + * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Aug 2007). */ #include <linux/serial_core.h> #include <asm/io.h> -#if defined(__H8300H__) || defined(__H8300S__) #include <asm/gpio.h> + #if defined(CONFIG_H83007) || defined(CONFIG_H83068) #include <asm/regs306x.h> #endif #if defined(CONFIG_H8S2678) #include <asm/regs267x.h> #endif -#endif #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7707) || \ @@ -46,6 +46,10 @@ */ # define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0 # define SCIF_ONLY +#elif defined(CONFIG_CPU_SUBTYPE_SH7720) +# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ +# define SCIF_ONLY +#define SCIF_ORER 0x0200 /* overrun error bit */ #elif defined(CONFIG_SH_RTS7751R2D) # define SCSPTR2 0xFFE80020 /* 16 bit SCIF */ # define SCIF_ORER 0x0001 /* overrun error bit */ @@ -217,7 +221,8 @@ #define SCIF_RDF 0x0002 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ #define SCIF_DR 0x0001 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ -#if defined(CONFIG_CPU_SUBTYPE_SH7705) +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7720) #define SCIF_ORER 0x0200 #define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) #define SCIF_RFDC_MASK 0x007f @@ -254,7 +259,8 @@ # define SCxSR_FER(port) SCIF_FER # define SCxSR_PER(port) SCIF_PER # define SCxSR_BRK(port) SCIF_BRK -#if defined(CONFIG_CPU_SUBTYPE_SH7705) +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7720) # define SCxSR_RDxF_CLEAR(port) (sci_in(port,SCxSR)&0xfffc) # define SCxSR_ERROR_CLEAR(port) (sci_in(port,SCxSR)&0xfd73) # define SCxSR_TDxE_CLEAR(port) (sci_in(port,SCxSR)&0xffdf) @@ -362,7 +368,8 @@ CPU_SCIx_FNS(name, sh4_sci_offset, sh4_sci_size, sh4_scif_offset, sh4_scif_size) #define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \ CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) -#elif defined(CONFIG_CPU_SUBTYPE_SH7705) +#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7720) #define SCIF_FNS(name, scif_offset, scif_size) \ CPU_SCIF_FNS(name, scif_offset, scif_size) #else @@ -388,7 +395,8 @@ CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) #endif -#if defined(CONFIG_CPU_SUBTYPE_SH7705) +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7720) SCIF_FNS(SCSMR, 0x00, 16) SCIF_FNS(SCBRR, 0x04, 8) @@ -510,7 +518,15 @@ static inline void set_sh771x_scif_pfc(s return; } } - +#elif defined(CONFIG_CPU_SUBTYPE_SH7720) +static inline int sci_rxd_in(struct uart_port *port) +{ + if (port->mapbase == 0xa4430000) + return sci_in(port, SCxSR) & 0x0003 ? 1 : 0; + else if (port->mapbase == 0xa4438000) + return sci_in(port, SCxSR) & 0x0003 ? 1 : 0; + return 1; +} #elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \ defined(CONFIG_CPU_SUBTYPE_SH7751) || \ defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ @@ -692,7 +708,8 @@ static inline int sci_rxd_in(struct uart #if defined(CONFIG_CPU_SUBTYPE_SH7780) || \ defined(CONFIG_CPU_SUBTYPE_SH7785) #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) -#elif defined(CONFIG_CPU_SUBTYPE_SH7705) +#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7720) #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) #elif defined(__H8300H__) || defined(__H8300S__) #define SCBRR_VALUE(bps) (((CONFIG_CPU_CLOCK*1000/32)/bps)-1) diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/include/asm-sh/cpu-sh3/cache.h sh-2.6/include/asm-sh/cpu-sh3/cache.h --- sh-2.6-intc/include/asm-sh/cpu-sh3/cache.h 2007-07-04 21:46:47.000000000 +0200 +++ sh-2.6/include/asm-sh/cpu-sh3/cache.h 2007-08-03 09:33:54.000000000 +0200 @@ -26,7 +26,9 @@ #define CCR_CACHE_ENABLE CCR_CACHE_CE #define CCR_CACHE_INVALIDATE CCR_CACHE_CF -#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7710) +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7710) || \ + defined(CONFIG_CPU_SUBTYPE_SH7720) #define CCR3 0xa40000b4 #define CCR_CACHE_16KB 0x00010000 #define CCR_CACHE_32KB 0x00020000 diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/include/asm-sh/cpu-sh3/dma.h sh-2.6/include/asm-sh/cpu-sh3/dma.h --- sh-2.6-intc/include/asm-sh/cpu-sh3/dma.h 2007-07-04 21:46:47.000000000 +0200 +++ sh-2.6/include/asm-sh/cpu-sh3/dma.h 2007-08-03 09:33:54.000000000 +0200 @@ -1,7 +1,20 @@ #ifndef __ASM_CPU_SH3_DMA_H #define __ASM_CPU_SH3_DMA_H + +#if defined(CONFIG_CPU_SUBTYPE_SH7720) +#define SH_DMAC_BASE 0xa4010020 + +#define DMTE0_IRQ 48 +#define DMTE1_IRQ 49 +#define DMTE2_IRQ 50 +#define DMTE3_IRQ 51 +#define DMTE4_IRQ 76 +#define DMTE5_IRQ 77 + +#else #define SH_DMAC_BASE 0xa4000020 +#endif /* Definitions for the SuperH DMAC */ #define TM_BURST 0x00000020 diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/include/asm-sh/cpu-sh3/mmu_context.h sh-2.6/include/asm-sh/cpu-sh3/mmu_context.h --- sh-2.6-intc/include/asm-sh/cpu-sh3/mmu_context.h 2007-07-31 12:11:57.000000000 +0200 +++ sh-2.6/include/asm-sh/cpu-sh3/mmu_context.h 2007-08-03 10:01:33.000000000 +0200 @@ -27,12 +27,13 @@ #define TRA 0xffffffd0 #define EXPEVT 0xffffffd4 -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ - defined(CONFIG_CPU_SUBTYPE_SH7709) || \ +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ defined(CONFIG_CPU_SUBTYPE_SH7706) || \ - defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7707) || \ + defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7710) || \ defined(CONFIG_CPU_SUBTYPE_SH7712) || \ - defined(CONFIG_CPU_SUBTYPE_SH7710) + defined(CONFIG_CPU_SUBTYPE_SH7720) #define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */ #else #define INTEVT 0xffffffd8 diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/include/asm-sh/cpu-sh3/port.h sh-2.6/include/asm-sh/cpu-sh3/port.h diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/include/asm-sh/cpu-sh3/timer.h sh-2.6/include/asm-sh/cpu-sh3/timer.h --- sh-2.6-intc/include/asm-sh/cpu-sh3/timer.h 2007-07-31 12:11:57.000000000 +0200 +++ sh-2.6/include/asm-sh/cpu-sh3/timer.h 2007-08-03 10:05:16.000000000 +0200 @@ -23,11 +23,13 @@ * --------------------------------------------------------------------------- */ -#if !defined(CONFIG_CPU_SUBTYPE_SH7727) +#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && \ + !defined(CONFIG_CPU_SUBTYPE_SH7727) #define TMU_TOCR 0xfffffe90 /* Byte access */ #endif -#if defined(CONFIG_CPU_SUBTYPE_SH7710) +#if defined(CONFIG_CPU_SUBTYPE_SH7710) || \ + defined(CONFIG_CPU_SUBTYPE_SH7720) #define TMU_012_TSTR 0xa412fe92 /* Byte access */ #define TMU0_TCOR 0xa412fe94 /* Long access */ @@ -56,7 +58,8 @@ #define TMU2_TCOR 0xfffffeac /* Long access */ #define TMU2_TCNT 0xfffffeb0 /* Long access */ #define TMU2_TCR 0xfffffeb4 /* Word access */ -#if !defined(CONFIG_CPU_SUBTYPE_SH7727) +#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && \ + !defined(CONFIG_CPU_SUBTYPE_SH7727) #define TMU2_TCPR2 0xfffffeb8 /* Long access */ #endif #endif diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/include/asm-sh/cpu-sh3/ubc.h sh-2.6/include/asm-sh/cpu-sh3/ubc.h --- sh-2.6-intc/include/asm-sh/cpu-sh3/ubc.h 2007-07-04 21:46:47.000000000 +0200 +++ sh-2.6/include/asm-sh/cpu-sh3/ubc.h 2007-08-17 13:52:40.000000000 +0200 @@ -11,7 +11,8 @@ #ifndef __ASM_CPU_SH3_UBC_H #define __ASM_CPU_SH3_UBC_H -#if defined(CONFIG_CPU_SUBTYPE_SH7710) +#if defined(CONFIG_CPU_SUBTYPE_SH7710) || \ + defined(CONFIG_CPU_SUBTYPE_SH7720) #define UBC_BARA 0xa4ffffb0 #define UBC_BAMRA 0xa4ffffb4 #define UBC_BBRA 0xa4ffffb8 diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/include/asm-sh/gpio.h sh-2.6/include/asm-sh/gpio.h diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/include/asm-sh/magicpanelr2.h sh-2.6/include/asm-sh/magicpanelr2.h diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/include/asm-sh/port.h sh-2.6/include/asm-sh/port.h diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/include/asm-sh/processor.h sh-2.6/include/asm-sh/processor.h --- sh-2.6-intc/include/asm-sh/processor.h 2007-07-31 12:11:57.000000000 +0200 +++ sh-2.6/include/asm-sh/processor.h 2007-08-03 10:06:36.000000000 +0200 @@ -45,7 +45,7 @@ enum cpu_type { CPU_SH7705, CPU_SH7706, CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R, CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712, - CPU_SH7729, + CPU_SH7720, CPU_SH7729, /* SH-4 types */ CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, diff -X sh-2.6/Documentation/dontdiff -upNr sh-2.6-intc/include/asm-sh64/gpio.h sh-2.6/include/asm-sh64/gpio.h |
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From: Markus B. <sup...@go...> - 2007-08-17 22:35:51
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Hi, This adds gpio.h to asm-sh64 and asm-sh. On sh64 this is just a stub. On sh gpio.h will pull in port.h. gpio.h is already used by h8300 in sh-sci.h. Now all 3 architectures using sh-sci have a gpio.h Signed-off by: Markus Brunner <sup...@gm...> Signed-off by: Mark Jonas <to...@gm...> --- asm-sh/cpu-sh3/port.h | 67 ++++++++++++++++++++++++++++++++++++++++++++++++++ asm-sh/gpio.h | 10 +++++++ asm-sh/port.h | 22 ++++++++++++++++ asm-sh64/gpio.h | 8 +++++ 4 files changed, 107 insertions(+) --- sh-2.6-intc/include/asm-sh/cpu-sh3/port.h 1970-01-01 01:00:00.000000000 +0100 +++ sh-2.6/include/asm-sh/cpu-sh3/port.h 2007-08-03 09:33:54.000000000 +0200 @@ -0,0 +1,67 @@ +/* + * include/asm-sh/cpu-sh3/port.h + * + * Copyright (C) 2007 Markus Brunner, Mark Jonas + * + * Addresses for the Pin Function Controller + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#ifndef _CPU_SH3_PORT_H +#define _CPU_SH3_PORT_H + +#if defined(CONFIG_CPU_SUBTYPE_SH7720) + +/* Control registers */ +#define PORT_PACR 0xA4050100UL +#define PORT_PBCR 0xA4050102UL +#define PORT_PCCR 0xA4050104UL +#define PORT_PDCR 0xA4050106UL +#define PORT_PECR 0xA4050108UL +#define PORT_PFCR 0xA405010AUL +#define PORT_PGCR 0xA405010CUL +#define PORT_PHCR 0xA405010EUL +#define PORT_PJCR 0xA4050110UL +#define PORT_PKCR 0xA4050112UL +#define PORT_PLCR 0xA4050114UL +#define PORT_PMCR 0xA4050116UL +#define PORT_PPCR 0xA4050118UL +#define PORT_PRCR 0xA405011AUL +#define PORT_PSCR 0xA405011CUL +#define PORT_PTCR 0xA405011EUL +#define PORT_PUCR 0xA4050120UL +#define PORT_PVCR 0xA4050122UL + +/* Data registers */ +#define PORT_PADR 0xA4050140UL +/* Address of PORT_PBDR is wrong in the datasheet, see errata 2005-09-21 */ +#define PORT_PBDR 0xA4050142UL +#define PORT_PCDR 0xA4050144UL +#define PORT_PDDR 0xA4050146UL +#define PORT_PEDR 0xA4050148UL +#define PORT_PFDR 0xA405014AUL +#define PORT_PGDR 0xA405014CUL +#define PORT_PHDR 0xA405014EUL +#define PORT_PJDR 0xA4050150UL +#define PORT_PKDR 0xA4050152UL +#define PORT_PLDR 0xA4050154UL +#define PORT_PMDR 0xA4050156UL +#define PORT_PPDR 0xA4050158UL +#define PORT_PRDR 0xA405015AUL +#define PORT_PSDR 0xA405015CUL +#define PORT_PTDR 0xA405015EUL +#define PORT_PUDR 0xA4050160UL +#define PORT_PVDR 0xA4050162UL + +/* Pin Select Registers */ +#define PORT_PSELA 0xA4050124UL +#define PORT_PSELB 0xA4050126UL +#define PORT_PSELC 0xA4050128UL +#define PORT_PSELD 0xA405012AUL + +#endif + +#endif --- sh-2.6-intc/include/asm-sh/gpio.h 1970-01-01 01:00:00.000000000 +0100 +++ sh-2.6/include/asm-sh/gpio.h 2007-08-17 13:44:10.000000000 +0200 @@ -0,0 +1,10 @@ +#ifndef __ASM_SH_GPIO_H +#define __ASM_SH_GPIO_H + +/* + * This is just a stub, so that every arch using sh-sci has a gpio.h + */ + +#include <asm/port.h> + +#endif /* __ASM_SH_GPIO_H */ --- sh-2.6-intc/include/asm-sh/port.h 1970-01-01 01:00:00.000000000 +0100 +++ sh-2.6/include/asm-sh/port.h 2007-08-03 09:33:54.000000000 +0200 @@ -0,0 +1,22 @@ +/* + * include/asm-sh/port.h + * + * Copyright (C) 2007 Markus Brunner, Mark Jonas + * + * Addresses for the Pin Function Controller + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#ifndef _ASM_SH_PORT_H +#define _ASM_SH_PORT_H + +#if defined(CONFIG_CPU_SH3) + +#include <asm/cpu/port.h> + +#endif + +#endif --- sh-2.6-intc/include/asm-sh64/gpio.h 1970-01-01 01:00:00.000000000 +0100 +++ sh-2.6/include/asm-sh64/gpio.h 2007-08-17 13:40:35.000000000 +0200 @@ -0,0 +1,8 @@ +#ifndef __ASM_SH64_GPIO_H +#define __ASM_SH64_GPIO_H + +/* + * This is just a stub, so that every arch using sh-sci has a gpio.h + */ + +#endif /* __ASM_SH64_GPIO_H */ |
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From: Markus B. <sup...@go...> - 2007-08-17 22:35:48
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Hi, this adds basic support for the Magic Panel R2 board. The irq initialisation was migrated to the new intc code. This reduced the size of the irq setup considerably, and because of that got merged into setup.c The write size for the heartbeat module was adjusted with an ifdef The patch for the default config is attached. The default config won't compile, but this is a general dsp problem since 2.6.23-rc1 http://marc.info/?l=linuxsh-dev&m=118734760923296&w=2 Signed-off by: Markus Brunner <sup...@gm...> Signed-off by: Mark Jonas <to...@gm...> --- arch/sh/Kconfig | 7 arch/sh/Makefile | 1 arch/sh/boards/magicpanelr2/Kconfig | 13 + arch/sh/boards/magicpanelr2/Makefile | 5 arch/sh/boards/magicpanelr2/setup.c | 319 +++++++++++++++++++++++++++++++++++ arch/sh/drivers/heartbeat.c | 4 include/asm-sh/magicpanelr2.h | 67 +++++++ 7 files changed, 416 insertions(+) --- sh-2.6-intc/arch/sh/boards/magicpanelr2/Kconfig 1970-01-01 01:00:00.000000000 +0100 +++ sh-2.6/arch/sh/boards/magicpanelr2/Kconfig 2007-08-03 10:16:35.000000000 +0200 @@ -0,0 +1,13 @@ +if SH_MAGIC_PANEL_R2 + +menu "Magic Panel R2 options" + +config SH_MAGIC_PANEL_R2_VERSION + int SH_MAGIC_PANEL_R2_VERSION + default "3" + help + Set the version of the Magic Panel R2 + +endmenu + +endif --- sh-2.6-intc/arch/sh/boards/magicpanelr2/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ sh-2.6/arch/sh/boards/magicpanelr2/Makefile 2007-08-16 17:16:42.000000000 +0200 @@ -0,0 +1,5 @@ +# +# Makefile for the Magic Panel specific parts +# + +obj-y := setup.o \ No newline at end of file --- sh-2.6-intc/arch/sh/boards/magicpanelr2/setup.c 1970-01-01 01:00:00.000000000 +0100 +++ sh-2.6/arch/sh/boards/magicpanelr2/setup.c 2007-08-17 11:28:54.000000000 +0200 @@ -0,0 +1,319 @@ +/* + * linux/arch/sh/boards/magicpanel/setup.c + * + * Copyright (C) 2007 Markus Brunner, Mark Jonas + * + * Magic Panel Release 2 board setup + * + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include <linux/autoconf.h> +#include <linux/init.h> +#include <linux/irq.h> +#include <linux/platform_device.h> + +#include <linux/hdreg.h> +#include <linux/ide.h> +#include <asm/magicpanelr2.h> +#include <linux/irq.h> +#include <linux/delay.h> + +static void __init setup_chip_select(void); +static int __init ethernet_reset_finished(void); +static void __init setup_port_multiplexing(void); +static void __init reset_ethernet(void); + +#define LAN9115_READY (ctrl_inl(0xA8000084UL) & 0x00000001UL) + +/* Wait until reset finished. Timeout is 100ms. */ +static int __init ethernet_reset_finished(void) +{ + int i; + + if (LAN9115_READY) + return 1; + + for (i = 0; i < 10; ++i) { + mdelay(10); + if (LAN9115_READY) + return 1; + } + + return 0; +} + +static void __init reset_ethernet(void) +{ + /* PMDR: LAN_RESET=on */ + CLRBITS_OUTB(0x10, PORT_PMDR); + + udelay(200); + + /* PMDR: LAN_RESET=off */ + SETBITS_OUTB(0x10, PORT_PMDR); +} + +static void __init setup_chip_select(void) +{ + /* CS2: LAN (0x08000000 - 0x0bffffff) */ + /* no idle cycles, normal space, 8 bit data bus */ + ctrl_outl(0x36db0400, CS2BCR); + /* (SW:1.5 WR:3 HW:1.5), ext. wait */ + ctrl_outl(0x000003c0, CS2WCR); + + /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */ + /* no idle cycles, normal space, 8 bit data bus */ + ctrl_outl(0x00000200, CS4BCR); + /* (SW:1.5 WR:3 HW:1.5), ext. wait */ + ctrl_outl(0x00100981, CS4WCR); + + /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */ + /* no idle cycles, normal space, 8 bit data bus */ + ctrl_outl(0x00000200, CS5ABCR); + /* (SW:1.5 WR:3 HW:1.5), ext. wait */ + ctrl_outl(0x00100981, CS5AWCR); + + /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */ + /* no idle cycles, normal space, 8 bit data bus */ + ctrl_outl(0x00000200, CS5BBCR); + /* (SW:1.5 WR:3 HW:1.5), ext. wait */ + ctrl_outl(0x00100981, CS5BWCR); + + /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */ + /* no idle cycles, normal space, 8 bit data bus */ + ctrl_outl(0x00000200, CS6ABCR); + /* (SW:1.5 WR:3 HW:1.5), no ext. wait */ + ctrl_outl(0x001009C1, CS6AWCR); +} + +static void __init setup_port_multiplexing(void) +{ + /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5); + * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1); + */ + ctrl_outw(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */ + + /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1); + * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0); + */ + ctrl_outw(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */ + + /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4); + * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0; + */ + ctrl_outw(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */ + + /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4); + * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0); + */ + ctrl_outw(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */ + + /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP; + * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM; + */ + ctrl_outw(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */ + + /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3; + * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc); + */ + ctrl_outw(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */ + + /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2); + * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9); + */ + ctrl_outw(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */ + + /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE); + * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR; + */ + ctrl_outw(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */ + + /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3; + * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC; + */ + ctrl_outw(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */ + + /* K7 (x); K6 (x); K5 (x); K4 (x); + * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY) + */ + ctrl_outw(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */ + + /* L7 TRST; L6 TMS; L5 TDO; L4 TDI; + * L3 TCK; L2 (x); L1 (x); L0 (x); + */ + ctrl_outw(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */ + + /* M7 GPO(CURRENT_SINK); M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED); + * M4 GPO(LAN_RESET); M3 GPO(BUZZER); M2 GPO(LCD_BL); + * M1 CS5B(CAN3_CS); M0 GPI+(nc); + */ + ctrl_outw(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */ + + /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit, + * LAN_RESET=off, BUZZER=off, LCD_BL=off + */ +#if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2 + ctrl_outb(0x30, PORT_PMDR); +#elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3 + ctrl_outb(0xF0, PORT_PMDR); +#else +#error Unknown revision of PLATFORM_MP_R2 +#endif + + /* P7 (x); P6 (x); P5 (x); + * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ); + * P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ) + */ + ctrl_outw(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */ + ctrl_outb(0x10, PORT_PPDR); + + /* R7 A25; R6 A24; R5 A23; R4 A22; + * R3 A21; R2 A20; R1 A19; R0 A0; + */ + ctrl_outw(0x0000, PORT_PRCR); /* 00 00 00 00 00 00 00 00 */ + + /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2); + * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK; + */ + ctrl_outw(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */ + + /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS; + * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG) + */ + ctrl_outw(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */ + + /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT); + * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK; + */ + ctrl_outw(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */ + + /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2); + * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT); + */ + ctrl_outw(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */ +} + +static void __init mpr2_setup(char **cmdline_p) +{ + __set_io_port_base(0xa0000000); + + /* set Pin Select Register A: + * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2, + * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND + */ + ctrl_outw(0xAABC, PORT_PSELA); + /* set Pin Select Register B: + * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC, + * LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved + */ + ctrl_outw(0x3C00, PORT_PSELB); + /* set Pin Select Register C: + * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved + */ + ctrl_outw(0x0000, PORT_PSELC); + /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK, + * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved + */ + ctrl_outw(0x0000, PORT_PSELD); + /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */ + ctrl_outw(0x0101, PORT_UTRCTL); + /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */ + ctrl_outw(0xA5C0, PORT_UCLKCR_W); + + setup_chip_select(); + + setup_port_multiplexing(); + + reset_ethernet(); + + printk(KERN_INFO "Magic Panel Release 2 A.%i\n", + CONFIG_SH_MAGIC_PANEL_R2_VERSION); + + if (ethernet_reset_finished() == 0) + printk(KERN_WARNING "Ethernet not ready\n"); +} + +static struct resource smc911x_resources[] = { + [0] = { + .start = 0xa8000000, + .end = 0xabffffff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 35, + .end = 35, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device smc911x_device = { + .name = "smc911x", + .id = -1, + .num_resources = ARRAY_SIZE(smc911x_resources), + .resource = smc911x_resources, +}; + +static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 }; + +static struct resource heartbeat_resources[] = { + [0] = { + .start = PA_LED, + .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device heartbeat_device = { + .name = "heartbeat", + .id = -1, + .dev = { + .platform_data = heartbeat_bit_pos, + }, + .num_resources = ARRAY_SIZE(heartbeat_resources), + .resource = heartbeat_resources, +}; + +static struct platform_device *mpr2_devices[] __initdata = { + &heartbeat_device, + &smc911x_device, +}; + +static int __init mpr2_devices_setup(void) +{ + return platform_add_devices(mpr2_devices, ARRAY_SIZE(mpr2_devices)); +} +device_initcall(mpr2_devices_setup); + +/* + * Initialize IRQ setting + */ +void __init init_mpr2_IRQ(void) +{ + plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-5 */ + + set_irq_type(32, IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */ + set_irq_type(33, IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */ + set_irq_type(34, IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */ + set_irq_type(35, IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */ + set_irq_type(36, IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */ + set_irq_type(37, IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */ + + intc_set_priority(32, 13); /* IRQ0 CAN1 */ + intc_set_priority(33, 13); /* IRQ0 CAN2 */ + intc_set_priority(34, 13); /* IRQ0 CAN3 */ + intc_set_priority(35, 6); /* IRQ3 SMSC9115 */ +} + +/* + * The Machine Vector + */ + +static struct sh_machine_vector mv_mpr2 __initmv = { + .mv_name = "mpr2", + .mv_setup = mpr2_setup, + .mv_init_irq = init_mpr2_IRQ, +}; --- sh-2.6-intc/arch/sh/drivers/heartbeat.c 2007-07-31 12:11:46.000000000 +0200 +++ sh-2.6/arch/sh/drivers/heartbeat.c 2007-08-03 10:09:05.000000000 +0200 @@ -39,7 +39,11 @@ static void heartbeat_timer(unsigned lon struct heartbeat_data *hd = (struct heartbeat_data *)data; static unsigned bit = 0, up = 1; +#if defined(CONFIG_SH_MAGIC_PANEL_R2) + ctrl_outb(~(1 << hd->bit_pos[bit]), (unsigned long)hd->base); +#else ctrl_outw(1 << hd->bit_pos[bit], (unsigned long)hd->base); +#endif bit += up; if ((bit == 0) || (bit == ARRAY_SIZE(hd->bit_pos)-1)) up = -up; --- sh-2.6-intc/arch/sh/Kconfig 2007-08-08 22:59:29.000000000 +0200 +++ sh-2.6/arch/sh/Kconfig 2007-08-16 15:52:11.000000000 +0200 @@ -395,11 +395,18 @@ config SH_X3PROTO bool "SH-X3 Prototype board" depends on CPU_SUBTYPE_SHX3 +config SH_MAGIC_PANEL_R2 + bool "Magic Panel R2" + depends on CPU_SUBTYPE_SH7720 + help + Select Magic Panel R2 if configuring for Magic Panel R2. + endmenu source "arch/sh/boards/renesas/hs7751rvoip/Kconfig" source "arch/sh/boards/renesas/rts7751r2d/Kconfig" source "arch/sh/boards/renesas/r7780rp/Kconfig" +source "arch/sh/boards/magicpanelr2/Kconfig" menu "Timer and clock configuration" --- sh-2.6-intc/arch/sh/Makefile 2007-08-14 08:33:48.000000000 +0200 +++ sh-2.6/arch/sh/Makefile 2007-08-17 13:11:28.000000000 +0200 @@ -111,6 +111,7 @@ machdir-$(CONFIG_SH_SHMIN) += shmin machdir-$(CONFIG_SH_7206_SOLUTION_ENGINE) += se/7206 machdir-$(CONFIG_SH_7619_SOLUTION_ENGINE) += se/7619 machdir-$(CONFIG_SH_LBOX_RE2) += lboxre2 +machdir-$(CONFIG_SH_MAGIC_PANEL_R2) += magicpanelr2 incdir-y := $(notdir $(machdir-y)) --- sh-2.6-intc/include/asm-sh/magicpanelr2.h 1970-01-01 01:00:00.000000000 +0100 +++ sh-2.6/include/asm-sh/magicpanelr2.h 2007-08-17 08:28:52.000000000 +0200 @@ -0,0 +1,67 @@ +/* + * include/asm-sh/magicpanelr2.h + * + * Copyright (C) 2007 Markus Brunner, Mark Jonas + * + * I/O addresses and bitmasks for Magic Panel Release 2 board + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#ifndef __ASM_SH_MAGICPANELR2_H +#define __ASM_SH_MAGICPANELR2_H + +#include <asm/port.h> + +#define __IO_PREFIX mpr2 +#include <asm/io_generic.h> + + +#define SETBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) | mask, reg) +#define SETBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) | mask, reg) +#define SETBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) | mask, reg) +#define CLRBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) & ~mask, reg) +#define CLRBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) & ~mask, reg) +#define CLRBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) & ~mask, reg) + + +#define PA_LED PORT_PADR /* LED */ + + +/* BSC */ +#define CMNCR 0xA4FD0000UL +#define CS0BCR 0xA4FD0004UL +#define CS2BCR 0xA4FD0008UL +#define CS3BCR 0xA4FD000CUL +#define CS4BCR 0xA4FD0010UL +#define CS5ABCR 0xA4FD0014UL +#define CS5BBCR 0xA4FD0018UL +#define CS6ABCR 0xA4FD001CUL +#define CS6BBCR 0xA4FD0020UL +#define CS0WCR 0xA4FD0024UL +#define CS2WCR 0xA4FD0028UL +#define CS3WCR 0xA4FD002CUL +#define CS4WCR 0xA4FD0030UL +#define CS5AWCR 0xA4FD0034UL +#define CS5BWCR 0xA4FD0038UL +#define CS6AWCR 0xA4FD003CUL +#define CS6BWCR 0xA4FD0040UL + + +/* usb */ + +#define PORT_UTRCTL 0xA405012CUL +#define PORT_UCLKCR_W 0xA40A0008UL + +#define INTC_ICR0 0xA414FEE0UL +#define INTC_ICR1 0xA4140010UL +#define INTC_ICR2 0xA4140012UL + +/* MTD */ + +#define MPR2_MTD_BOOTLOADER_SIZE 0x00060000UL +#define MPR2_MTD_KERNEL_SIZE 0x00200000UL + +#endif /* __ASM_SH_MAGICPANELR2_H */ |
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From: Markus B. <sup...@go...> - 2007-08-17 22:35:45
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Hi,
this adds a MTD mapping for the onboard NOR flash on the Magic Panel R2.
The mapping module is based on the solutionengine mapping module.
Signed-off by: Markus Brunner <sup...@gm...>
Signed-off by: Mark Jonas <to...@gm...>
---
Kconfig | 6 +++
Makefile | 1
magicpanelr2.c | 98 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 105 insertions(+)
--- sh-2.6-intc/drivers/mtd/maps/Kconfig 2007-07-31 12:11:48.000000000 +0200
+++ sh-2.6/drivers/mtd/maps/Kconfig 2007-08-16 16:24:29.000000000 +0200
@@ -407,6 +407,12 @@ config MTD_SOLUTIONENGINE
This enables access to the flash chips on the Hitachi SolutionEngine and
similar boards. Say 'Y' if you are building a kernel for such a board.
+config MTD_MAGICPANELR2
+ tristate "CFI Flash device mapped on Magic Panel R2"
+ depends on SUPERH && MTD_CFI && MTD_REDBOOT_PARTS
+ help
+ This enables access to the flash chip on the Magic Panel R2.
+
config MTD_ARM_INTEGRATOR
tristate "CFI Flash device mapped on ARM Integrator/P720T"
depends on ARM && MTD_CFI
--- sh-2.6-intc/drivers/mtd/maps/magicpanelr2.c 1970-01-01 01:00:00.000000000 +0100
+++ sh-2.6/drivers/mtd/maps/magicpanelr2.c 2007-08-17 14:30:37.000000000 +0200
@@ -0,0 +1,98 @@
+/*
+ * Copyright (C) 2007 Markus Brunner, Mark Jonas
+ *
+ * Flash on Magic Panel R2 board.
+ *
+ * Based on solutionengine.c
+ *
+ * (C) 2001 Red Hat, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/partitions.h>
+#include <linux/errno.h>
+#include <asm/magicpanelr2.h>
+
+static struct mtd_info *flash_mtd;
+
+struct map_info mpr2_flash_map = {
+ .name = "Magic Panel R2 Flash",
+ .size = 0x2000000UL,
+ .bankwidth = 2,
+};
+static struct mtd_partition *parsed_parts;
+
+static const char *probes[] = { "RedBoot", "cmdlinepart", NULL };
+
+static struct mtd_partition mpr2_partitions[] = {
+ /* Reserved for bootloader, read-only */
+ {
+ .name = "Bootloader",
+ .offset = 0x00000000UL,
+ .size = MPR2_MTD_BOOTLOADER_SIZE,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ /* Reserved for kernel image */
+ {
+ .name = "Kernel Image",
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = MPR2_MTD_KERNEL_SIZE,
+ },
+ /* Rest is used for Flash FS */
+ {
+ .name = "Flash FS",
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = MTDPART_SIZ_FULL,
+ }
+};
+
+static int __init init_mpr2_maps(void)
+{
+ int nr_parts = 0;
+
+ /* Probe at offset 0 */
+ mpr2_flash_map.phys = 0x00000000UL;
+ mpr2_flash_map.virt = (void __iomem *)P2SEGADDR(0x00000000UL);
+ simple_map_init(&mpr2_flash_map);
+
+ flash_mtd = do_map_probe("cfi_probe", &mpr2_flash_map);
+
+ flash_mtd->owner = THIS_MODULE;
+
+ /* Check if there is a partition table */
+ nr_parts = parse_mtd_partitions(flash_mtd, probes, &parsed_parts, 0);
+
+ /* If there is no partition table, used the hard coded table */
+ if (nr_parts <= 0) {
+ parsed_parts = mpr2_partitions;
+ nr_parts = sizeof(mpr2_partitions)/sizeof(*parsed_parts);
+ }
+
+ /* Add partitions */
+ add_mtd_partitions(flash_mtd, parsed_parts, nr_parts);
+
+ return 0;
+}
+
+static void __exit cleanup_mpr2_maps(void)
+{
+ del_mtd_partitions(flash_mtd);
+ map_destroy(flash_mtd);
+}
+
+module_init(init_mpr2_maps);
+module_exit(cleanup_mpr2_maps);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Mark Jonas <to...@gm...>");
+MODULE_DESCRIPTION("MTD map driver for Magic Panel R2");
--- sh-2.6-intc/drivers/mtd/maps/Makefile 2007-07-31 12:11:48.000000000 +0200
+++ sh-2.6/drivers/mtd/maps/Makefile 2007-08-14 13:23:32.000000000 +0200
@@ -71,3 +71,4 @@ obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o
obj-$(CONFIG_MTD_TQM834x) += tqm834x.o
+obj-$(CONFIG_MTD_MAGICPANELR2) += magicpanelr2.o
\ No newline at end of file
|
|
From: Markus B. <sup...@go...> - 2007-08-17 22:35:41
|
Hi, this are the changes to the smc911x driver. It was necessary to set the irq sense to low level. Signed-off by: Markus Brunner <sup...@gm...> Signed-off by: Mark Jonas <to...@gm...> --- Kconfig | 2 +- smc911x.c | 2 +- smc911x.h | 6 ++++++ 3 files changed, 8 insertions(+), 2 deletions(-) --- sh-2.6-intc/drivers/net/Kconfig 2007-08-02 07:05:16.000000000 +0200 +++ sh-2.6/drivers/net/Kconfig 2007-08-03 09:46:20.000000000 +0200 @@ -944,7 +944,7 @@ config SMC911X tristate "SMSC LAN911[5678] support" select CRC32 select MII - depends on ARCH_PXA + depends on ARCH_PXA || SUPERH help This is a driver for SMSC's LAN911x series of Ethernet chipsets including the new LAN9115, LAN9116, LAN9117, and LAN9118. --- sh-2.6-intc/drivers/net/smc911x.c 2007-07-04 21:46:34.000000000 +0200 +++ sh-2.6/drivers/net/smc911x.c 2007-08-14 10:43:16.000000000 +0200 @@ -2084,7 +2084,7 @@ static int __init smc911x_probe(struct n /* Grab the IRQ */ retval = request_irq(dev->irq, &smc911x_interrupt, - IRQF_SHARED | IRQF_TRIGGER_FALLING, dev->name, dev); + IRQF_SHARED | SMC_IRQ_SENSE, dev->name, dev); if (retval) goto err_out; --- sh-2.6-intc/drivers/net/smc911x.h 2007-07-04 21:46:34.000000000 +0200 +++ sh-2.6/drivers/net/smc911x.h 2007-08-10 13:16:34.000000000 +0200 @@ -36,6 +36,12 @@ #define SMC_USE_PXA_DMA 1 #define SMC_USE_16BIT 0 #define SMC_USE_32BIT 1 + #define SMC_IRQ_SENSE IRQF_TRIGGER_FALLING +#elif CONFIG_SH_MAGIC_PANEL_R2 + #define SMC_USE_SH_DMA 0 + #define SMC_USE_16BIT 0 + #define SMC_USE_32BIT 1 + #define SMC_IRQ_SENSE IRQF_TRIGGER_LOW #endif |
|
From: Markus B. <sup...@go...> - 2007-08-17 22:35:41
|
Hi, this series of five patches adds support for the SH7720 SH3-DSP CPU and the Magic Panel R2 board. It is mainly a implementation of the suggestions from the last submit. http://marc.info/?t=118517478600003&r=1&w=2 http://marc.info/?t=118517500600005&r=1&w=2 Changes since the last submit are: - migrated to the new intc interrupt code - use RTC capabilities 4 digit year - added early_printk support - added MTD mapping - added gpio.h to asm-sh and asm-sh64 and include it from sh-sci.h - use clock-sh7710.c instead of specific 7720 clock - modified smc911x to request low level triggered irq arch/sh/Kconfig | 7 arch/sh/Kconfig.debug | 1 arch/sh/Makefile | 1 arch/sh/boards/magicpanelr2/Kconfig | 13 + arch/sh/boards/magicpanelr2/Makefile | 5 arch/sh/boards/magicpanelr2/setup.c | 319 ++++++++++++++++++++++++++++++++++ arch/sh/drivers/dma/Kconfig | 1 arch/sh/drivers/dma/dma-sh.c | 12 - arch/sh/drivers/heartbeat.c | 4 arch/sh/kernel/cpu/sh3/Makefile | 2 arch/sh/kernel/cpu/sh3/probe.c | 3 arch/sh/kernel/cpu/sh3/setup-sh7720.c | 211 ++++++++++++++++++++++ arch/sh/kernel/early_printk.c | 38 +++- arch/sh/kernel/setup.c | 2 arch/sh/kernel/timers/timer-tmu.c | 3 arch/sh/mm/Kconfig | 8 drivers/mtd/maps/Kconfig | 6 drivers/mtd/maps/Makefile | 1 drivers/mtd/maps/magicpanelr2.c | 98 ++++++++++ drivers/net/Kconfig | 2 drivers/net/smc911x.c | 2 drivers/net/smc911x.h | 6 drivers/serial/sh-sci.c | 33 +++ drivers/serial/sh-sci.h | 33 ++- include/asm-sh/cpu-sh3/cache.h | 4 include/asm-sh/cpu-sh3/dma.h | 13 + include/asm-sh/cpu-sh3/mmu_context.h | 9 include/asm-sh/cpu-sh3/port.h | 67 +++++++ include/asm-sh/cpu-sh3/timer.h | 9 include/asm-sh/cpu-sh3/ubc.h | 3 include/asm-sh/gpio.h | 10 + include/asm-sh/magicpanelr2.h | 67 +++++++ include/asm-sh/port.h | 22 ++ include/asm-sh/processor.h | 2 include/asm-sh64/gpio.h | 8 35 files changed, 996 insertions(+), 29 deletions(-) |
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From: EXTERNAL B. M. (P. ST-FIR/Eng) <ext...@de...> - 2007-08-17 10:46:46
|
Hi, I'm getting the following compiler error when trying to compile any sh3 dsp AS arch/sh/kernel/cpu/sh3/entry.o arch/sh/kernel/cpu/sh3/entry.S: Assembler messages: arch/sh/kernel/cpu/sh3/entry.S:271: Error: unknown opcode arch/sh/kernel/cpu/sh3/entry.S:272: Error: unknown opcode arch/sh/kernel/cpu/sh3/entry.S:273: Error: unknown opcode arch/sh/kernel/cpu/sh3/entry.S:274: Error: unknown opcode arch/sh/kernel/cpu/sh3/entry.S:275: Error: unknown opcode arch/sh/kernel/cpu/sh3/entry.S:278: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:279: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:280: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:281: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:282: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:283: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:284: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:285: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:286: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:439: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:440: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:441: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:442: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:443: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:444: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:445: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:446: Error: invalid operands for opcode arch/sh/kernel/cpu/sh3/entry.S:447: Error: invalid operands for opcode make[3]: *** [arch/sh/kernel/cpu/sh3/entry.o] Error 1 make[2]: *** [arch/sh/kernel/cpu/sh3] Error 2 make[1]: *** [arch/sh/kernel/cpu] Error 2 I figured out that this was introduced by 2.6.23-rc1 when the following line was removed from arch/sh/Makefile cflags-$(CONFIG_SH_DSP) +=3D -Wa,-dsp Was it accidently removed, or is there any sense? Regards Markus |
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From: Paul M. <le...@li...> - 2007-08-16 16:28:32
|
On Thu, Aug 16, 2007 at 02:18:56PM +0100, Andy Whitcroft wrote: > It seems we have gained an extraneous trailing ';' on one of the > wait loops in scif_sercon_putc(). Although this is completely > benign as the apparent payload is also the empty statement, it > invites error in the future. Clean it up now. > > Signed-off-by: Andy Whitcroft <ap...@sh...> Applied, thanks. |
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From: Paul M. <le...@li...> - 2007-08-16 15:56:45
|
On Wed, Aug 15, 2007 at 11:16:27AM +0900, Magnus Damm wrote: > sh: intc - mark data structures as __initdata V2 On Wed, Aug 15, 2007 at 11:50:33AM +0900, Magnus Damm wrote: > sh: fix irqs for the second serial port on sh7206 On Thu, Aug 16, 2007 at 07:21:21PM +0900, Magnus Damm wrote: > sh: intc - primary priority masking fixes V2 On Thu, Aug 16, 2007 at 07:26:40PM +0900, Magnus Damm wrote: > sh: intc - add support for sh7619 On Thu, Aug 16, 2007 at 07:28:58PM +0900, Magnus Damm wrote: > sh: intc - add support for sh7206 Applied and pushed out, thanks. |
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From: Paul M. <le...@li...> - 2007-08-16 15:49:20
|
On Wed, Aug 15, 2007 at 11:27:23AM +0900, Magnus Damm wrote: > sh: defconfigs for R2D-PLUS and for R2D-1 > > This patch removes the old r2d config file named rts7751r2d_defconfig and adds > separate config files for the two r2d board versions. The two new defconfigs > are identical with the exception of board selection: > > - rts7751r2dplus_defconfig selects CONFIG_RTS7751R2D_PLUS=y > - rts7751r2d1_defconfig selects CONFIG_RTS7751R2D_1=y > > Please remember to update both files with r2d changes in the future. > > Signed-off-by: Magnus Damm <da...@ig...> > --- > > arch/sh/configs/rts7751r2d1_defconfig | 1167 +++++++++++++++++++++++++ > arch/sh/configs/rts7751r2d_defconfig | 1353 ------------------------------ > arch/sh/configs/rts7751r2dplus_defconfig | 1167 +++++++++++++++++++++++++ > 3 files changed, 2334 insertions(+), 1353 deletions(-) > This patch causes rejects when applying? Can you double check this and re-submit? |
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From: Paul M. <le...@li...> - 2007-08-16 15:33:55
|
On Tue, Aug 14, 2007 at 05:08:16PM +0900, Katsuya MATSUBARA wrote: > sh: replace mutexes which are used in SH-4 user page copy/clear > functions in 2.6.22.X > > This patch replaces mutexes in copy_user_pages() and clear_user_pages() > for SH-4 in 2.6.22.X. A 2.6.22.X kernel with CONFIG_PREEMPT_VOLUNTARY=y > shows the following error because mutexes are sleepable. > This has already been fixed in current git by kmap_coherent(), including reclaiming the beginning of P3 space for vmalloc. |
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From: Paul M. <le...@li...> - 2007-08-16 15:32:04
|
On Tue, Aug 14, 2007 at 07:45:34PM +0900, Magnus Damm wrote: > On 8/14/07, Paul Mundt <le...@li...> wrote: > > On Mon, Aug 13, 2007 at 11:49:21AM +0900, Magnus Damm wrote: > > The current API works fine for this. the trigger flag is going to be > > board-specific in the terms of most drivers, and conventional wisdom > > dictates that the pin said peripheral's interrupt line is connected to is > > able to do sense selection based on what the peripheral mandates. > > How do we handle the case when say an ethernet controller can be > configured as either edge or level, but the stupid FPGA interrupt > controller only does only support one of them? > > The driver for the ethernet controller is of course totally > disconnected from the interrupt controller code. But the ethernet > controller hardware does support both edge and level triggered > interrupts - just configure a certain register to switch mode. Can we > handle that today? > We handle this today based on the board configuration. Regardless of what the controller supports, there is always going to be board-specific glue for this. This is true for things like buswidth, IRQ sense, and so on. This is not something that can be implemented transparently, it's ultimately up to the system integrator to know how this is wired up on their particular platform and clue the driver in accordingly. The board folks do have to know what they are doing at least some of the time. |
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From: Magnus D. <mag...@gm...> - 2007-08-16 10:31:33
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sh: intc - add support for sh7206
This patch converts the cpu specific interrupt setup code for sh7206 from ipr
to intc. New vectors are also added to match the information provided by the
datasheet.
Signed-off-by: Magnus Damm <da...@ig...>
---
Compiles but needs testing on real target hardware.
arch/sh/kernel/cpu/sh2a/setup-sh7206.c | 209 ++++++++++++++++++++++++--------
arch/sh/mm/Kconfig | 2
2 files changed, 159 insertions(+), 52 deletions(-)
--- 0005/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ work/arch/sh/kernel/cpu/sh2a/setup-sh7206.c 2007-08-15 18:20:42.000000000 +0900
@@ -12,6 +12,163 @@
#include <linux/serial.h>
#include <asm/sci.h>
+enum {
+ UNUSED = 0,
+
+ /* interrupt sources */
+ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
+ PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
+ ADC_ADI0, ADC_ADI1,
+ DMAC0_DEI, DMAC0_HEI, DMAC1_DEI, DMAC1_HEI,
+ DMAC2_DEI, DMAC2_HEI, DMAC3_DEI, DMAC3_HEI,
+ DMAC4_DEI, DMAC4_HEI, DMAC5_DEI, DMAC5_HEI,
+ DMAC6_DEI, DMAC6_HEI, DMAC7_DEI, DMAC7_HEI,
+ CMT0, CMT1, BSC, WDT,
+ MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
+ MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
+ MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
+ MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
+ MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
+ MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
+ MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W,
+ POE2_OEI1, POE2_OEI2,
+ MTU2S_TGI3A, MTU2S_TGI3B, MTU2S_TGI3C, MTU2S_TGI3D, MTU2S_TCI3V,
+ MTU2S_TGI4A, MTU2S_TGI4B, MTU2S_TGI4C, MTU2S_TGI4D, MTU2S_TCI4V,
+ MTU2S_TGI5U, MTU2S_TGI5V, MTU2S_TGI5W,
+ POE2_OEI3,
+ IIC3_STPI, IIC3_NAKI, IIC3_RXI, IIC3_TXI, IIC3_TEI,
+ SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
+ SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
+ SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
+ SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,
+
+ /* interrupt groups */
+ PINT, DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,
+ MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,
+ MTU3_ABCD, MTU4_ABCD, MTU5, POE2_12, MTU3S_ABCD, MTU4S_ABCD, MTU5S,
+ IIC3, SCIF0, SCIF1, SCIF2, SCIF3,
+};
+
+static struct intc_vect vectors[] __initdata = {
+ INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
+ INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
+ INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69),
+ INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71),
+ INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81),
+ INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),
+ INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
+ INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),
+ INTC_IRQ(ADC_ADI0, 92), INTC_IRQ(ADC_ADI1, 96),
+ INTC_IRQ(DMAC0_DEI, 108), INTC_IRQ(DMAC0_HEI, 109),
+ INTC_IRQ(DMAC1_DEI, 112), INTC_IRQ(DMAC1_HEI, 113),
+ INTC_IRQ(DMAC2_DEI, 116), INTC_IRQ(DMAC2_HEI, 117),
+ INTC_IRQ(DMAC3_DEI, 120), INTC_IRQ(DMAC3_HEI, 121),
+ INTC_IRQ(DMAC4_DEI, 124), INTC_IRQ(DMAC4_HEI, 125),
+ INTC_IRQ(DMAC5_DEI, 128), INTC_IRQ(DMAC5_HEI, 129),
+ INTC_IRQ(DMAC6_DEI, 132), INTC_IRQ(DMAC6_HEI, 133),
+ INTC_IRQ(DMAC7_DEI, 136), INTC_IRQ(DMAC7_HEI, 137),
+ INTC_IRQ(CMT0, 140), INTC_IRQ(CMT1, 144),
+ INTC_IRQ(BSC, 148), INTC_IRQ(WDT, 152),
+ INTC_IRQ(MTU2_TGI0A, 156), INTC_IRQ(MTU2_TGI0B, 157),
+ INTC_IRQ(MTU2_TGI0C, 158), INTC_IRQ(MTU2_TGI0D, 159),
+ INTC_IRQ(MTU2_TCI0V, 160),
+ INTC_IRQ(MTU2_TGI0E, 161), INTC_IRQ(MTU2_TGI0F, 162),
+ INTC_IRQ(MTU2_TGI1A, 164), INTC_IRQ(MTU2_TGI1B, 165),
+ INTC_IRQ(MTU2_TCI1V, 168), INTC_IRQ(MTU2_TCI1U, 169),
+ INTC_IRQ(MTU2_TGI2A, 172), INTC_IRQ(MTU2_TGI2B, 173),
+ INTC_IRQ(MTU2_TCI2V, 176), INTC_IRQ(MTU2_TCI2U, 177),
+ INTC_IRQ(MTU2_TGI3A, 180), INTC_IRQ(MTU2_TGI3B, 181),
+ INTC_IRQ(MTU2_TGI3C, 182), INTC_IRQ(MTU2_TGI3D, 183),
+ INTC_IRQ(MTU2_TCI3V, 184),
+ INTC_IRQ(MTU2_TGI4A, 188), INTC_IRQ(MTU2_TGI4B, 189),
+ INTC_IRQ(MTU2_TGI4C, 190), INTC_IRQ(MTU2_TGI4D, 191),
+ INTC_IRQ(MTU2_TCI4V, 192),
+ INTC_IRQ(MTU2_TGI5U, 196), INTC_IRQ(MTU2_TGI5V, 197),
+ INTC_IRQ(MTU2_TGI5W, 198),
+ INTC_IRQ(POE2_OEI1, 200), INTC_IRQ(POE2_OEI2, 201),
+ INTC_IRQ(MTU2S_TGI3A, 204), INTC_IRQ(MTU2S_TGI3B, 205),
+ INTC_IRQ(MTU2S_TGI3C, 206), INTC_IRQ(MTU2S_TGI3D, 207),
+ INTC_IRQ(MTU2S_TCI3V, 208),
+ INTC_IRQ(MTU2S_TGI4A, 212), INTC_IRQ(MTU2S_TGI4B, 213),
+ INTC_IRQ(MTU2S_TGI4C, 214), INTC_IRQ(MTU2S_TGI4D, 215),
+ INTC_IRQ(MTU2S_TCI4V, 216),
+ INTC_IRQ(MTU2S_TGI5U, 220), INTC_IRQ(MTU2S_TGI5V, 221),
+ INTC_IRQ(MTU2S_TGI5W, 222),
+ INTC_IRQ(POE2_OEI3, 224),
+ INTC_IRQ(IIC3_STPI, 228), INTC_IRQ(IIC3_NAKI, 229),
+ INTC_IRQ(IIC3_RXI, 230), INTC_IRQ(IIC3_TXI, 231),
+ INTC_IRQ(IIC3_TEI, 232),
+ INTC_IRQ(SCIF0_BRI, 240), INTC_IRQ(SCIF0_ERI, 241),
+ INTC_IRQ(SCIF0_RXI, 242), INTC_IRQ(SCIF0_TXI, 243),
+ INTC_IRQ(SCIF1_BRI, 244), INTC_IRQ(SCIF1_ERI, 245),
+ INTC_IRQ(SCIF1_RXI, 246), INTC_IRQ(SCIF1_TXI, 247),
+ INTC_IRQ(SCIF2_BRI, 248), INTC_IRQ(SCIF2_ERI, 249),
+ INTC_IRQ(SCIF2_RXI, 250), INTC_IRQ(SCIF2_TXI, 251),
+ INTC_IRQ(SCIF3_BRI, 252), INTC_IRQ(SCIF3_ERI, 253),
+ INTC_IRQ(SCIF3_RXI, 254), INTC_IRQ(SCIF3_TXI, 255),
+};
+
+static struct intc_group groups[] __initdata = {
+ INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
+ PINT4, PINT5, PINT6, PINT7),
+ INTC_GROUP(DMAC0, DMAC0_DEI, DMAC0_HEI),
+ INTC_GROUP(DMAC1, DMAC1_DEI, DMAC1_HEI),
+ INTC_GROUP(DMAC2, DMAC2_DEI, DMAC2_HEI),
+ INTC_GROUP(DMAC3, DMAC3_DEI, DMAC3_HEI),
+ INTC_GROUP(DMAC4, DMAC4_DEI, DMAC4_HEI),
+ INTC_GROUP(DMAC5, DMAC5_DEI, DMAC5_HEI),
+ INTC_GROUP(DMAC6, DMAC6_DEI, DMAC6_HEI),
+ INTC_GROUP(DMAC7, DMAC7_DEI, DMAC7_HEI),
+ INTC_GROUP(MTU0_ABCD, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D),
+ INTC_GROUP(MTU0_VEF, MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F),
+ INTC_GROUP(MTU1_AB, MTU2_TGI1A, MTU2_TGI1B),
+ INTC_GROUP(MTU1_VU, MTU2_TCI1V, MTU2_TCI1U),
+ INTC_GROUP(MTU2_AB, MTU2_TGI2A, MTU2_TGI2B),
+ INTC_GROUP(MTU2_VU, MTU2_TCI2V, MTU2_TCI2U),
+ INTC_GROUP(MTU3_ABCD, MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D),
+ INTC_GROUP(MTU4_ABCD, MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
+ INTC_GROUP(MTU5, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W),
+ INTC_GROUP(POE2_12, POE2_OEI1, POE2_OEI2),
+ INTC_GROUP(MTU3S_ABCD, MTU2S_TGI3A, MTU2S_TGI3B,
+ MTU2S_TGI3C, MTU2S_TGI3D),
+ INTC_GROUP(MTU4S_ABCD, MTU2S_TGI4A, MTU2S_TGI4B,
+ MTU2S_TGI4C, MTU2S_TGI4D),
+ INTC_GROUP(MTU5S, MTU2S_TGI5U, MTU2S_TGI5V, MTU2S_TGI5W),
+ INTC_GROUP(IIC3, IIC3_STPI, IIC3_NAKI, IIC3_RXI, IIC3_TXI, IIC3_TEI),
+ INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
+ INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
+ INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
+ INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),
+};
+
+static struct intc_prio_reg prio_registers[] __initdata = {
+ { 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
+ { 0xfffe081a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
+ { 0xfffe0820, 0, 16, 4, /* IPR05 */ { PINT, 0, ADC_ADI0, ADC_ADI1 } },
+ { 0xfffe0c00, 0, 16, 4, /* IPR06 */ { DMAC0, DMAC1, DMAC2, DMAC3 } },
+ { 0xfffe0c02, 0, 16, 4, /* IPR07 */ { DMAC4, DMAC5, DMAC6, DMAC7 } },
+ { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { CMT0, CMT1, BSC, WDT } },
+ { 0xfffe0c06, 0, 16, 4, /* IPR09 */ { MTU0_ABCD, MTU0_VEF,
+ MTU1_AB, MTU1_VU } },
+ { 0xfffe0c08, 0, 16, 4, /* IPR10 */ { MTU2_AB, MTU2_VU,
+ MTU3_ABCD, MTU2_TCI3V } },
+ { 0xfffe0c0a, 0, 16, 4, /* IPR11 */ { MTU4_ABCD, MTU2_TCI4V,
+ MTU5, POE2_12 } },
+ { 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { MTU3S_ABCD, MTU2S_TCI3V,
+ MTU4S_ABCD, MTU2S_TCI4V } },
+ { 0xfffe0c0e, 0, 16, 4, /* IPR13 */ { MTU5S, POE2_OEI3, IIC3, 0 } },
+ { 0xfffe0c10, 0, 16, 4, /* IPR14 */ { SCIF0, SCIF1, SCIF2, SCIF3 } },
+};
+
+static struct intc_mask_reg mask_registers[] __initdata = {
+ { 0xfffe0808, 0, 16, /* PINTER */
+ { 0, 0, 0, 0, 0, 0, 0, 0,
+ PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
+ NULL, mask_registers, prio_registers, NULL);
+
static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xfffe8000,
@@ -57,57 +214,7 @@ static int __init sh7206_devices_setup(v
}
__initcall(sh7206_devices_setup);
-static struct ipr_data ipr_irq_table[] = {
- { 140, 7, 12, 2 }, /* CMI0 */
- { 164, 8, 4, 2 }, /* MTU2_TGI1A */
- { 240, 13, 12, 3 }, /* SCIF0_BRI */
- { 241, 13, 12, 3 }, /* SCIF0_ERI */
- { 242, 13, 12, 3 }, /* SCIF0_RXI */
- { 243, 13, 12, 3 }, /* SCIF0_TXI */
- { 244, 13, 8, 3 }, /* SCIF1_BRI */
- { 245, 13, 8, 3 }, /* SCIF1_ERI */
- { 246, 13, 8, 3 }, /* SCIF1_RXI */
- { 247, 13, 8, 3 }, /* SCIF1_TXI */
- { 248, 13, 4, 3 }, /* SCIF2_BRI */
- { 249, 13, 4, 3 }, /* SCIF2_ERI */
- { 250, 13, 4, 3 }, /* SCIF2_RXI */
- { 251, 13, 4, 3 }, /* SCIF2_TXI */
- { 252, 13, 0, 3 }, /* SCIF3_BRI */
- { 253, 13, 0, 3 }, /* SCIF3_ERI */
- { 254, 13, 0, 3 }, /* SCIF3_RXI */
- { 255, 13, 0, 3 }, /* SCIF3_TXI */
-};
-
-static unsigned long ipr_offsets[] = {
- 0xfffe0818, /* IPR01 */
- 0xfffe081a, /* IPR02 */
- 0, /* unused */
- 0, /* unused */
- 0xfffe0820, /* IPR05 */
- 0xfffe0c00, /* IPR06 */
- 0xfffe0c02, /* IPR07 */
- 0xfffe0c04, /* IPR08 */
- 0xfffe0c06, /* IPR09 */
- 0xfffe0c08, /* IPR10 */
- 0xfffe0c0a, /* IPR11 */
- 0xfffe0c0c, /* IPR12 */
- 0xfffe0c0e, /* IPR13 */
- 0xfffe0c10, /* IPR14 */
-};
-
-static struct ipr_desc ipr_irq_desc = {
- .ipr_offsets = ipr_offsets,
- .nr_offsets = ARRAY_SIZE(ipr_offsets),
-
- .ipr_data = ipr_irq_table,
- .nr_irqs = ARRAY_SIZE(ipr_irq_table),
-
- .chip = {
- .name = "IPR-sh7206",
- },
-};
-
void __init plat_irq_setup(void)
{
- register_ipr_controller(&ipr_irq_desc);
+ register_intc_controller(&intc_desc);
}
--- 0001/arch/sh/mm/Kconfig
+++ work/arch/sh/mm/Kconfig 2007-08-15 18:25:57.000000000 +0900
@@ -57,7 +57,7 @@ config CPU_SUBTYPE_SH7619
config CPU_SUBTYPE_SH7206
bool "Support SH7206 processor"
select CPU_SH2A
- select CPU_HAS_IPR_IRQ
+ select CPU_HAS_INTC_IRQ
# SH-3 Processor Support
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