linuxsh-dev

[linuxsh-dev] Re: [PATCH] Changes for CVS head

[kaz K. <kk...@rr...>]

Hi,

Paul Mundt <le...@li...> wrote:
>>  	if ((cpu_data->type == CPU_SH7751 ||
>>  	     cpu_data->type == CPU_SH7751R ||
>> -	     cpu_data->type == CPU_ST40STB1) &&
>> +	     cpu_data->type == CPU_ST40RA ||
>> +	     cpu_data->type == CPU_ST40GX1) &&
>>  		(start >= CACHE_OC_ADDRESS_ARRAY)) {
>>  		__flush_cache_4096(start | SH_CACHE_ASSOC, phys | 0x80000000, 0);
>>  	} else {
> 
> This is getting rather ugly, we're going to have to add a flag for this into
> cpu_data->dcache.flags to see if we need to do this in P2 area or not.

Agreed. It's definitely better.

>> +#ifdef __KERNEL__
>> +# define HZ		100		/* Internal kernel timer frequency */
>> +# define USER_HZ	100		/* .. some user interfaces are in "ticks" */
>> +# define CLOCKS_PER_SEC	(USER_HZ)	/* like times() */
>> +#endif
>> +
>>  #ifndef HZ
>>  #define HZ 100
>>  #endif
> 
> This isn't necessary, we already define all of this stuff in the above block:
> 
> #ifdef __KERNEL__
> # ifdef CONFIG_SH_WDT
> #  define HZ            1000            /* Needed for high-res WOVF */
> # else
> #  define HZ            100
> # endif
> # define USER_HZ        100             /* User interfaces are in "ticks" */
> # define CLOCKS_PER_SEC (USER_HZ)       /* frequency at which times() counts */
> #endif
> 
> your change will also break the WDT.

Ok. I'll remove this hunk.

>> +#if 111
>> +unsigned long tick_usec; 		/* USER_HZ period (usec) */
>> +unsigned long tick_nsec;		/* ACTHZ period (nsec) */
>> +#else
>>  unsigned long tick_usec = TICK_USEC; 		/* USER_HZ period (usec) */
>>  unsigned long tick_nsec = TICK_NSEC;		/* ACTHZ period (nsec) */
>> +#endif
>>  
> For this, please use something more generic (like ifndef CONFIG_SUPERH) -- we
> shouldn't go out of the way to break other architectures (primarily for the
> benefit of people who are integrating the LinuxSH code into their own trees).

Yep. It's the very reason that I didn't write "want to check in" at
all and wanted to hear comments. I felt that ifndef CONFIG_SUPERH in
generic tree is still ugly, but if there is no other choice, it would
be a workaround.

Regards,
	kaz

[linuxsh-dev] Re: [PATCH] Fix for page leak and broken fpu handling

[kaz K. <kk...@rr...>]

kaz Kojima <kk...@rr...> wrote:
> 	* arch/sh/kernel/fpu.c (save_fpu): Handle fpu used bit of thread
> 	info instead of flags of task.
> 	(ieee_fpe_handler, do_fpu_state_restore): Likewise.
> 	* include/asm-sh/system.h (switch_to): Set LAST properly.

Oops. The first hunk of the above patch is not needed.
My local installation problem. I'll check in the latter only.

Regards,
	kaz

Re: [linuxsh-dev] [PATCH] Changes for CVS head

[Paul M. <le...@li...>]

On Tue, Jul 15, 2003 at 09:17:32PM +0900, kaz Kojima wrote:
> BTW, now the return type of the interrupt handler has changed, so
> please take it account if you have SH specific drivers. I've done
> it for sh-sci and stnic drivers only.

Guess I missed these, I updated most of the other references for this. I
suspect there might be a few references left over though.

> diff -u3prN linux-2.5.73-sf-orig/arch/sh/mm/cache-sh4.c linux-2.5.73-sf-l=
ocal/arch/sh/mm/cache-sh4.c
> --- linux-2.5.73-sf-orig/arch/sh/mm/cache-sh4.c	Sat May 10 13:18:53 2003
> +++ linux-2.5.73-sf-local/arch/sh/mm/cache-sh4.c	Mon Jul 14 16:40:46 2003
> @@ -257,7 +257,8 @@ static inline void flush_cache_4096(unsi
>  		 */
>  	if ((cpu_data->type =3D=3D CPU_SH7751 ||
>  	     cpu_data->type =3D=3D CPU_SH7751R ||
> -	     cpu_data->type =3D=3D CPU_ST40STB1) &&
> +	     cpu_data->type =3D=3D CPU_ST40RA ||
> +	     cpu_data->type =3D=3D CPU_ST40GX1) &&
>  		(start >=3D CACHE_OC_ADDRESS_ARRAY)) {
>  		__flush_cache_4096(start | SH_CACHE_ASSOC, phys | 0x80000000, 0);
>  	} else {

This is getting rather ugly, we're going to have to add a flag for this into
cpu_data->dcache.flags to see if we need to do this in P2 area or not.

> diff -u3prN linux-2.5.73-sf-orig/arch/sh/vmlinux.lds.S linux-2.5.73-sf-lo=
cal/arch/sh/vmlinux.lds.S
> --- linux-2.5.73-sf-orig/arch/sh/vmlinux.lds.S	Wed Jun 11 07:17:00 2003
> +++ linux-2.5.73-sf-local/arch/sh/vmlinux.lds.S	Sun Jul 13 10:23:34 2003
> @@ -86,6 +86,9 @@ SECTIONS
>    __initramfs_start =3D .;
>    .init.ramfs : { *(.init.ramfs) }
>    __initramfs_end =3D .;
> +  __security_initcall_start =3D .;
> +  .security_initcall.init : { *(.security_initcall.init) }
> +  __security_initcall_end =3D .;
>    __machvec_start =3D .;
>    .init.machvec : { *(.init.machvec) }
>    __machvec_end =3D .;

This is dealt with by the generic SECURITY_INIT, which seems to have gotten
lost in a merge somewhere.  I'll re-add this.

> diff -u3prN linux-2.5.73-sf-orig/include/asm-sh/param.h linux-2.5.73-sf-l=
ocal/include/asm-sh/param.h
> --- linux-2.5.73-sf-orig/include/asm-sh/param.h	Wed Jun 11 07:18:32 2003
> +++ linux-2.5.73-sf-local/include/asm-sh/param.h	Sun Jul 13 10:23:44 2003
> @@ -11,6 +11,12 @@
>  # define CLOCKS_PER_SEC	(USER_HZ)	/* frequency at which times() counts */
>  #endif
> =20
> +#ifdef __KERNEL__
> +# define HZ		100		/* Internal kernel timer frequency */
> +# define USER_HZ	100		/* .. some user interfaces are in "ticks" */
> +# define CLOCKS_PER_SEC	(USER_HZ)	/* like times() */
> +#endif
> +
>  #ifndef HZ
>  #define HZ 100
>  #endif

This isn't necessary, we already define all of this stuff in the above bloc=
k:

#ifdef __KERNEL__
# ifdef CONFIG_SH_WDT
#  define HZ            1000            /* Needed for high-res WOVF */
# else
#  define HZ            100
# endif
# define USER_HZ        100             /* User interfaces are in "ticks" */
# define CLOCKS_PER_SEC (USER_HZ)       /* frequency at which times() count=
s */
#endif

your change will also break the WDT.

> diff -u3prN linux-2.5.73-sf-orig/kernel/timer.c linux-2.5.73-sf-local/ker=
nel/timer.c
> --- linux-2.5.73-sf-orig/kernel/timer.c	Sun Jul 13 09:00:31 2003
> +++ linux-2.5.73-sf-local/kernel/timer.c	Sun Jul 13 11:33:35 2003
> @@ -439,8 +439,13 @@ repeat:
>  /*
>   * Timekeeping variables
>   */
> +#if 111
> +unsigned long tick_usec; 		/* USER_HZ period (usec) */
> +unsigned long tick_nsec;		/* ACTHZ period (nsec) */
> +#else
>  unsigned long tick_usec =3D TICK_USEC; 		/* USER_HZ period (usec) */
>  unsigned long tick_nsec =3D TICK_NSEC;		/* ACTHZ period (nsec) */
> +#endif
> =20
For this, please use something more generic (like ifndef CONFIG_SUPERH) -- =
we
shouldn't go out of the way to break other architectures (primarily for the
benefit of people who are integrating the LinuxSH code into their own trees=
).

The rest of this looks good, please merge it when you get a chance and I'll
look at merging up to 2.6.0-test1.

[linuxsh-dev] [PATCH] Changes for CVS head

[kaz K. <kk...@rr...>]

Hi,

The attatched fixes minor problems and also includes usual updates
corresponding to the i386 changes. Comments?

BTW, now the return type of the interrupt handler has changed, so
please take it account if you have SH specific drivers. I've done
it for sh-sci and stnic drivers only.

Regards,
	kaz
--
	* arch/sh/kernel/entry.S (sys_call_table): Add new syscalls.
	* arch/sh/kernel/irq.c (__report_bad_irq, report_bad_irq): New.
	(noirqdebug_setup): Likewise.
	(note_interrupt): Likewise.
	(do_IRQ): Call note_interrupt if required.
	* arch/sh/kernel/module.c (module_arch_cleanup): new.
	* arch/sh/kernel/rtc.c (sh_rtc_gettimeofday): Change the type of
	argument.
	(sh_rtc_settimeofday): Likewise.
	* arch/sh/kernel/setup.c (cpu_name): Replace CPU_ST40STB1 by
	CPU_ST40RA and add CPU_ST40GX1.
	* arch/sh/kernel/traps.c (show_stack): New.
	* arch/sh/mm/cache-sh4.c (flush_cache_4096): Replace CPU_ST40STB1
	by CPU_ST40RA.  Handle CPU_ST40GX1 case.
	* arch/sh/mm/fault.c (do_page_fault): Use in_atomic.  Use
	VM_FAULT_xxx symbolic constants.  Use fixup_exception.
	* arch/sh/mm/ioremap.c: Fix so to follow i386 changes.
	* arch/sh/vmlinux.lds.S: Add __security_initcall stuff.
	* drivers/char/sh-sci.c (sci_hungup, sci_close): Add again.
	(sci_real_drive): Add sci_hungup and sci_close.
	(sci_rx_interrupt): Return IRQ_HANDLED.
	(sci_tx_interrupt, sci_br_interrupt, sci_br_interrupt): Likewise.
	(sci_init_drivers): Change return type of handlers.
	* drivers/net/stnic.c (do_stnic_intr):  Return the result of
	ei_interrupt.
	* include/asm-sh/hardirq.h: Remove commented out part.
	* include/asm-sh/param.h (CLOCKS_PER_SEC): Define.
	* include/asm-sh/pgalloc.h (pte_alloc_one_kernel): Use
	__GFP_REPEAT feature.
	(pte_alloc_one): Likewise.
	* include/asm-sh/unistd.h: Update for new syscalls.
	* kernel/timer.c: Initialize tick_nsec and tick_usec in init_timers
	not with the initializer.

diff -u3prN linux-2.5.73-sf-orig/arch/sh/kernel/entry.S linux-2.5.73-sf-local/arch/sh/kernel/entry.S
--- linux-2.5.73-sf-orig/arch/sh/kernel/entry.S	Wed May  7 12:24:41 2003
+++ linux-2.5.73-sf-local/arch/sh/kernel/entry.S	Sun Jul 13 12:29:21 2003
@@ -1242,6 +1242,8 @@ ENTRY(sys_call_table)
  	.long sys_clock_gettime		/* 265 */
  	.long sys_clock_getres
  	.long sys_clock_nanosleep
+	.long sys_statfs64
+	.long sys_fstatfs64     
 
 	.rept NR_syscalls-(.-sys_call_table)/4
 		.long sys_ni_syscall
diff -u3prN linux-2.5.73-sf-orig/arch/sh/kernel/irq.c linux-2.5.73-sf-local/arch/sh/kernel/irq.c
--- linux-2.5.73-sf-orig/arch/sh/kernel/irq.c	Sun Jul 13 09:00:12 2003
+++ linux-2.5.73-sf-local/arch/sh/kernel/irq.c	Sun Jul 13 13:12:34 2003
@@ -29,6 +29,7 @@
 #include <linux/smp_lock.h>
 #include <linux/init.h>
 #include <linux/seq_file.h>
+#include <linux/kallsyms.h>
 
 #include <asm/system.h>
 #include <asm/io.h>
@@ -44,6 +45,7 @@
 irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned = {
 	[0 ... NR_IRQS-1] = {
 		.handler = &no_irq_type,
+		.lock = SPIN_LOCK_UNLOCKED
 	}
 };
 
@@ -147,23 +149,88 @@ int handle_IRQ_event(unsigned int irq, s
 		add_interrupt_randomness(irq);
 
 	local_irq_disable();
+	return retval;
+}
 
-	if (retval != 1) {
-		static int count = 100;
+static void __report_bad_irq(int irq, irq_desc_t *desc, irqreturn_t action_ret)
+{
+	struct irqaction *action;
 
-		if (count) {
-			count--;
+	if (action_ret != IRQ_HANDLED && action_ret != IRQ_NONE) {
+		printk(KERN_ERR "irq event %d: bogus return value %x\n",
+				irq, action_ret);
+	} else {
+		printk(KERN_ERR "irq %d: nobody cared!\n", irq);
+	}
+	dump_stack();
+	printk(KERN_ERR "handlers:\n");
+	action = desc->action;
+	do {
+		printk(KERN_ERR "[<%p>]", action->handler);
+		print_symbol(" (%s)",
+			(unsigned long)action->handler);
+		printk("\n");
+		action = action->next;
+	} while (action);
+}
 
-			if (retval) {
-				printk("irq event %d: bogus retval mask %x\n",
-					irq, retval);
-			} else {
-				printk("irq %d: nobody cared\n", irq);
-			}
-		}
+static void report_bad_irq(int irq, irq_desc_t *desc, irqreturn_t action_ret)
+{
+	static int count = 100;
+
+	if (count) {
+		count--;
+		__report_bad_irq(irq, desc, action_ret);
+	}
+}
+
+static int noirqdebug;
+
+static int __init noirqdebug_setup(char *str)
+{
+	noirqdebug = 1;
+	printk("IRQ lockup detection disabled\n");
+	return 1;
+}
+
+__setup("noirqdebug", noirqdebug_setup);
+
+/*
+ * If 99,900 of the previous 100,000 interrupts have not been handled then
+ * assume that the IRQ is stuck in some manner.  Drop a diagnostic and try to
+ * turn the IRQ off.
+ *
+ * (The other 100-of-100,000 interrupts may have been a correctly-functioning
+ *  device sharing an IRQ with the failing one)
+ *
+ * Called under desc->lock
+ */
+static void note_interrupt(int irq, irq_desc_t *desc, irqreturn_t action_ret)
+{
+	if (action_ret != IRQ_HANDLED) {
+		desc->irqs_unhandled++;
+		if (action_ret != IRQ_NONE)
+			report_bad_irq(irq, desc, action_ret);
 	}
 
-	return status;
+	desc->irq_count++;
+	if (desc->irq_count < 100000)
+		return;
+
+	desc->irq_count = 0;
+	if (desc->irqs_unhandled > 99900) {
+		/*
+		 * The interrupt is stuck
+		 */
+		__report_bad_irq(irq, desc, action_ret);
+		/*
+		 * Now kill the IRQ
+		 */
+		printk(KERN_EMERG "Disabling IRQ #%d\n", irq);
+		desc->status |= IRQ_DISABLED;
+		desc->handler->disable(irq);
+	}
+	desc->irqs_unhandled = 0;
 }
 
 /*
@@ -299,10 +366,13 @@ asmlinkage int do_IRQ(unsigned long r4, 
 	 * SMP environment.
 	 */
 	for (;;) {
+		irqreturn_t action_ret;
+
 		spin_unlock(&desc->lock);
-		handle_IRQ_event(irq, &regs, action);
+		action_ret = handle_IRQ_event(irq, &regs, action);
 		spin_lock(&desc->lock);
-
+		if (!noirqdebug)
+			note_interrupt(irq, desc, action_ret);
 		if (likely(!(desc->status & IRQ_PENDING)))
 			break;
 		desc->status &= ~IRQ_PENDING;
diff -u3prN linux-2.5.73-sf-orig/arch/sh/kernel/module.c linux-2.5.73-sf-local/arch/sh/kernel/module.c
--- linux-2.5.73-sf-orig/arch/sh/kernel/module.c	Wed May  7 12:24:41 2003
+++ linux-2.5.73-sf-local/arch/sh/kernel/module.c	Sun Jul 13 11:05:32 2003
@@ -138,3 +138,7 @@ int module_finalize(const Elf_Ehdr *hdr,
 {
 	return 0;
 }
+
+void module_arch_cleanup(struct module *mod)
+{
+}
diff -u3prN linux-2.5.73-sf-orig/arch/sh/kernel/rtc.c linux-2.5.73-sf-local/arch/sh/kernel/rtc.c
--- linux-2.5.73-sf-orig/arch/sh/kernel/rtc.c	Wed Mar  5 12:29:34 2003
+++ linux-2.5.73-sf-local/arch/sh/kernel/rtc.c	Sun Jul 13 10:23:23 2003
@@ -14,7 +14,7 @@
 #include <asm/io.h>
 #include <asm/rtc.h>
 
-void sh_rtc_gettimeofday(struct timeval *tv)
+void sh_rtc_gettimeofday(struct timespec *tv)
 {
 	unsigned int sec128, sec, min, hr, wk, day, mon, yr, yr100;
 
@@ -80,12 +80,11 @@ void sh_rtc_gettimeofday(struct timeval 
 #endif
 
 	tv->tv_sec = mktime(yr100 * 100 + yr, mon, day, hr, min, sec);
-	tv->tv_usec = (sec128 * 1000000) / 128;
+	tv->tv_nsec = ((sec128 * 1000000) / 128) * 1000;
 }
 
-int sh_rtc_settimeofday(const struct timeval *tv)
+int sh_rtc_settimeofday(unsigned long nowtime)
 {
-	unsigned long nowtime = tv->tv_sec;
 	int retval = 0;
 	int real_seconds, real_minutes, cmos_minutes;
 
diff -u3prN linux-2.5.73-sf-orig/arch/sh/kernel/setup.c linux-2.5.73-sf-local/arch/sh/kernel/setup.c
--- linux-2.5.73-sf-orig/arch/sh/kernel/setup.c	Wed Jun 11 07:17:32 2003
+++ linux-2.5.73-sf-local/arch/sh/kernel/setup.c	Mon Jul 14 14:21:44 2003
@@ -607,7 +620,8 @@ static const char *cpu_name[] = {
 	[CPU_SH7750R]	"SH7750R",
 	[CPU_SH7751]	"SH7751",
 	[CPU_SH7751R]	"SH7751R",
-	[CPU_ST40STB1]	"ST40STB1",
+	[CPU_ST40RA]	"ST40RA",
+	[CPU_ST40GX1]	"ST40GX1",
 	[CPU_SH_NONE]	"Unknown"
 };
 
diff -u3prN linux-2.5.73-sf-orig/arch/sh/kernel/traps.c linux-2.5.73-sf-local/arch/sh/kernel/traps.c
--- linux-2.5.73-sf-orig/arch/sh/kernel/traps.c	Mon May  5 07:50:06 2003
+++ linux-2.5.73-sf-local/arch/sh/kernel/traps.c	Sun Jul 13 11:51:00 2003
@@ -642,3 +642,23 @@ void dump_stack(void)
 	show_task(NULL);
 }
 
+static int kstack_depth_to_print = 24;
+
+void show_stack(struct task_struct *task, unsigned long *sp)
+{
+	unsigned long *stack;
+	int i;
+
+	if(sp==NULL)
+		sp=(unsigned long*)&sp;
+
+	stack = sp;
+	for(i=0; i < kstack_depth_to_print; i++) {
+		if (((long) stack & (THREAD_SIZE-1)) == 0)
+			break;
+		if (i && ((i % 8) == 0))
+			printk("\n       ");
+		printk("%08lx ", *stack++);
+	}
+	printk("\n");
+}
diff -u3prN linux-2.5.73-sf-orig/arch/sh/mm/cache-sh4.c linux-2.5.73-sf-local/arch/sh/mm/cache-sh4.c
--- linux-2.5.73-sf-orig/arch/sh/mm/cache-sh4.c	Sat May 10 13:18:53 2003
+++ linux-2.5.73-sf-local/arch/sh/mm/cache-sh4.c	Mon Jul 14 16:40:46 2003
@@ -257,7 +257,8 @@ static inline void flush_cache_4096(unsi
 		 */
 	if ((cpu_data->type == CPU_SH7751 ||
 	     cpu_data->type == CPU_SH7751R ||
-	     cpu_data->type == CPU_ST40STB1) &&
+	     cpu_data->type == CPU_ST40RA ||
+	     cpu_data->type == CPU_ST40GX1) &&
 		(start >= CACHE_OC_ADDRESS_ARRAY)) {
 		__flush_cache_4096(start | SH_CACHE_ASSOC, phys | 0x80000000, 0);
 	} else {
diff -u3prN linux-2.5.73-sf-orig/arch/sh/mm/fault.c linux-2.5.73-sf-local/arch/sh/mm/fault.c
--- linux-2.5.73-sf-orig/arch/sh/mm/fault.c	Mon May  5 07:50:16 2003
+++ linux-2.5.73-sf-local/arch/sh/mm/fault.c	Sun Jul 13 17:50:02 2003
@@ -61,7 +61,7 @@ asmlinkage void do_page_fault(struct pt_
 	 * If we're in an interrupt or have no user
 	 * context, we must not take the fault..
 	 */
-	if (in_interrupt() || !mm)
+	if (in_atomic() || !mm)
 		goto no_context;
 
 	down_read(&mm->mmap_sem);
@@ -95,16 +95,18 @@ good_area:
 	 */
 survive:
 	switch (handle_mm_fault(mm, vma, address, writeaccess)) {
-	case 1:
-		tsk->min_flt++;
-		break;
-	case 2:
-		tsk->maj_flt++;
-		break;
-	case 0:
-		goto do_sigbus;
-	default:
-		goto out_of_memory;
+		case VM_FAULT_MINOR:
+			tsk->min_flt++;
+			break;
+		case VM_FAULT_MAJOR:
+			tsk->maj_flt++;
+			break;
+		case VM_FAULT_SIGBUS:
+			goto do_sigbus;
+		case VM_FAULT_OOM:
+			goto out_of_memory;
+		default:
+			BUG();
 	}
 
 	up_read(&mm->mmap_sem);
@@ -126,11 +128,8 @@ bad_area:
 
 no_context:
 	/* Are we prepared to handle this kernel fault?  */
-	fixup = search_exception_tables(regs->pc);
-	if (fixup) {
-		regs->pc = fixup->fixup;
+	if (fixup_exception(regs))
 		return;
-	}
 
 /*
  * Oops. The kernel tried to access some bad page. We'll have to
diff -u3prN linux-2.5.73-sf-orig/arch/sh/mm/ioremap.c linux-2.5.73-sf-local/arch/sh/mm/ioremap.c
--- linux-2.5.73-sf-orig/arch/sh/mm/ioremap.c	Mon May  5 07:50:16 2003
+++ linux-2.5.73-sf-local/arch/sh/mm/ioremap.c	Sun Jul 13 18:11:29 2003
@@ -140,7 +140,7 @@ void * p3_ioremap(unsigned long phys_add
 	 */
 	offset = phys_addr & ~PAGE_MASK;
 	phys_addr &= PAGE_MASK;
-	size = PAGE_ALIGN(last_addr) - phys_addr;
+	size = PAGE_ALIGN(last_addr+1) - phys_addr;
 
 	/*
 	 * Ok, go for it..
@@ -148,9 +148,10 @@ void * p3_ioremap(unsigned long phys_add
 	area = get_vm_area(size, VM_IOREMAP);
 	if (!area)
 		return NULL;
+	area->phys_addr = phys_addr;
 	addr = area->addr;
 	if (remap_area_pages(VMALLOC_VMADDR(addr), phys_addr, size, flags)) {
-		vfree(addr);
+		vunmap(addr);
 		return NULL;
 	}
 	return (void *) (offset + (char *)addr);
diff -u3prN linux-2.5.73-sf-orig/arch/sh/vmlinux.lds.S linux-2.5.73-sf-local/arch/sh/vmlinux.lds.S
--- linux-2.5.73-sf-orig/arch/sh/vmlinux.lds.S	Wed Jun 11 07:17:00 2003
+++ linux-2.5.73-sf-local/arch/sh/vmlinux.lds.S	Sun Jul 13 10:23:34 2003
@@ -86,6 +86,9 @@ SECTIONS
   __initramfs_start = .;
   .init.ramfs : { *(.init.ramfs) }
   __initramfs_end = .;
+  __security_initcall_start = .;
+  .security_initcall.init : { *(.security_initcall.init) }
+  __security_initcall_end = .;
   __machvec_start = .;
   .init.machvec : { *(.init.machvec) }
   __machvec_end = .;
diff -u3prN linux-2.5.73-sf-orig/drivers/char/sh-sci.c linux-2.5.73-sf-local/drivers/char/sh-sci.c
--- linux-2.5.73-sf-orig/drivers/char/sh-sci.c	Sun Jul 13 09:00:13 2003
+++ linux-2.5.73-sf-local/drivers/char/sh-sci.c	Sun Jul 13 14:08:08 2003
@@ -95,6 +95,8 @@ static void sci_enable_rx_interrupts(voi
 static int  sci_get_CD(void *ptr);
 static void sci_shutdown_port(void *ptr);
 static int sci_set_real_termios(void *ptr);
+static void sci_hungup(void *ptr);
+static void sci_close(void *ptr);
 static int sci_chars_in_buffer(void *ptr);
 static int sci_request_irq(struct sci_port *port);
 static void sci_free_irq(struct sci_port *port);
@@ -329,6 +331,8 @@ static struct real_driver sci_real_drive
 	sci_shutdown_port,
 	sci_set_real_termios,
 	sci_chars_in_buffer,
+        sci_close,
+        sci_hungup,
 	NULL
 };
 
@@ -820,19 +824,22 @@ static inline int sci_handle_breaks(stru
 	return copied;
 }
 
-static void sci_rx_interrupt(int irq, void *ptr, struct pt_regs *regs)
+static irqreturn_t sci_rx_interrupt(int irq, void *ptr, struct pt_regs *regs)
 {
 	struct sci_port *port = ptr;
 
 	if (port->gs.flags & GS_ACTIVE)
 		if (!(port->gs.flags & SCI_RX_THROTTLE)) {
 			sci_receive_chars(port, regs);
-			return;
+			return IRQ_HANDLED;
+
 		}
 	sci_disable_rx_interrupts(port);
+
+	return IRQ_HANDLED;
 }
 
-static void sci_tx_interrupt(int irq, void *ptr, struct pt_regs *regs)
+static irqreturn_t sci_tx_interrupt(int irq, void *ptr, struct pt_regs *regs)
 {
 	struct sci_port *port = ptr;
 
@@ -841,9 +848,11 @@ static void sci_tx_interrupt(int irq, vo
 	else {
 		sci_disable_tx_interrupts(port);
 	}
+
+	return IRQ_HANDLED;
 }
 
-static void sci_er_interrupt(int irq, void *ptr, struct pt_regs *regs)
+static irqreturn_t sci_er_interrupt(int irq, void *ptr, struct pt_regs *regs)
 {
 	struct sci_port *port = ptr;
 
@@ -862,15 +871,19 @@ static void sci_er_interrupt(int irq, vo
 
 	/* Kick the transmission */
 	sci_tx_interrupt(irq, ptr, regs);
+
+	return IRQ_HANDLED;
 }
 
-static void sci_br_interrupt(int irq, void *ptr, struct pt_regs *regs)
+static irqreturn_t sci_br_interrupt(int irq, void *ptr, struct pt_regs *regs)
 {
 	struct sci_port *port = ptr;
 
 	/* Handle BREAKs */
 	sci_handle_breaks(port);
 	sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
+
+	return IRQ_HANDLED;
 }
 
 static void do_softint(void *private_)
@@ -1047,6 +1060,16 @@ failed_1:
 	return retval;
 }
 
+static void sci_hungup(void *ptr)
+{
+        return;
+}
+
+static void sci_close(void *ptr)
+{
+        return;
+}
+
 static int sci_ioctl(struct tty_struct * tty, struct file * filp, 
                      unsigned int cmd, unsigned long arg)
 {
@@ -1273,7 +1296,7 @@ static int sci_init_drivers(void)
 static int sci_request_irq(struct sci_port *port)
 {
 	int i;
-	void (*handlers[4])(int irq, void *ptr, struct pt_regs *regs) = {
+	irqreturn_t (*handlers[4])(int irq, void *p, struct pt_regs *regs) = {
 		sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
 		sci_br_interrupt,
 	};
diff -u3prN linux-2.5.73-sf-orig/drivers/net/stnic.c linux-2.5.73-sf-local/drivers/net/stnic.c
--- linux-2.5.73-sf-orig/drivers/net/stnic.c	Wed May  7 08:33:18 2003
+++ linux-2.5.73-sf-local/drivers/net/stnic.c	Sun Jul 13 10:47:21 2003
@@ -308,10 +308,10 @@ stnic_init (struct net_device *dev)
 /* Hardware interrupt handler.  */
 irqreturn_t ei_interrupt (int irq, void *dev_id, struct pt_regs *regs);
 
-void
+irqreturn_t
 do_stnic_intr (int irq, void *dev_id, struct pt_regs *regs)
 {
-  ei_interrupt (0, stnic_dev, regs);
+  return ei_interrupt (0, stnic_dev, regs);
 }
 
 module_init(stnic_probe);
diff -u3prN linux-2.5.73-sf-orig/include/asm-sh/hardirq.h linux-2.5.73-sf-local/include/asm-sh/hardirq.h
--- linux-2.5.73-sf-orig/include/asm-sh/hardirq.h	Wed May  7 12:24:47 2003
+++ linux-2.5.73-sf-local/include/asm-sh/hardirq.h	Sun Jul 13 13:01:13 2003
@@ -97,27 +97,4 @@ do {									\
 extern void synchronize_irq(unsigned int irq);
 #endif /* CONFIG_SMP */
 
-/* XXX: MRB-remove
-#define in_interrupt() ({ int __cpu = smp_processor_id(); \
-	(local_irq_count(__cpu) + local_bh_count(__cpu) != 0); })
-
-#define in_irq() (local_irq_count(smp_processor_id()) != 0)
-
-#ifndef CONFIG_SMP
-
-#define hardirq_trylock(cpu)	(local_irq_count(cpu) == 0)
-#define hardirq_endlock(cpu)	do { } while (0)
-
-#define irq_enter(cpu, irq)	(local_irq_count(cpu)++)
-#define irq_exit(cpu, irq)	(local_irq_count(cpu)--)
-
-#define synchronize_irq()	barrier()
-
-#else
-
-#error Super-H SMP is not available
-
-#endif
-*/
-
 #endif /* __ASM_SH_HARDIRQ_H */
diff -u3prN linux-2.5.73-sf-orig/include/asm-sh/param.h linux-2.5.73-sf-local/include/asm-sh/param.h
--- linux-2.5.73-sf-orig/include/asm-sh/param.h	Wed Jun 11 07:18:32 2003
+++ linux-2.5.73-sf-local/include/asm-sh/param.h	Sun Jul 13 10:23:44 2003
@@ -11,6 +11,12 @@
 # define CLOCKS_PER_SEC	(USER_HZ)	/* frequency at which times() counts */
 #endif
 
+#ifdef __KERNEL__
+# define HZ		100		/* Internal kernel timer frequency */
+# define USER_HZ	100		/* .. some user interfaces are in "ticks" */
+# define CLOCKS_PER_SEC	(USER_HZ)	/* like times() */
+#endif
+
 #ifndef HZ
 #define HZ 100
 #endif
diff -u3prN linux-2.5.73-sf-orig/include/asm-sh/pgalloc.h linux-2.5.73-sf-local/include/asm-sh/pgalloc.h
--- linux-2.5.73-sf-orig/include/asm-sh/pgalloc.h	Tue May  6 10:04:47 2003
+++ linux-2.5.73-sf-local/include/asm-sh/pgalloc.h	Mon Jul 14 13:18:54 2003
@@ -42,18 +42,11 @@ static inline void pgd_free(pgd_t *pgd)
 static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
 					  unsigned long address)
 {
-	int count = 0;
 	pte_t *pte;
 
-   	do {
-		pte = (pte_t *) __get_free_page(GFP_KERNEL | __GFP_REPEAT);
-		if (pte)
-			clear_page(pte);
-		else {
-			current->state = TASK_UNINTERRUPTIBLE;
-			schedule_timeout(HZ);
-		}
-	} while (!pte && (count++ < 10));
+	pte = (pte_t *) __get_free_page(GFP_KERNEL | __GFP_REPEAT);
+	if (pte)
+		clear_page(pte);
 
 	return pte;
 }
@@ -61,18 +54,11 @@ static inline pte_t *pte_alloc_one_kerne
 static inline struct page *pte_alloc_one(struct mm_struct *mm,
 					 unsigned long address)
 {
-	int count = 0;
 	struct page *pte;
 
-   	do {
-		pte = alloc_pages(GFP_KERNEL, 0);
-		if (pte)
-			clear_page(page_address(pte));
-		else {
-			current->state = TASK_UNINTERRUPTIBLE;
-			schedule_timeout(HZ);
-		}
-	} while (!pte && (count++ < 10));
+   	pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT, 0);
+	if (pte)
+		clear_page(page_address(pte));
 
 	return pte;
 }
diff -u3prN linux-2.5.73-sf-orig/include/asm-sh/unistd.h linux-2.5.73-sf-local/include/asm-sh/unistd.h
--- linux-2.5.73-sf-orig/include/asm-sh/unistd.h	Wed Jun 11 07:18:32 2003
+++ linux-2.5.73-sf-local/include/asm-sh/unistd.h	Sun Jul 13 12:30:34 2003
@@ -275,8 +275,10 @@
 #define __NR_clock_gettime	(__NR_timer_create+6)
 #define __NR_clock_getres	(__NR_timer_create+7)
 #define __NR_clock_nanosleep	(__NR_timer_create+8)
+#define __NR_statfs64		268
+#define __NR_fstatfs64		269
 
-#define NR_syscalls 268
+#define NR_syscalls 270
 
 /* user-visible error numbers are in the range -1 - -124: see <asm-sh/errno.h> */
 
diff -u3prN linux-2.5.73-sf-orig/kernel/timer.c linux-2.5.73-sf-local/kernel/timer.c
--- linux-2.5.73-sf-orig/kernel/timer.c	Sun Jul 13 09:00:31 2003
+++ linux-2.5.73-sf-local/kernel/timer.c	Sun Jul 13 11:33:35 2003
@@ -439,8 +439,13 @@ repeat:
 /*
  * Timekeeping variables
  */
+#if 111
+unsigned long tick_usec; 		/* USER_HZ period (usec) */
+unsigned long tick_nsec;		/* ACTHZ period (nsec) */
+#else
 unsigned long tick_usec = TICK_USEC; 		/* USER_HZ period (usec) */
 unsigned long tick_nsec = TICK_NSEC;		/* ACTHZ period (nsec) */
+#endif
 
 /* 
  * The current time 
@@ -1233,6 +1238,8 @@ static struct notifier_block __devinitda
 
 void __init init_timers(void)
 {
+	tick_usec = TICK_USEC;
+	tick_nsec = TICK_NSEC;
 	timer_cpu_notify(&timers_nb, (unsigned long)CPU_UP_PREPARE,
 				(void *)(long)smp_processor_id());
 	register_cpu_notifier(&timers_nb);

[linuxsh-dev] [PATCH] Fix for page leak and broken fpu handling

[kaz K. <kk...@rr...>]

Hi,

I've tested NPTL on 2.5.73 kernel and found some problems in CVS
head. The attached patch fixes two of them.
Without the changes of fpu.c, you could get clobbered fpu results
on SH-4 kernel. The latter switch_to fix stops a serious page leak. 
I'd like to check it in soon.

BTW, I'll post an another patch for other minor problems.

Regards,
	kaz
--
	* arch/sh/kernel/fpu.c (save_fpu): Handle fpu used bit of thread
	info instead of flags of task.
	(ieee_fpe_handler, do_fpu_state_restore): Likewise.
	* include/asm-sh/system.h (switch_to): Set LAST properly.

diff -u3prN linux-2.5.73-sf-orig/arch/sh/kernel/fpu.c linux-2.5.73-sf-local/arch/sh/kernel/fpu.c
--- linux-2.5.73-sf-orig/arch/sh/kernel/fpu.c	Wed Mar  5 12:29:22 2003
+++ linux-2.5.73-sf-local/arch/sh/kernel/fpu.c	Mon Jul 14 13:41:11 2003
@@ -67,7 +67,7 @@ save_fpu(struct task_struct *tsk)
 		       "r" (FPSCR_INIT)
 		     : "memory");
 
-	tsk->flags &= ~PF_USEDFPU;
+	clear_tsk_thread_flag(tsk, TIF_USEDFPU);
 	release_fpu();
 }
 
@@ -260,7 +260,7 @@ ieee_fpe_handler (struct pt_regs *regs)
 				~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
 			grab_fpu();
 			restore_fpu(tsk);
-			tsk->flags |= PF_USEDFPU;
+			set_tsk_thread_flag(tsk, TIF_USEDFPU);
 		} else {
 			tsk->thread.trap_no = 11;
 			tsk->thread.error_code = 0;
@@ -310,5 +310,5 @@ do_fpu_state_restore(unsigned long r4, u
 		fpu_init();
 		tsk->used_math = 1;
 	}
-	tsk->flags |= PF_USEDFPU;
+	set_tsk_thread_flag(tsk, TIF_USEDFPU);
 }
diff -u3prN linux-2.5.73-sf-orig/include/asm-sh/system.h linux-2.5.73-sf-local/include/asm-sh/system.h
--- linux-2.5.73-sf-orig/include/asm-sh/system.h	Mon May  5 07:50:42 2003
+++ linux-2.5.73-sf-local/include/asm-sh/system.h	Mon Jul 14 12:45:57 2003
@@ -14,7 +14,7 @@
  */
 
 #define switch_to(prev, next, last) do {				\
- register unsigned long __dummy;					\
+ struct task_t *__last;							\
  register unsigned long *__ts1 __asm__ ("r1") = &prev->thread.sp;	\
  register unsigned long *__ts2 __asm__ ("r2") = &prev->thread.pc;	\
  register unsigned long *__ts4 __asm__ ("r4") = (unsigned long *)prev;	\
@@ -51,10 +51,11 @@
 		       "mov.l	@r15+, r8\n\t"				\
 		       "lds.l	@r15+, pr\n\t"				\
 		       "ldc.l	@r15+, gbr\n\t"				\
-		       : "=z" (__dummy)					\
+		       : "=z" (__last)					\
 		       : "r" (__ts1), "r" (__ts2), "r" (__ts4), 	\
 			 "r" (__ts5), "r" (__ts6), "r" (__ts7) 		\
 		       : "r3", "t");					\
+	last = __last;							\
 } while (0)
 
 #define nop() __asm__ __volatile__ ("nop")

Re: [linuxsh-dev] [PATCH] syscalls and cache behavior

[SUGIOKA T. <su...@it...>]

At 11:03 03/07/09 +0100, Alex Bennee <ker...@be...> wrote:
>On Mon, 2003-07-07 at 13:47, Alex Bennee wrote:
>> 2. Revises the cache flushing code to be finer grained (instead of just
>> just copying a region into user memory).
>
>Patch applied to CVS without the additional sys calls (which are
>pointless unless someone want to hack around with glibc's inner compile
>settings).
>

Please add missing file "asm-sh/cachectl.h" .

----
SUGIOKA Toshinobu

[linuxsh-dev] do without RTC

[<tak...@op...>]

Hi,

I'm adding support for Hitachi-ULSI's SH7300 Solution Engine(MS7300CP01).
But, one problem. Kernel stops while measuring peripheral clock frequency,
because either SH7300 nor MS7300CP01 has RTC.

So, I added new command line parameter "sh_pclk=", and its default
value CONFIG_SH_PCLK_FREQ as config parameter, to set frequency by
hand and bypass the mesurement. It works fine.

I think this can be an parameter not only for MS7300CP01, but common
for all the other superh target boards, because..
* It works same as current version, if CONFIG_SH_PCLKFREQ = 0.
* Clock measurement is not so accurate. This can help.

Or, should I add one more parameter(bool CONFIG_SH_PCLK) and switch by #if defined ?
Or, #if defined(CONFIG_SH_MOBILE_SOLUTION_ENGINE) or something ?

Any comments are welcome. If no objection, I'm checking them into CVS later.

Regards,
/yoshii

# paches follows.. 
--- arch/sh/config.in	24 Jun 2003 08:45:46 -0000	1.1.1.1.2.13
+++ arch/sh/config.in	14 Jul 2003 16:21:49 -0000
@@ -212,6 +224,8 @@ fi
 
 bool 'Wakeup UBC on startup' CONFIG_UBC_WAKEUP
 bool 'DMA controller (DMAC) support' CONFIG_SH_DMA
+int  'Peripheral clock frequency(Hz) (0: auto detect)' CONFIG_SH_PCLK_FREQ 0 0 1000000000
+
 bool 'Default bootloader kernel arguments' CONFIG_CMDLINE_BOOL
 if [ "$CONFIG_CMDLINE_BOOL" = "y" ] ; then
   string 'Initial kernel command string' CONFIG_CMDLINE "console=ttySC1,115200"

--- arch/sh/kernel/time.c	20 Jun 2003 13:13:25 -0000	1.1.1.1.2.5
+++ arch/sh/kernel/time.c	14 Jul 2003 16:21:50 -0000
@@ -318,6 +335,16 @@ static unsigned int __init get_timer_fre
 	return freq * factor;
 }
 
+static unsigned int sh_pclk_freq __initdata = CONFIG_SH_PCLK_FREQ;
+static int __init sh_pclk_setup(char *str)
+{
+	unsigned int freq;
+	if (get_option(&str, &freq))
+		sh_pclk_freq = freq;
+	return 1;
+}
+__setup("sh_pclk=", sh_pclk_setup);
+
 static struct irqaction irq0  = { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL};
 
 void __init time_init(void)
@@ -394,13 +425,21 @@ void __init time_init(void)
 #endif
 #endif
 
-	rtc_gettimeofday(&xtime);
+	if(rtc_gettimeofday)
+		rtc_gettimeofday(&xtime);
+	else{
+        	xtime.tv_sec = mktime(2000, 1, 1, 0, 0, 0);
+        	xtime.tv_usec = 0;
+	}
 
 	setup_irq(TIMER_IRQ, &irq0);
 
-	timer_freq = get_timer_frequency();
-
-	module_clock = timer_freq * 4;
+	if( sh_pclk_freq ){
+		module_clock = sh_pclk_freq;
+	}else{
+		timer_freq = get_timer_frequency();
+		module_clock = timer_freq * 4;
+	}
 
 #if defined(__sh3__)
 	{

[linuxsh-dev] [PATH] Add USB support to tree and allow keyboards.

[Alex B. <ker...@be...>]

Hi,

We have USB on our board but to get it working you need to patch
config.in to allow it to be selected (I think the GX1 just defines the
appropriate USB bits if its selected).

If you include USB and your not one of the listed sub-archs you can
still run a console so I've also patched the drivers/char/makefile to
include the minimum required to compile USB keyboard support.

Comments?

Index: arch/sh/config.in
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/Attic/config.in,v
retrieving revision 1.1.1.1.2.13
diff -u -r1.1.1.1.2.13 config.in
--- arch/sh/config.in	24 Jun 2003 08:45:46 -0000	1.1.1.1.2.13
+++ arch/sh/config.in	9 Jul 2003 10:52:03 -0000
@@ -415,6 +415,9 @@
 fi
 endmenu
 
+# Include USB Stuff
+source drivers/usb/Config.in
+
 mainmenu_option next_comment
 comment 'Kernel hacking'
 
Index: drivers/char/Makefile
===================================================================
RCS file: /cvsroot/linuxsh/linux/drivers/char/Makefile,v
retrieving revision 1.1.1.1.2.9
diff -u -r1.1.1.1.2.9 Makefile
--- drivers/char/Makefile	24 Jun 2003 08:49:53 -0000	1.1.1.1.2.9
+++ drivers/char/Makefile	9 Jul 2003 10:52:04 -0000
@@ -110,9 +110,15 @@
 endif
 
 ifeq ($(ARCH),sh)
-  KEYMAP   =
-  KEYBD    =
-  CONSOLE  =
+  ifeq ($(CONFIG_USB),y)
+    KEYMAP   = defkeymap.o
+    KEYBD    = # by default no keyboard, but USB can be plugged in
+    CONSOLE  = console.o
+  else
+    KEYMAP   = 
+    KEYBD    = 
+    CONSOLE  =
+  endif
   ifeq ($(CONFIG_SH_HP600),y)
   KEYMAP   = defkeymap.o
   KEYBD    = scan_keyb.o hp600_keyb.o



-- 
Alex, homepage: http://www.bennee.com/~alex/
Barach's Rule:
	An alcoholic is a person who drinks more than his own physician.

Re: [linuxsh-dev] [PATCH] syscalls and cache behavior

[Alex B. <ker...@be...>]

On Mon, 2003-07-07 at 13:47, Alex Bennee wrote:
> Hi,
>
> 2. Revises the cache flushing code to be finer grained (instead of just
> just copying a region into user memory).

Patch applied to CVS without the additional sys calls (which are
pointless unless someone want to hack around with glibc's inner compile
settings).

-- 
Alex, homepage: http://www.bennee.com/~alex/
The world is coming to an end!  Repent and return those library books!

[linuxsh-dev] [PATCH] syscalls and cache behavior

[Alex B. <ker...@be...>]

Hi,

I'm slowly going through the ST patches and I've been looking at the
syscall patch which does two things:

1. Adds additional syscalls which break out a bunch of network syscall
(which I assume are usually called via the network syscall multiplexer).

2. Revises the cache flushing code to be finer grained (instead of just
just copying a region into user memory).

If tested on my board and the cache flushing seems to be ok (although if
there was a problem it would probably bite on strange corner cases). The
syscall changes will make no difference on their own as glibc would need
to be configured to use the un-multiplexed syscalls).

If people are uncomfortable with the additional syscall's I can just
drop them from the patch. Can anyone confirm the cache changes before I
commit them. I think they are worth putting in.

Diff attached.


Index: arch/sh/kernel/entry.S
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/entry.S,v
retrieving revision 1.1.1.1.2.14
diff -u -r1.1.1.1.2.14 entry.S
--- arch/sh/kernel/entry.S	20 Jun 2003 13:13:25 -0000	1.1.1.1.2.14
+++ arch/sh/kernel/entry.S	7 Jul 2003 12:10:05 -0000
@@ -1145,7 +1145,7 @@
 	.long SYMBOL_NAME(sys_newstat)
 	.long SYMBOL_NAME(sys_newlstat)
 	.long SYMBOL_NAME(sys_newfstat)
-	.long SYMBOL_NAME(sys_uname)
+	.long SYMBOL_NAME(sys_ni_syscall)	/* old uname */
 	.long SYMBOL_NAME(sys_ni_syscall)	/* 110 */ /* iopl */
 	.long SYMBOL_NAME(sys_vhangup)
 	.long SYMBOL_NAME(sys_ni_syscall)	/* idle */
@@ -1159,7 +1159,7 @@
 	.long SYMBOL_NAME(sys_clone)		/* 120 */
 	.long SYMBOL_NAME(sys_setdomainname)
 	.long SYMBOL_NAME(sys_newuname)
-	.long SYMBOL_NAME(sys_ni_syscall)	/* sys_modify_ldt */
+	.long SYMBOL_NAME(sys_cacheflush)	/* sys_modify_ldt for i386 */
 	.long SYMBOL_NAME(sys_adjtimex)
 	.long SYMBOL_NAME(sys_mprotect)		/* 125 */
 	.long SYMBOL_NAME(sys_sigprocmask)
@@ -1262,7 +1262,24 @@
  	.long SYMBOL_NAME(sys_tkill)
 	.long SYMBOL_NAME(sys_ni_syscall)
 	.long SYMBOL_NAME(sys_readahead)	/* 225 */
-
+	.long SYMBOL_NAME(sys_socket)
+	.long SYMBOL_NAME(sys_bind)
+	.long SYMBOL_NAME(sys_connect)
+	.long SYMBOL_NAME(sys_listen)
+	.long SYMBOL_NAME(sys_accept)		/* 230 */
+	.long SYMBOL_NAME(sys_getsockname)
+	.long SYMBOL_NAME(sys_getpeername)
+	.long SYMBOL_NAME(sys_socketpair)
+	.long SYMBOL_NAME(sys_send)
+	.long SYMBOL_NAME(sys_sendto)		/* 235 */
+	.long SYMBOL_NAME(sys_recv)
+	.long SYMBOL_NAME(sys_recvfrom)
+	.long SYMBOL_NAME(sys_shutdown)
+	.long SYMBOL_NAME(sys_setsockopt)
+	.long SYMBOL_NAME(sys_getsockopt)	/* 240 */
+	.long SYMBOL_NAME(sys_sendmsg)
+	.long SYMBOL_NAME(sys_recvmsg)
+	
 	/*
 	 * NOTE!! This doesn't have to be exact - we just have
 	 * to make sure we have _enough_ of the "sys_ni_syscall"
Index: arch/sh/kernel/sys_sh.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/sys_sh.c,v
retrieving revision 1.1.1.1.2.1
diff -u -r1.1.1.1.2.1 sys_sh.c
--- arch/sh/kernel/sys_sh.c	13 Feb 2003 01:12:06 -0000	1.1.1.1.2.1
+++ arch/sh/kernel/sys_sh.c	7 Jul 2003 12:10:06 -0000
@@ -23,6 +23,7 @@
 
 #include <asm/uaccess.h>
 #include <asm/ipc.h>
+#include <asm/cachectl.h>
 
 /*
  * sys_pipe() is the normal C calling standard for creating
@@ -221,15 +222,41 @@
 	return -EINVAL;
 }
 
-asmlinkage int sys_uname(struct old_utsname * name)
+/* sys_cacheflush -- flush (part of) the processor cache.  */
+asmlinkage int
+sys_cacheflush (unsigned long addr, unsigned long len, int op)
 {
-	int err;
-	if (!name)
+	struct vm_area_struct *vma;
+
+	if ((op < 0) || (op > (CACHEFLUSH_D_PURGE|CACHEFLUSH_I)))
+		return -EINVAL;
+
+	/*
+	 * Verify that the specified address region actually belongs
+	 * to this process.
+	 */
+	if (addr + len < addr)
+		return -EFAULT;
+	vma = find_vma (current->mm, addr);
+	if (vma == NULL || addr < vma->vm_start || addr + len > vma->vm_end)
 		return -EFAULT;
-	down_read(&uts_sem);
-	err=copy_to_user(name, &system_utsname, sizeof (*name));
-	up_read(&uts_sem);
-	return err?-EFAULT:0;
+
+	switch (op & CACHEFLUSH_D_PURGE) {
+		case CACHEFLUSH_D_INVAL:
+			__flush_invalidate_region(addr, len);
+			break;
+		case CACHEFLUSH_D_WB:
+			__flush_wback_region(addr, len);
+			break;
+		case CACHEFLUSH_D_PURGE:
+			__flush_purge_region(addr, len);
+			break;
+	}
+	if (op & CACHEFLUSH_I) {
+		__flush_icache_all();
+	}
+
+	return 0;
 }
 
 asmlinkage int sys_pause(void)
Index: arch/sh/mm/cache-sh4.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/mm/cache-sh4.c,v
retrieving revision 1.1.1.1.2.7
diff -u -r1.1.1.1.2.7 cache-sh4.c
--- arch/sh/mm/cache-sh4.c	20 Jun 2003 13:13:25 -0000	1.1.1.1.2.7
+++ arch/sh/mm/cache-sh4.c	7 Jul 2003 12:10:06 -0000
@@ -177,6 +177,17 @@
 	}
 }
 
+void __flush_icache_all(void)
+{
+	unsigned long flags;
+
+	save_and_cli(flags);
+	jump_to_P2();
+	ctrl_outl(CCR_CACHE_VAL|CCR_CACHE_ICI, CCR);
+	back_to_P1();
+	restore_flags(flags);
+}
+
 /*
  * Write back the range of D-cache, and purge the I-cache.
  *



--
Alex, homepage: http://www.bennee.com/~alex/ Happiness is a hard disk.

[linuxsh-dev] Re: [uClinux-dev] uClinux SH2 port

[Paul M. <le...@li...>]

On Fri, Jul 04, 2003 at 07:46:05AM -0400, Paul Mundt wrote:
> A lot of those files can probably end up being dummy ones for the SH-2. N=
amely,
> dma.h, addrspace.h and ubc.h can likely all be empty, and shmparam.h you =
can
> copy from cpu-sh3, as the SH-2 doesn't have the D-cache aliasing issues t=
hat
> the SH-4 does.
>=20
Okay, I've added the necessary files for asm-sh/cpu-sh2 in LinuxSH CVS HEAD=
, so
you may want to look there for updates and whatever else. Notably, HEAD is =
still
against 2.5.73, though the stuff in 2.5.74 is merged from the same code.. I=
'll
sync it up at some point today.

Also, quite a bit of this stuff is completely unrelated to uClinux, so I'm =
also
CC'ing linuxsh-dev on this.

[linuxsh-dev] Where did sh_mv go from 2.4.20 to 2.4.21?

[Alex B. <ker...@be...>]

I've been trying to run some of our modules that previously worked with
2.4.20 on the 2.4.21 kernel and I've been running into problems, namely:

root@192.168.0.230:/test# insmod hc_isp116x.o
hc_isp116x.o: unresolved symbol sh_mv

I had a quick look through the symbols in the two kernel images and
found:

[alex@cambridge linux-2.4.20]$ sh4-linux-readelf -s vmlinux | grep
"sh_mv"
 10713: 8813b3d0   156 OBJECT  GLOBAL DEFAULT    7 sh_mv
 12812: 8812e484     6 OBJECT  GLOBAL DEFAULT    4 __kstrtab_sh_mv
 13537: 88134150     8 OBJECT  GLOBAL DEFAULT    6 __ksymtab_sh_mv

[alex@cambridge linux-2.4.21]$ sh4-linux-readelf -s vmlinux | grep
"sh_mv"
 10527: 8813bafc   152 OBJECT  GLOBAL DEFAULT    7 sh_mv

Now the machine vector stuff does seem to do some monkeying around using
the ALIAS_MV directive which may explain why adding an
EXPORT_SYMBOL(sh_mv) to arch/sh/kernel/sh_ksyms.c didn't seem to work
properly but what else has changed that would affect this?

Should we explicitly export the sumbol anyway?

-- 
Alex, homepage: http://www.bennee.com/~alex/

Hindsight is an exact science.

Re: [linuxsh-dev] [PATCH] ST40 PCI - updating linuxsh to ST's kernel

[Alex B. <ker...@be...>]

On Fri, 2003-06-20 at 21:52, Paul Mundt wrote:
> On Fri, Jun 20, 2003 at 07:23:52PM +0100, Alex Bennee wrote:
> > * my board has a modded sh_mv to map the pci irq which it uses instead
> > of hacking the map_harp_irq thing in st40_pci.c
> > 
> > Its all self-contained and shoudn't break anyone else. However the
> > sh_mv.map_pci_irq stuff is obviosuly not in linuxsh.
> > 
> [snip]
> This doesn't make much sense, there's _already_ a pcibios_map_platform_irq()
> that pretty much everyone but the st40 code is using.

Ok. I've changed that to use the pcibios_map_platform_irq and its
working on my board with no problems. I will check these changes in
today once I've checked no body else has any objections.

> Looking at arch/sh/stboards/setup.c, this already looks like it needs to be
> split up for harp and overdrive, in which case its trivial to just define
> the relevant pcibios_map_platform_irq() behavior there (presuming CONFIG_PCI
> is set).

I'll see if I can modify the stboard stuff but I won't be able to test
it out correctly.

> There's no reason to add this cruft into the machvec when a generic API
> that each board should implement is already existant.

Agreed. I humbly appologise for the (now reverted) cruftiness :-)

-- 
Alex, homepage: http://www.bennee.com/~alex/

The sooner you make your first 5000 mistakes, the sooner you will be
able to correct them.
		-- Nicolaides

Re: [linuxsh-dev] sh4-uclibc toolchain

[Paul v. G. <pau...@ri...>]

On Fri, Jun 20, 2003 at 04:45:41PM -0400, Paul Mundt wrote:
> Not a precompiled one. You can use the uClibc auto-builder stuff to build the
> appropriate toolchain. Last one I built for SH was 3.2, though that was w/o
> HAS_MMU set. See:
> 	
> 	http://www.uclibc.org/cgi-bin/cvsweb/toolchain/
> 
Has anybody had any luck with this lately? C++ doesn't build out of the box
unless I change some of the g++ source. This applies to all gcc-3.2.x
releases.

Once I then build the chain and use it, all cross-compiled binaries then
fail unless I compile with -static.

Thanks.

Paul
-- 
Paul van Gool                                               Rincon Networks
pau...@ri...                              (805)-705-1442

Re: [linuxsh-dev] [PATCH] ST40 PCI - updating linuxsh to ST's kernel

[Paul M. <le...@li...>]

On Fri, Jun 20, 2003 at 07:23:52PM +0100, Alex Bennee wrote:
> * my board has a modded sh_mv to map the pci irq which it uses instead
> of hacking the map_harp_irq thing in st40_pci.c
>=20
> Its all self-contained and shoudn't break anyone else. However the
> sh_mv.map_pci_irq stuff is obviosuly not in linuxsh.
>=20
[snip]
> -static int __init map_harp_irq(struct pci_dev *dev, u8 slot, u8 pin)
> -{
> -	switch (slot) {
> -#ifdef CONFIG_SH_STB1_HARP
> -	case 2:		/*This is the PCI slot on the */
> -		return HARP_PCI_IRQ;
> -	case 1:		/* this is the bridge */
> -		return HARP_BRIDGE_IRQ;
> -#elif defined(CONFIG_SH_STB1_OVERDRIVE)
> -	case 1:
> -	case 2:
> -	case 3:
> -		return slot - 1;
> -#else
> -#error Unknown board
> -#endif
> -	default:
> -		return -1;
[snip]
> @@ -454,10 +553,137 @@
>  	/* ok, do the scan man */
>  	pci_root_bus =3D pci_scan_bus(0, &pci_config_ops, NULL);
>  	pci_assign_unassigned_resources();
> -	pci_fixup_irqs(no_swizzle, map_harp_irq);
> +	pci_fixup_irqs(no_swizzle, sh_mv.mv_map_pci_irq);
> +
> +}

This doesn't make much sense, there's _already_ a pcibios_map_platform_irq()
that pretty much everyone but the st40 code is using.

Looking at arch/sh/stboards/setup.c, this already looks like it needs to be
split up for harp and overdrive, in which case its trivial to just define
the relevant pcibios_map_platform_irq() behavior there (presuming CONFIG_PCI
is set).

There's no reason to add this cruft into the machvec when a generic API
that each board should implement is already existant.

I haven't seen the ST40 stuff in the ST tree, but I would guess that
arch/sh/stboards is still a mess. In which case, this needs to be addressed
before polluting the machvec further.

Re: [linuxsh-dev] sh4-uclibc toolchain

[Paul M. <le...@li...>]

On Fri, Jun 20, 2003 at 12:54:51PM -0700, Paul van Gool wrote:
> before I start building my own... Is there an SH4 toolchain available out
> there that uses uClibc?
>=20
Not a precompiled one. You can use the uClibc auto-builder stuff to build t=
he
appropriate toolchain. Last one I built for SH was 3.2, though that was w/o
HAS_MMU set. See:
=09
	http://www.uclibc.org/cgi-bin/cvsweb/toolchain/

[linuxsh-dev] sh4-uclibc toolchain

[Paul v. G. <pau...@ri...>]

Hi,

before I start building my own... Is there an SH4 toolchain available out
there that uses uClibc?

Thanks.

Paul
-- 
Paul van Gool                                               Rincon Networks
pau...@ri...                              (805)-705-1442

[linuxsh-dev] [PATCH] ST40 PCI - updating linuxsh to ST's kernel

[Alex B. <ker...@be...>]

Stuart,

Attached is what I did to go from vanilla 2.4.21+linuxsh to get PCI
working correctly on my ST40 based bord. Basically it copies the
arch/sh/kernel/st40_pci.[ch] except:

* my board has a modded sh_mv to map the pci irq which it uses instead
of hacking the map_harp_irq thing in st40_pci.c
* I've cut and pasted the PLL extraction #define's from st40_clock.h
which isn't in linuxsh
* I've left out the H8 bug workaround stuff as it doesn't seem to affect
me

Its all self-contained and shoudn't break anyone else. However the
sh_mv.map_pci_irq stuff is obviosuly not in linuxsh.

I'm off on holiday for a week and a bit but if you can make the #ifdef
hackery for map_harp_irq go away in linuxsh CVS and have it working with
your ST40 based boards I see no reason why this patch (or close
relation) cannot be commited to CVS. ST40 stuff should then work out of
the box on Linuxsh!

I'll be contactable on my alex@ address until Tuesday, after which I
will be in a field at Glastonbury until the following Monday :-)



Index: arch/sh/kernel/pci_st40.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/Attic/pci_st40.c,v
retrieving revision 1.1.1.1
diff -u -r1.1.1.1 pci_st40.c
--- arch/sh/kernel/pci_st40.c	15 Oct 2001 20:44:51 -0000	1.1.1.1
+++ arch/sh/kernel/pci_st40.c	20 Jun 2003 17:57:36 -0000
@@ -21,6 +21,8 @@
 
 #include "pci_st40.h"
 
+static struct resource pci_io_space, pci_mem_space;
+
 /* This is in P2 of course */
 #define ST40PCI_BASE_ADDRESS     (0xb0000000)
 #define ST40PCI_MEM_ADDRESS      (ST40PCI_BASE_ADDRESS+0x0)
@@ -28,97 +30,178 @@
 #define ST40PCI_REG_ADDRESS      (ST40PCI_BASE_ADDRESS+0x07000000)
 
 #define ST40PCI_REG(x) (ST40PCI_REG_ADDRESS+(ST40PCI_##x))
-
-#define ST40PCI_WRITE(reg,val) writel((val),ST40PCI_REG(reg))
-#define ST40PCI_WRITE_SHORT(reg,val) writew((val),ST40PCI_REG(reg))
-#define ST40PCI_WRITE_BYTE(reg,val) writeb((val),ST40PCI_REG(reg))
+#define ST40PCI_REG_INDEXED(reg, index) 				\
+	(ST40PCI_REG(reg##0) +					\
+	  ((ST40PCI_REG(reg##1) - ST40PCI_REG(reg##0))*index))
+
+#define ST40PCI_WRITE(reg,val)
writel((val),ST40PCI_REG(reg));udelay(2);
+#define ST40PCI_WRITE_SHORT(reg,val)
writew((val),ST40PCI_REG(reg));udelay(2);
+#define ST40PCI_WRITE_BYTE(reg,val)
writeb((val),ST40PCI_REG(reg));udelay(2);
+#define ST40PCI_WRITE_INDEXED(reg, index, val)				\
+	 writel((val), ST40PCI_REG_INDEXED(reg, index)); udelay(2);
 
 #define ST40PCI_READ(reg) readl(ST40PCI_REG(reg))
 #define ST40PCI_READ_SHORT(reg) readw(ST40PCI_REG(reg))
 #define ST40PCI_READ_BYTE(reg) readb(ST40PCI_REG(reg))
+#define ST40PCI_READ_INDEXED(reg, index) readl(ST40PCI_REG_INDEXED(reg,
index))
 
 #define ST40PCI_SERR_IRQ        64
-#define ST40PCI_SERR_INT_GROUP  0
-#define ST40PCI_SERR_INT_POS    0
-#define ST40PCI_SERR_INT_PRI    15
-
 #define ST40PCI_ERR_IRQ        65
-#define ST40PCI_ERR_INT_GROUP   1
-#define ST40PCI_ERR_INT_POS     1
-#define ST40PCI_ERR_INT_PRI     14
+#define ST40PCI_AD_INT			66
+#define ST40PCI_PWR_DWN_INT		67
 
+#define PLLPCICR (0xbb040000+0x10)	// CLKGENA.PLL2CR
 
+/* From ST's include/asm-sh/st40_clock.h */
 /* Macros to extract PLL params */
 #define PLL_MDIV(reg)  ( ((unsigned)reg) & 0xff )
 #define PLL_NDIV(reg) ( (((unsigned)reg)>>8) & 0xff )
-#define PLL_PDIV(reg) ( (((unsigned)reg)>>16) & 0x3 )
+#define PLL_PDIV(reg) ( (((unsigned)reg)>>16) & 0x7 )
 #define PLL_SETUP(reg) ( (((unsigned)reg)>>19) & 0x1ff )
 
-/* Build up the appropriate settings */
-#define PLL_SET(mdiv,ndiv,pdiv,setup) \
-( ((mdiv)&0xff) | (((ndiv)&0xff)<<8) | (((pdiv)&3)<<16)|
(((setup)&0x1ff)<<19))
 
-#define PLLPCICR (0xbb040000+0x10)
+static void __init pcibios_assign_resources(void);
+
+static __init void SetPCIPLL(void)
+{
+	{
+		/* Lets play with the PLL values */
+		unsigned long pll1cr1;
+		unsigned long mdiv, ndiv, pdiv;
+		unsigned long muxcr;
+		unsigned int muxcr_ratios[4] = { 8, 16, 21, 1 };
+		unsigned int freq;
+
+#define CLKGENA            0xbb040000
+#define CLKGENA_PLL2_MUXCR CLKGENA + 0x48
+		pll1cr1 = ctrl_inl(PLLPCICR);
+		printk("PLL1CR1 %08x\n", pll1cr1);
+		mdiv = PLL_MDIV(pll1cr1);
+		ndiv = PLL_NDIV(pll1cr1);
+		pdiv = PLL_PDIV(pll1cr1);
+		printk("mdiv %02x ndiv %02x pdiv %02x\n", mdiv, ndiv, pdiv);
+		freq = ((2*27*ndiv)/mdiv) / (1 << pdiv);
+		printk("PLL freq %dMHz\n", freq);
+		muxcr = ctrl_inl(CLKGENA_PLL2_MUXCR);
+		printk("PCI freq %dMhz\n", freq / muxcr_ratios[muxcr & 3]);
+	}
+}
+
+
+struct pci_err {
+  unsigned mask;
+  const char *error_string;
+};
+
 
-#define PLLPCICR_POWERON (1<<28)
-#define PLLPCICR_OUT_EN (1<<29)
-#define PLLPCICR_LOCKSELECT (1<<30)
-#define PLLPCICR_LOCK (1<<31)
+static struct pci_err int_error[]={
+  { INT_MNLTDIM,"MNLTDIM: Master non-lock transfer"},
+  { INT_TTADI,  "TTADI: Illegal byte enable in I/O transfer"},  
+  { INT_TMTO,   "TMTO: Target memory read/write timeout"},  
+  { INT_MDEI,   "MDEI: Master function disable error"},
+  { INT_APEDI,  "APEDI: Address parity error"},
+  { INT_SDI,    "SDI: SERR detected"},
+  { INT_DPEITW, "DPEITW: Data parity error target write"},  
+  { INT_PEDITR, "PEDITR: PERR detected"},
+  { INT_TADIM,  "TADIM: Target abort detected"},
+  { INT_MADIM,  "MADIM: Master abort detected"},
+  { INT_MWPDI,  "MWPDI: PERR from target at data write"},
+  { INT_MRDPEI, "MRDPEI: Master read data parity error"}
+};
+#define NUM_PCI_INT_ERRS (sizeof(int_error)/sizeof(struct pci_err))
 
+static struct pci_err aint_error[]={
+  { AINT_MBI,   "MBI: Master broken"},
+  { AINT_TBTOI, "TBTOI: Target bus timeout"},
+  { AINT_MBTOI, "MBTOI: Master bus timeout"},
+  { AINT_TAI,   "TAI: Target abort"},
+  { AINT_MAI,   "MAI: Master abort"},
+  { AINT_RDPEI, "RDPEI: Read data parity"},
+  { AINT_WDPE,  "WDPE: Write data parity"}
+};
 
-#define PLL_25MHZ 0x793c8512
-#define PLL_33MHZ PLL_SET(18,88,3,295)
 
+#define NUM_PCI_AINT_ERRS (sizeof(aint_error)/sizeof(struct pci_err))
 
-static __init void SetPCIPLL(void)
+static void print_pci_errors(unsigned reg,struct pci_err *error,int
num_errors)
 {
-	/* Stop the PLL */
-	writel(0, PLLPCICR);
+  int i;
 
-	/* Always run at 33Mhz. The PCI clock is totally async 
-	 * to the rest of the system
-	 */
-	writel(PLL_33MHZ | PLLPCICR_POWERON, PLLPCICR);
+  for(i=0;i<num_errors;i++) {
+    if(reg & error[i].mask) {
+      printk("%s\n",error[i].error_string);
+    }
+  }
 
-	printk("ST40PCI: Waiting for PCI PLL to lock\n");
-	while ((readl(PLLPCICR) & PLLPCICR_LOCK) == 0);
-	writel(readl(PLLPCICR) | PLLPCICR_OUT_EN, PLLPCICR);
 }
 
 
+static char * pci_commands[16]={
+	"Int Ack",
+	"Special Cycle",
+	"I/O Read",
+	"I/O Write",
+	"Reserved",
+	"Reserved",
+	"Memory Read",
+	"Memory Write",
+	"Reserved",
+	"Reserved",
+	"Configuration Read",
+	"Configuration Write",
+	"Memory Read Multiple",
+	"Dual Address Cycle",
+	"Memory Read Line",
+	"Memory Write-and-Invalidate"
+};
+
+
 static void st40_pci_irq(int irq, void *dev_instance, struct pt_regs
*regs)
 {
 
 	unsigned pci_int, pci_air, pci_cir, pci_aint;
+	static int count=0;
+
+
+	pci_int = ST40PCI_READ(INT);pci_aint = ST40PCI_READ(AINT);
+	pci_cir = ST40PCI_READ(CIR);pci_air = ST40PCI_READ(AIR);
+
+	/* Reset state to stop multiple interrupts */
+        ST40PCI_WRITE(INT, ~0); ST40PCI_WRITE(AINT, ~0); 
+
+
+	if(++count>1) return;
 
-	pci_int = ST40PCI_READ(INT);
-	pci_cir = ST40PCI_READ(CIR);
-	pci_air = ST40PCI_READ(AIR);
-
-	if (pci_int) {
-		printk("PCI INTERRUPT!\n");
-		printk("PCI INT -> 0x%x\n", pci_int & 0xffff);
-		printk("PCI AIR -> 0x%x\n", pci_air);
-		printk("PCI CIR -> 0x%x\n", pci_cir);
-		ST40PCI_WRITE(INT, ~0);
-	}
-
-	pci_aint = ST40PCI_READ(AINT);
-	if (pci_aint) {
-		printk("PCI ARB INTERRUPT!\n");
-		printk("PCI AINT -> 0x%x\n", pci_aint);
-		printk("PCI AIR -> 0x%x\n", pci_air);
-		printk("PCI CIR -> 0x%x\n", pci_cir);
-		ST40PCI_WRITE(AINT, ~0);
+	printk("** PCI ERROR **\n");
+
+        if(pci_int) {
+		printk("** INT register status\n");
+		print_pci_errors(pci_int,int_error,NUM_PCI_INT_ERRS);
 	}
 
+        if(pci_aint) {
+		printk("** AINT register status\n");
+		print_pci_errors(pci_aint,aint_error,NUM_PCI_AINT_ERRS);
+	}   
+	
+	printk("** Address and command info\n");
+
+	printk("** Command  %s : Address 0x%x\n",
+	       pci_commands[pci_cir&0xf],pci_air);
+
+	if(pci_cir&CIR_PIOTEM) {
+		printk("CIR_PIOTEM:PIO transfer error for master\n");
+	}
+        if(pci_cir&CIR_RWTET) {
+		printk("CIR_RWTET:Read/Write transfer error for target\n");
+	}
 }
 
 
 /* Rounds a number UP to the nearest power of two. Used for
  * sizing the PCI window.
  */
-static u32 __init r2p2(u32 num)
+static u32 r2p2(u32 num)
 {
 	int i = 31;
 	u32 tmp = num;
@@ -161,17 +244,49 @@
 }
 
 
+static void __init pci_fixup_cache_line(struct pci_dev *d)
+{
+	pci_write_config_byte(d,PCI_CACHE_LINE_SIZE,0);
+}
+
+
 /* Add future fixups here... */
 struct pci_fixup pcibios_fixups[] = {
 	{ PCI_FIXUP_HEADER,	PCI_ANY_ID,	PCI_ANY_ID,	pci_fixup_ide_bases },
+	{ PCI_FIXUP_FINAL,	PCI_ANY_ID,	PCI_ANY_ID,	pci_fixup_cache_line },
 	{ 0 }
 };
 
+char * __init pcibios_setup(char *str)
+{
+	return str;
+}
+
+static void __init st40pci_init_resources(void)
+{
+	pci_io_space.start = PCIBIOS_MIN_IO;
+	pci_io_space.end   = 64*1024 - PCIBIOS_MIN_IO - 1;
+	pci_io_space.name = "ST40 PCI";
+	pci_io_space.flags = IORESOURCE_IO;
+
+	request_resource(&ioport_resource, &pci_io_space);
+
+	pci_mem_space.start = PCIBIOS_MIN_MEM;
+	pci_mem_space.end   = PCIBIOS_MIN_MEM + (96*1024*1024) -1;
+	pci_mem_space.name = "ST40 PCI";
+	pci_mem_space.flags = IORESOURCE_MEM;
+
+	request_resource(&iomem_resource, &pci_mem_space);
+}
+
 int __init st40pci_init(unsigned memStart, unsigned memSize)
 {
 	u32 lsr0;
 
+ 	printk("PCI version register reads
0x%x\n",ST40PCI_READ(VCR_VERSION));
+
 	SetPCIPLL();
+	st40pci_init_resources();
 
 	/* Initialises the ST40 pci subsystem, performing a reset, then
programming
 	 * up the address space decoders appropriately
@@ -184,21 +299,22 @@
 	/* Loop while core resets */
 	while (ST40PCI_READ(CR) & CR_SOFT_RESET);
 
+	/* Switch off interrupts */
+	ST40PCI_WRITE(INTM, 0);
+	ST40PCI_WRITE(AINT, 0);
+
 	/* Now, lets reset all the cards on the bus with extreme prejudice */
 	ST40PCI_WRITE(CR, CR_LOCK_MASK | CR_RSTCTL);
 	udelay(250);
 
 	/* Set bus active, take it out of reset */
-	ST40PCI_WRITE(CR, CR_LOCK_MASK | CR_CFINT | CR_PFCS | CR_PFE);
+	ST40PCI_WRITE(CR, CR_LOCK_MASK | CR_BMAM | CR_CFINT | CR_PFCS |
CR_PFE);
 
 	/* The PCI spec says that no access must be made to the bus until 1
second
 	 * after reset. This seem ludicrously long, but some delay is needed
here
 	 */
 	mdelay(1000);
 
-	/* Switch off interrupts */
-	ST40PCI_WRITE(INTM, 0);
-	ST40PCI_WRITE(AINT, 0);
 
 	/* Allow it to be a master */
 
@@ -224,47 +340,24 @@
 	/* Set up the 64K window */
 	ST40PCI_WRITE(IOBMR, 0x0);
 
-	/* Now we set up the mbars so the PCI bus can see the memory of the
machine */
+	/* Now we set up the mbars so the PCI bus can see the local memory */
+	/* Expose a 256M window starting at PCI address 0... */
+	ST40PCI_WRITE(CSR_MBAR0, 0);
+	ST40PCI_WRITE(LSR0, 0x0fff0001);
 
-	if (memSize < (64 * 1024)) {
-		printk("Ridiculous memory size of 0x%x?\n",memSize);
-		return 0;
-	}
-
-	lsr0 =
-	    (memSize >
-	     (512 * 1024 * 1024)) ? 0x1fff0001 : ((r2p2(memSize) -
-						   0x10000) | 0x1);
-
-	ST40PCI_WRITE(LSR0, lsr0);
-
-	ST40PCI_WRITE(CSR_MBAR0, memStart);
-	ST40PCI_WRITE(LAR0, memStart);
+	/* ... and set up the initial incomming window to expose all of RAM */
+	pci_set_rbar_region(7, memStart, memStart, memSize);
 
 	/* Maximise timeout values */
 	ST40PCI_WRITE_BYTE(CSR_TRDY, 0xff);
 	ST40PCI_WRITE_BYTE(CSR_RETRY, 0xff);
 	ST40PCI_WRITE_BYTE(CSR_MIT, 0xff);
 
-
-	/* Install the pci interrupt handlers */
-	make_intc2_irq(ST40PCI_SERR_IRQ, INTC2_BASE0,
-		       ST40PCI_SERR_INT_GROUP, ST40PCI_SERR_INT_POS,
-		       ST40PCI_SERR_INT_PRI);
-
-	make_intc2_irq(ST40PCI_ERR_IRQ, INTC2_BASE0, ST40PCI_ERR_INT_GROUP,
-		       ST40PCI_ERR_INT_POS, ST40PCI_ERR_INT_PRI);
-
+	ST40PCI_WRITE_BYTE(PERF,PERF_MASTER_WRITE_POSTING);
 
 	return 1;
 }
 
-char * __init pcibios_setup(char *str)
-{
-	return str;
-}
-
-
 #define SET_CONFIG_BITS(bus,devfn,where)\
   (((bus) << 16) | ((devfn) << 8) | ((where) & ~3) | (bus!=0))
 
@@ -276,7 +369,7 @@
 	if (ST40PCI_READ(INT) & INT_MADIM) {
 		/* Should we clear config space version as well ??? */
 		ST40PCI_WRITE(INT, INT_MADIM);
-		ST40PCI_WRITE_SHORT(CSR_STATUS, 0);
+		ST40PCI_WRITE_SHORT(CSR_STATUS, PCI_RMA);
 		return 1;
 	}
 
@@ -287,6 +380,8 @@
 static int st40pci_read_config_byte(struct pci_dev *dev, int where,
 				    u8 * val)
 {
+	CheckForMasterAbort();
+
 	ST40PCI_WRITE(PAR, CONFIG_CMD(dev, where));
 
 	*val = ST40PCI_READ_BYTE(PDR + (where & 3));
@@ -301,6 +396,8 @@
 static int st40pci_read_config_word(struct pci_dev *dev, int where,
 				    u16 * val)
 {
+	CheckForMasterAbort();
+
 	ST40PCI_WRITE(PAR, CONFIG_CMD(dev, where));
 
 	*val = ST40PCI_READ_SHORT(PDR + (where & 2));
@@ -315,13 +412,15 @@
 static int st40pci_read_config_dword(struct pci_dev *dev, int where,
 				     u32 * val)
 {
+	CheckForMasterAbort();
 
 	ST40PCI_WRITE(PAR, CONFIG_CMD(dev, where));
 
 	*val = ST40PCI_READ(PDR);
 
-	if (CheckForMasterAbort())
+	if (CheckForMasterAbort()) {
 		*val = 0xffffffff;
+	}
 
 	return PCIBIOS_SUCCESSFUL;
 }
@@ -379,45 +478,37 @@
 
 static u8 __init no_swizzle(struct pci_dev *dev, u8 * pin)
 {
+	printk("swizzle for dev %d on bus %d slot %d pin is %d\n",
+	       dev->devfn,dev->bus->number, PCI_SLOT(dev->devfn),*pin);
 	return PCI_SLOT(dev->devfn);
 }
 
+static inline u8 bridge_swizzle(u8 pin, u8 slot) 
+{
+	return (((pin-1) + slot) % 4) + 1;
+}
 
-/* This needs to be shunted out of here into the board specific bit */
-#define HARP_PCI_IRQ    1
-#define HARP_BRIDGE_IRQ 2
-#define OVERDRIVE_SLOT0_IRQ 0
-
-static int __init map_harp_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
-	switch (slot) {
-#ifdef CONFIG_SH_STB1_HARP
-	case 2:		/*This is the PCI slot on the */
-		return HARP_PCI_IRQ;
-	case 1:		/* this is the bridge */
-		return HARP_BRIDGE_IRQ;
-#elif defined(CONFIG_SH_STB1_OVERDRIVE)
-	case 1:
-	case 2:
-	case 3:
-		return slot - 1;
-#else
-#error Unknown board
-#endif
-	default:
-		return -1;
+u8 __init common_swizzle(struct pci_dev *dev, u8 *pinp)
+{
+	if (dev->bus->number != 0) {
+		u8 pin = *pinp;
+		do {
+			pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
+			/* Move up the chain of bridges. */
+			dev = dev->bus->self;
+		} while (dev->bus->self);
+		*pinp = pin;
+
+		/* The slot is the slot of the last bridge. */
 	}
-}
 
+	return PCI_SLOT(dev->devfn);
+}
 
 void __init
 pcibios_fixup_pbus_ranges(struct pci_bus *bus,
 			  struct pbus_set_ranges_data *ranges)
 {
-	ranges->io_start -= bus->resource[0]->start;
-	ranges->io_end -= bus->resource[0]->start;
-	ranges->mem_start -= bus->resource[1]->start;
-	ranges->mem_end -= bus->resource[1]->start;
 }
 
 void __init pcibios_init(void)
@@ -435,12 +526,20 @@
 	st40pci_init(PHYSADDR(memory_start),
 		     PHYSADDR(memory_end) - PHYSADDR(memory_start));
 
+	if (request_irq(ST40PCI_SERR_IRQ, st40_pci_irq, 
+                        SA_INTERRUPT, "st40pci", NULL)) {
+		printk(KERN_ERR "st40pci: Cannot hook interrupt\n");
+		return;
+	}
+
 	if (request_irq(ST40PCI_ERR_IRQ, st40_pci_irq, 
                         SA_INTERRUPT, "st40pci", NULL)) {
 		printk(KERN_ERR "st40pci: Cannot hook interrupt\n");
 		return;
 	}
 
+	/* Reset state just in case any outstanding (usually SERR) */
+        ST40PCI_WRITE(INT, ~0); ST40PCI_WRITE(AINT, ~0); 
 	/* Enable the PCI interrupts on the device */
 	ST40PCI_WRITE(INTM, ~0);
 	ST40PCI_WRITE(AINT, ~0);
@@ -454,10 +553,137 @@
 	/* ok, do the scan man */
 	pci_root_bus = pci_scan_bus(0, &pci_config_ops, NULL);
 	pci_assign_unassigned_resources();
-	pci_fixup_irqs(no_swizzle, map_harp_irq);
+	pci_fixup_irqs(no_swizzle, sh_mv.mv_map_pci_irq);
+
+}
+
+void __init
+pcibios_fixup_resource(struct resource *res, struct resource *root)
+{
+        res->start += root->start;
+        res->end += root->start;
+}
+
+void __init
+pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus
*bus)
+{
+        /* Update device resources.  */
+        int i;
 
+        for (i = 0; i < PCI_NUM_RESOURCES; i++) {
+                if (!dev->resource[i].start)
+                        continue;
+                if (dev->resource[i].flags & IORESOURCE_IO)
+                        pcibios_fixup_resource(&dev->resource[i],
+                                               &pci_io_space);
+                else if (dev->resource[i].flags & IORESOURCE_MEM)
+                        pcibios_fixup_resource(&dev->resource[i],
+                                               &pci_mem_space);
+        }
 }
 
 void __init pcibios_fixup_bus(struct pci_bus *bus)
 {
+	/* Propogate hose info into the subordinate devices.  */
+	struct list_head *ln;
+	struct pci_dev *dev = bus->self;
+
+	if (!dev) {
+		bus->resource[0] = &pci_io_space;
+		bus->resource[1] = &pci_mem_space;
+	}
+
+	for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
+		struct pci_dev *dev = pci_dev_b(ln);
+		if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
+			pcibios_fixup_device_resources(dev, bus);
+	}
+}
+
+static void __init pcibios_assign_resources(void)
+{
+	struct pci_dev *dev;
+	int idx;
+	struct resource *r;
+	pci_for_each_dev(dev) {
+		int class = dev->class >> 8;
+
+		/* Don't touch classless devices and host bridges */
+		if (!class || class == PCI_CLASS_BRIDGE_HOST)
+			continue;
+
+		for(idx=0; idx<6; idx++) {
+			r = &dev->resource[idx];
+
+			/*
+			 *  Don't touch IDE controllers and I/O ports of video cards!
+			 */
+			if ((class == PCI_CLASS_STORAGE_IDE && idx < 4) ||
+			    (class == PCI_CLASS_DISPLAY_VGA && (r->flags & IORESOURCE_IO)))
+				continue;
+
+			/*
+			 *  We shall assign a new address to this resource, either because
+			 *  the BIOS forgot to do so or because we have decided the old
+			 *  address was unusable for some reason.
+			 */
+			if (!r->start && r->end)
+                        {
+                          	pci_assign_resource(dev, idx);
+                         }
+		}
+#if 0 /* don't assign ROMs */
+		if (pci_probe & PCI_ASSIGN_ROMS) {
+			r = &dev->resource[PCI_ROM_RESOURCE];
+			r->end -= r->start;
+			r->start = 0;
+			if (r->end)
+				pci_assign_resource(dev, PCI_ROM_RESOURCE);
+		}
+#endif
+        }
+}
+
+/*
+ * Publish a region of local address space over the PCI bus
+ * to other devices.
+ */
+void pci_set_rbar_region(unsigned int region,     unsigned long
localAddr,
+			 unsigned long pciOffset, unsigned long regionSize)
+{
+	unsigned long mask;
+
+	if (region > 7)
+		return;
+
+	if (regionSize > (512 * 1024 * 1024))
+		return;
+
+	mask = r2p2(regionSize) - 0x10000;
+
+	/* Diable the region (in case currently in use, should never happen)
*/
+	ST40PCI_WRITE_INDEXED(RSR, region, 0);
+
+	/* Start of local address space to publish */
+	ST40PCI_WRITE_INDEXED(RLAR, region, PHYSADDR(localAddr) );
+
+	/* Start of region in PCI address space as an offset from MBAR0 */
+	ST40PCI_WRITE_INDEXED(RBAR, region, pciOffset);
+
+	/* Size of region */
+	ST40PCI_WRITE_INDEXED(RSR, region, mask | 1);
+} 
+
+/*
+ * Make a previously published region of local address space
+ * inaccessible to other PCI devices.
+ */ 
+void pci_clear_rbar_region(unsigned int region)
+{
+	if (region > 7)
+		return;
+
+	ST40PCI_WRITE_INDEXED(RSR, region, 0);
+	ST40PCI_WRITE_INDEXED(RBAR, region, 0);
+	ST40PCI_WRITE_INDEXED(RLAR, region, 0);
 }
Index: arch/sh/kernel/pci_st40.h
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/Attic/pci_st40.h,v
retrieving revision 1.1.1.1
diff -u -r1.1.1.1 pci_st40.h
--- arch/sh/kernel/pci_st40.h	15 Oct 2001 20:44:51 -0000	1.1.1.1
+++ arch/sh/kernel/pci_st40.h	20 Jun 2003 17:57:36 -0000
@@ -33,13 +33,37 @@
 #define ST40PCI_LAR0          0x1c
 
 #define ST40PCI_INT           0x24
+#define INT_MNLTDIM           (1<<15)
+#define INT_TTADI             (1<<14)
+#define INT_TMTO              (1<<9)
+#define INT_MDEI              (1<<8)
+#define INT_APEDI             (1<<7)
+#define INT_SDI               (1<<6)
+#define INT_DPEITW            (1<<5)
+#define INT_PEDITR            (1<<4)
+#define INT_TADIM             (1<<3)
 #define INT_MADIM             (1<<2)
+#define INT_MWPDI             (1<<1)
+#define INT_MRDPEI            (1<<0)
 
 
 #define ST40PCI_INTM          0x28
 #define ST40PCI_AIR           0x2c
+
 #define ST40PCI_CIR           0x30
+#define CIR_PIOTEM            (1<<31)
+#define CIR_RWTET             (1<<26)
+
+
 #define ST40PCI_AINT          0x40
+#define AINT_MBI              (1<<13)
+#define AINT_TBTOI            (1<<12)
+#define AINT_MBTOI            (1<<11)
+#define AINT_TAI              (1<<3)
+#define AINT_MAI              (1<<2)
+#define AINT_RDPEI            (1<<1)
+#define AINT_WDPE             (1<<0)
+
 #define ST40PCI_AINTM         0x44
 #define ST40PCI_BMIR          0x48
 #define ST40PCI_PAR           0x4c
@@ -51,16 +75,69 @@
 #define ST40PCI_IOBMR         0x74
 #define ST40PCI_PDR           0x78
 
+/* H8 specific registers start here */
+#define ST40PCI_WCBAR         0x7c
+#define ST40PCI_LOCCFG_UNLOCK 0x34
+
+#define ST40PCI_RBAR0         0x100
+#define ST40PCI_RSR0          0x104
+#define ST40PCI_RLAR0         0x108
+
+#define ST40PCI_RBAR1         0x110
+#define ST40PCI_RSR1          0x114
+#define ST40PCI_RLAR1         0x118
+
+
+#define ST40PCI_RBAR2         0x120
+#define ST40PCI_RSR2          0x124
+#define ST40PCI_RLAR2         0x128
+
+#define ST40PCI_RBAR3         0x130
+#define ST40PCI_RSR3          0x134
+#define ST40PCI_RLAR3         0x138
+
+#define ST40PCI_RBAR4         0x140
+#define ST40PCI_RSR4          0x144
+#define ST40PCI_RLAR4         0x148
+
+#define ST40PCI_RBAR5         0x150
+#define ST40PCI_RSR5          0x154
+#define ST40PCI_RLAR5         0x158
+
+#define ST40PCI_RBAR6         0x160
+#define ST40PCI_RSR6          0x164
+#define ST40PCI_RLAR6         0x168
+
+#define ST40PCI_RBAR7         0x170
+#define ST40PCI_RSR7          0x174
+#define ST40PCI_RLAR7         0x178
+
+
+#define ST40PCI_RBAR(n)      (0x100+(0x10*(n)))
+#define ST40PCI_RSR(n)       (0x104+(0x10*(n)))
+#define ST40PCI_RLAR(n)      (0x108+(0x10*(n)))
+
+#define ST40PCI_PERF               0x80
+#define PERF_MASTER_WRITE_POSTING  (1<<4)
+/* H8 specific registers end here */
+
 /* These are configs space registers */
 #define ST40PCI_CSR_VID               0x10000
 #define ST40PCI_CSR_DID               0x10002
 #define ST40PCI_CSR_CMD               0x10004
 #define ST40PCI_CSR_STATUS            0x10006
+#define   PCI_RMA			(1<<13)
 #define ST40PCI_CSR_MBAR0             0x10010
 #define ST40PCI_CSR_TRDY              0x10040
 #define ST40PCI_CSR_RETRY             0x10041
 #define ST40PCI_CSR_MIT               0x1000d
 
 #define ST40_IO_ADDR 0xb6000000       
+
+#define ST40PCI_INTPIN			0x1003d
+
+void pci_set_rbar_region(unsigned int region,     unsigned long
localAddr,
+			 unsigned long pciOffset, unsigned long regionSize);
+void pci_clear_rbar_region(unsigned int region);
 
 #endif /* __PCI_ST40_H__ */
 
-- 
Alex, homepage: http://www.bennee.com/~alex/

And ever has it been known that love knows not its own depth until the
hour of separation.
		-- Kahlil Gibran

Re: [linux-sh:02819] Re: [linuxsh-dev] [Trivial PATCH] Change CPU_ST40STB1 to CPU_ST40

[Paul M. <le...@li...>]

On Fri, Jun 20, 2003 at 04:49:05PM +0100, Stuart Menefy wrote:
> The problem is that the clockgen modules in the ST40 parts are very
> different from the Hitachi parts. GX1 has four PLLs and nine clocks, as
> opposed to the 775x one PLL and three clocks.
>=20
> I've been toying with the idea of moving the ST40 clock initialisation
> code out of time.c and into a separate file. This is what the st40_clock.c
> file started out as, although so far all thats there is the code for
> handling /proc/st40clock, which produces output something like:
>=20
Moving the st40 clock initialization code into its own file makes sense,
especially given the fact that it doesn't really have much in common with t=
he
rest of the code.

> In the ST40 the FRQCR is really only there as a support for legacy code.
> It can't represent the full range of possible clocks, and you're right,
> cpufreq stuff will almost certainly need updating, and may well have to be
> ST40 specific.
>=20
That's not that big of a deal, at the moment the sh cpufreq driver only
supports the powersave and performance policies, thus only the lowest and
highest clock rate. Really, in order to do this effectively for every
possible combination, we'd have to do this per cpu subtype, which could be
infinitely uglier then necessary.. especially given that most people just
want those two policies anyways.

Also, sh_cpufreq_setstate() which includes both common code and cpu-specific
frqcr manipulation needs to be split out as __sh_cpufreq_setstate() or
something similar to do the actual cpu-specific stuff. Then we can do this
sanely in the arch/sh/kernel/cpu/shX/ heirarchy.. so there shouldn't be any
need to make things really ST40 specific, the rest of it is pretty generic.

Re: [linux-sh:02819] Re: [linuxsh-dev] [Trivial PATCH] Change CPU_ST40STB1 to CPU_ST40

[Stuart M. <stu...@st...>]

On Fri, 20 Jun 2003 10:25:22 -0400 le...@li... wrote:

> On Fri, Jun 20, 2003 at 01:38:02PM +0100, Stuart Menefy wrote:
> >  - Standard SH4-102 core (16K D$, 8K I$, both direct mapped)
> 
> Too bad we use Hitachi part numbers! Though this may be something to look at in
> 2.5 (for sh64 we're using 101, 103, etc.)

It would makes sense. The SuperH core numbers should change a lot less
than the chip variants.

> > >From a cache point of view, these devices are identical to the original
> > 7751. That is, they are still 16K and 8K direct mapped caches, but don't
> > have some of the restrictions on cache manipulation from code running in
> > cached memory that the 7750 does.
> > 
> Looks like the frqcr values differ though, so that will need to be dealt with
> in 2.5 -- particularly for the cpufreq stuff.

The problem is that the clockgen modules in the ST40 parts are very
different from the Hitachi parts. GX1 has four PLLs and nine clocks, as
opposed to the 775x one PLL and three clocks.

I've been toying with the idea of moving the ST40 clock initialisation
code out of time.c and into a separate file. This is what the st40_clock.c
file started out as, although so far all thats there is the code for
handling /proc/st40clock, which produces output something like:

    CPU     clock (CPU Core)                     = 201 MHz
    STBUS   clock (Blitter/VFE/Compositor)       = 100 MHz
    PER     clock (Peripherals/IO/PWM/Smartcard) =  50 MHz
    PCI_BUS clock (PCI bus external interface)   =  33 MHz
    USB     clock (USB Host)                     =  48 MHz
    PCI_SS  clock (PCI subsystem)                = 100 MHz
    EMI_SS  clock (EMI subsystem)                = 100 MHz
    LMI     clock (Local memory interface)       = 100 MHz
    PIX     clock (Denc/Compositor)              =  25 MHz

In the ST40 the FRQCR is really only there as a support for legacy code.
It can't represent the full range of possible clocks, and you're right,
cpufreq stuff will almost certainly need updating, and may well have to be
ST40 specific.

> >       PVR	CVR		PRR
> > STB1: 04800000	08240000	00000541
> > GX1:  04810000	08240000	00000551
> > 
> Okay, this makes things a bit easier. I guess some of the probing code will
> have to be adjusted a bit, but for now we're doing:
> 
> 	pvr = (ctrl_inl(CCN_PVR) >> 8) & 0xffff;
> 
> which in the ST40 case leaves us with 0x8000 for ST40RA and 0x8100 for GX1.
> This might not be that big of a deal, since at the moment no one else is using
> values anywhere near that high.
> 
> How does this look for proof of concept?
> 
> Index: arch/sh/mm/cache-sh4.c
> ===================================================================
> RCS file: /cvsroot/linuxsh/linux/arch/sh/mm/cache-sh4.c,v
> retrieving revision 1.20
> diff -u -r1.20 cache-sh4.c
> --- arch/sh/mm/cache-sh4.c	10 May 2003 03:22:05 -0000	1.20
> +++ arch/sh/mm/cache-sh4.c	20 Jun 2003 14:14:35 -0000
> @@ -71,6 +71,12 @@
>  	case 0x1100:
>  		cpu_data->type = CPU_SH7751;
>  		break;
> +	case 0x8000:
> +		cpu_data->type = CPU_ST40RA;
> +		break;
> +	case 0x8100:
> +		cpu_data->type = CPU_ST40GX1;
> +		break;
>  	case 0x500:
>  		if (prr == 0x10)
>  			cpu_data->type = CPU_SH7750R;
> Index: include/asm-sh/bugs.h
> ===================================================================
> RCS file: /cvsroot/linuxsh/linux/include/asm-sh/bugs.h,v
> retrieving revision 1.3
> diff -u -r1.3 bugs.h
> --- include/asm-sh/bugs.h	4 May 2003 19:30:00 -0000	1.3
> +++ include/asm-sh/bugs.h	20 Jun 2003 14:14:53 -0000
> @@ -29,7 +29,7 @@
>  	case CPU_SH7708 ... CPU_SH7729:
>  		*p++ = '3';
>  		break;
> -	case CPU_SH7750 ... CPU_ST40STB1:
> +	case CPU_SH7750 ... CPU_ST40GX1:
>  		*p++ = '4';
>  		break;
>  	default:
> Index: include/asm-sh/processor.h
> ===================================================================
> RCS file: /cvsroot/linuxsh/linux/include/asm-sh/processor.h,v
> retrieving revision 1.10
> diff -u -r1.10 processor.h
> --- include/asm-sh/processor.h	6 May 2003 23:28:51 -0000	1.10
> +++ include/asm-sh/processor.h	20 Jun 2003 14:15:12 -0000
> @@ -34,7 +34,8 @@
>  	CPU_SH7750R,		/* Represents 7750R */
>  	CPU_SH7751,		/* Represents 7751 */
>  	CPU_SH7751R,		/* Represents 7751R */
> -	CPU_ST40STB1,
> +	CPU_ST40RA,		/* Represents ST40RA (formerly ST40STB1) */
> +	CPU_ST40GX1,		/* Represents ST40GX1 */
>  	CPU_SH_NONE
>  };
>  
> Notably, for the P2 restriction, we can just set a bit in
> cpu_data->dcache.flags for this, then test that bit and do necessary fixups
> accordingly. Should be cleaner than checking the cpu subtype all the time.
> 
> Plus we can already use the cache flags for WT/WB, etc.

Looks good to me.

> > So may that should be my task for next week, try and get a 2.5 tree working
> > on an SH4...?
> > 
> I can at least verify that it works pretty well on the 7750 and 7751R. You
> shouldn't have too many problems once the frqcr changes are in place.

OK, I'll give it a try.

Stuart

Re: [linuxsh-dev] [RFC] Add map_pci_irq to machvec.h?

[Alex B. <ker...@be...>]

On Fri, 2003-06-13 at 19:18, Paul Mundt wrote:
> On Fri, Jun 13, 2003 at 01:58:17PM +0100, Alex Bennee wrote:
> > Is it worth actually pushing on with this and adding it to the tree? The
> > current hack in arch/sh/kernel/pci_st40.c has been there for a while and
> > the machvec approach makes things a lot cleaner?
> The map_whatever_irq() stuff is already board specific, it's just the ST40
> specific implementation that made this ugly by way of ifdef abuse. Since
> there's already a CONFIG_PCI directive in the overdrive-specific code, we
> can just move this definition out of the pci-st40 code and move it into the
> board specific code.

You mean define a map_pci_irq as a global which is treated as an extern
by st40_pci.c? 

The overdrive stuff seems to duplicate a bunch of the pcibios stuff
itself, shouldn't st40 pci stuff be as generic as possible?

> Since the machvec is going away, we don't want to be adding to it unless
> it's absolutely necessary.

Well the hack did make it easier to keep my board specific hacks out of
pci_st40.c and in its own little sub-directory with no code duplication.

This would make my life easier as there are a whole bunch of updates to
the pci_st40.c code in the ST tree.

> Under 2.5 boards are broken out quite a bit better, and the old stboards/
> stuff goes away entirely, so this is much easier to deal with here.

I'm only suggesting this for 2.4 anyway. Behind the scenes I've just
re-synced my boards drop-in tree to include the barest minimum board
specific stuff so its easier to test/submit the changes to linuxsh
without infecting it with my board specific cruft.

However that said its only a small change in the grand scheme of things
so I can live with the status quo for now, I don't want to arbitarilly
affect other peoples hacking for my convienence :-)

-- 
Alex, homepage: http://www.bennee.com/~alex/

Don't lose
Your head
To gain a minute
You need your head
Your brains are in it.
		-- Burma Shave

Re: [linux-sh:02817] Re: [linuxsh-dev] [Trivial PATCH] Change CPU_ST40STB1 to CPU_ST40

[Paul M. <le...@li...>]

On Fri, Jun 20, 2003 at 01:38:02PM +0100, Stuart Menefy wrote:
>  - Standard SH4-102 core (16K D$, 8K I$, both direct mapped)

Too bad we use Hitachi part numbers! Though this may be something to look a=
t in
2.5 (for sh64 we're using 101, 103, etc.)

> >From a cache point of view, these devices are identical to the original
> 7751. That is, they are still 16K and 8K direct mapped caches, but don't
> have some of the restrictions on cache manipulation from code running in
> cached memory that the 7750 does.
>=20
Looks like the frqcr values differ though, so that will need to be dealt wi=
th
in 2.5 -- particularly for the cpufreq stuff.

>       PVR	CVR		PRR
> STB1: 04800000	08240000	00000541
> GX1:  04810000	08240000	00000551
>=20
Okay, this makes things a bit easier. I guess some of the probing code will
have to be adjusted a bit, but for now we're doing:

	pvr =3D (ctrl_inl(CCN_PVR) >> 8) & 0xffff;

which in the ST40 case leaves us with 0x8000 for ST40RA and 0x8100 for GX1.
This might not be that big of a deal, since at the moment no one else is us=
ing
values anywhere near that high.

How does this look for proof of concept?

Index: arch/sh/mm/cache-sh4.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linuxsh/linux/arch/sh/mm/cache-sh4.c,v
retrieving revision 1.20
diff -u -r1.20 cache-sh4.c
--- arch/sh/mm/cache-sh4.c	10 May 2003 03:22:05 -0000	1.20
+++ arch/sh/mm/cache-sh4.c	20 Jun 2003 14:14:35 -0000
@@ -71,6 +71,12 @@
 	case 0x1100:
 		cpu_data->type =3D CPU_SH7751;
 		break;
+	case 0x8000:
+		cpu_data->type =3D CPU_ST40RA;
+		break;
+	case 0x8100:
+		cpu_data->type =3D CPU_ST40GX1;
+		break;
 	case 0x500:
 		if (prr =3D=3D 0x10)
 			cpu_data->type =3D CPU_SH7750R;
Index: include/asm-sh/bugs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/bugs.h,v
retrieving revision 1.3
diff -u -r1.3 bugs.h
--- include/asm-sh/bugs.h	4 May 2003 19:30:00 -0000	1.3
+++ include/asm-sh/bugs.h	20 Jun 2003 14:14:53 -0000
@@ -29,7 +29,7 @@
 	case CPU_SH7708 ... CPU_SH7729:
 		*p++ =3D '3';
 		break;
-	case CPU_SH7750 ... CPU_ST40STB1:
+	case CPU_SH7750 ... CPU_ST40GX1:
 		*p++ =3D '4';
 		break;
 	default:
Index: include/asm-sh/processor.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/processor.h,v
retrieving revision 1.10
diff -u -r1.10 processor.h
--- include/asm-sh/processor.h	6 May 2003 23:28:51 -0000	1.10
+++ include/asm-sh/processor.h	20 Jun 2003 14:15:12 -0000
@@ -34,7 +34,8 @@
 	CPU_SH7750R,		/* Represents 7750R */
 	CPU_SH7751,		/* Represents 7751 */
 	CPU_SH7751R,		/* Represents 7751R */
-	CPU_ST40STB1,
+	CPU_ST40RA,		/* Represents ST40RA (formerly ST40STB1) */
+	CPU_ST40GX1,		/* Represents ST40GX1 */
 	CPU_SH_NONE
 };
=20
Notably, for the P2 restriction, we can just set a bit in
cpu_data->dcache.flags for this, then test that bit and do necessary fixups
accordingly. Should be cleaner than checking the cpu subtype all the time.

Plus we can already use the cache flags for WT/WB, etc.

> Up to now I've taken zero interest in 2.5 for SH4, but thats probably
> going to have to change as we approch 2.6. However as Alex knows, I've a
> pile of ST40 related changes, which really should go into both 2.4 and 2.5
> trees. So ideally any changes like this I'd like to try and get into both
> at the same time, so that we don't end up with one lagging the other.
>=20
Currently the trees are a bit desynced, but I'll take care of this shortly.=
 At
the moment 2.4 has some new boards that 2.5 doesn't. And 2.5 has quite a few
new things that 2.4 doesn't, and probably should (such as the cache changes,
which we need for 7750R/7751R and friends).

> So may that should be my task for next week, try and get a 2.5 tree worki=
ng
> on an SH4...?
>=20
I can at least verify that it works pretty well on the 7750 and 7751R. You
shouldn't have too many problems once the frqcr changes are in place.

Re: [linuxsh-dev] [Trivial PATCH] Change CPU_ST40STB1 to CPU_ST40

[Stuart M. <stu...@st...>]

Folks

> I'm a bit curious as to what the differences between the ST40STB1 and the GX1
> are. Namely, are there any cache changes? (This would be nice to know before
> merging the 2.5 backport of the cache changes).

ST40STB1 (should now be called ST40RA - marketing love inflicting name
changes on engineers at the last minute) is a fairly generic part:

 - Standard SH4-102 core (16K D$, 8K I$, both direct mapped)
 - Standard SH4 peripheral set (2*SCIF, TMU, RTC, INTC, INTC2)
 - Clock Gen
 - PCI
 - memory interfaces (LMI: 64 bit SDRAM and DDR, EMI: 32 bit peripherals,
   Flash, SDRAM, MPX)
 - Co-processor interface with mailbox 
 - GPDMA (general purpose DMA)
 - PIO (programmable IO)

There is a datasheet available from www.stmcu.com - follow the Downloads link
and select ST40 then Datasheets.

The ST40GX1 is an application specific variant of this, and adds:

 - 4 plane graphics display (standard definition TV)
 - blitter
 - 2 digital video input ports
 - ST standard 'comms block': I2C, MAFE, Teletext, more serial ports...
 - USB 1.1

its designed to be used along side STi5514 for high end set-top-boxes:
have a look at the MediaRef and MediaX at
   www.futarque.com/products/developmentplatforms.html
The next version, the STi5528, has effectively glued the two devices together:
   www.ciaolab.com/default4a44.html?SUB=-1&BROCHURE=5528

From a cache point of view, these devices are identical to the original
7751. That is, they are still 16K and 8K direct mapped caches, but don't
have some of the restrictions on cache manipulation from code running in
cached memory that the 7750 does.

> Also, are there documented differences for what we can expect for PVR and PRR
> values for STB1 and GX1? (Well, we have the STB1 values, really just the GX1
> ones would be nice).

      PVR	CVR		PRR
STB1: 04800000	08240000	00000541
GX1:  04810000	08240000	00000551

> > It would help to know so I can set my CVS gingerness level for changing
> > ST40 related stuff. There are a lot of patches in the ST tree that
> > really could do with being ported into the linuxsh CVS. I'll be focusing
> > on the 2.4 tree as I currently don't have time to also track the 2.5
> > tree.
> > 
> I'd also be interested in knowing who else is using the st40 stuff, since
> there's quite a bit of 2.5 stuff that needs fixing and testing in order to work
> on the st40 properly!

Up to now I've taken zero interest in 2.5 for SH4, but thats probably
going to have to change as we approch 2.6. However as Alex knows, I've a
pile of ST40 related changes, which really should go into both 2.4 and 2.5
trees. So ideally any changes like this I'd like to try and get into both
at the same time, so that we don't end up with one lagging the other.

So may that should be my task for next week, try and get a 2.5 tree working
on an SH4...?

> > +if [ "$CONFIG_CPU_SUBTYPE_ST40" = "y" ]; then
> > +   bool 'PCI emulation of on-chip peripherals' CONFIG_SH_PCI_EMULATION
> > +   if [ "$CONFIG_SH_PCI_EMULATION" = "y" -a
> > "$CONFIG_CPU_SUBTYPE_ST40GX1" = "y" ]; then
> > +      bool '  USB OHCI Host Controller' CONFIG_SH_PCI_USB
> > +   fi
> > +fi
> >  
> Are there any other users of the CONFIG_SH_PCI_EMULATION? If not, why not
> just have a:
> 	
> 	dep_bool '  USB OHCI Host Controller' CONFIG_SH_PCI_USB $CONFIG_CPU_SUBTYPE_ST40GX1
> 
> and leave this option out entirely?

At the moment there isn't, but I wanted a generic way to add other
peripherals which need to be handled like this. 


Stuart

Re: [linuxsh-dev] [Trivial PATCH] Change CPU_ST40STB1 to CPU_ST40

[Alex B. <ker...@be...>]

On Thu, 2003-06-19 at 20:27, Paul Mundt wrote:
> On Thu, Jun 19, 2003 at 06:13:21PM +0100, Alex Bennee wrote:
> > The patch shouldn't break anything outside of the drop-in tree as the
> > original STB1 #define is still available (unless of course you select
> > the GX1 processor).
> > 
> I'm a bit curious as to what the differences between the ST40STB1 and the GX1
> are. Namely, are there any cache changes? (This would be nice to know before
> merging the 2.5 backport of the cache changes).

Pass. This is one for ST people to answer. I don't have the GX1

> Also, are there documented differences for what we can expect for PVR and PRR
> values for STB1 and GX1? (Well, we have the STB1 values, really just the GX1
> ones would be nice).

If they are they can be easily added later.

> <snip>
> 
> > +if [ "$CONFIG_CPU_SUBTYPE_ST40" = "y" ]; then
> > +   bool 'PCI emulation of on-chip peripherals' CONFIG_SH_PCI_EMULATION
> > +   if [ "$CONFIG_SH_PCI_EMULATION" = "y" -a
> > "$CONFIG_CPU_SUBTYPE_ST40GX1" = "y" ]; then
> > +      bool '  USB OHCI Host Controller' CONFIG_SH_PCI_USB
> > +   fi
> > +fi
> >  
> Are there any other users of the CONFIG_SH_PCI_EMULATION? If not, why not
> just have a:
> 	
> 	dep_bool '  USB OHCI Host Controller' CONFIG_SH_PCI_USB $CONFIG_CPU_SUBTYPE_ST40GX1
> 
> and leave this option out entirely?

Well not visable at the moment. But in ST's tree the ST40 superhighway
uses SH_PCI_EMULATION. But I didn't want to merge that in just yet. 

>  
> Watch it, this undoes the changes dwmw2 did yesterday to back out the
> GOBIOS/GODIRECT/GOANY stuff. See the "problems with PCI on SH7751 board"
> thread.

Oops. Ok I'll drop that bit.

> CONFIG_SH_PCIDMA_NONCOHERENT should also remain an option (not a forced one),
> since it especially helps with debugging even on boards that don't need it!
> 
> > diff -u -r1.1.1.1.2.4 time.c
> > --- arch/sh/kernel/time.c	10 Jun 2002 06:22:45 -0000	1.1.1.1.2.4
> > +++ arch/sh/kernel/time.c	19 Jun 2003 16:42:49 -0000
> > @@ -78,10 +78,10 @@
> >  #define CCN_PVR_CHIP_MASK  0xff
> >  #define CCN_PVR_CHIP_ST40STB1 0x4
> >  
> Nothing for the GX1?

Not at the mo. i suspect most GX1 related stuff will be for its
integrated peripherals.

I've just comitted these changes to the 2.4 tree.

> -- 
> Alex, homepage: http://www.bennee.com/~alex/
> 
> A little experience often upsets a lot of theory.

[linuxsh-dev] Re: Patch needed for CVS glibc on SH

[kaz K. <kk...@rr...>]

Daniel Jacobowitz <dr...@fa...> wrote:
> On Fri, Jun 20, 2003 at 10:43:33AM +0900, kaz Kojima wrote:
[snip]
>> I agree with this one. About pread64/pwrite64, did you see the argument
>> in the another list
>> <URL:http://www.geocrawler.com/mail/msg.php3?msg_id=10038494&list=3076>?
> 
> Sorry, too many lists - I'm not on linuxsh-dev.  I admit I only tested
> SH-3, though.  So I guess that patch would break SH-4?

I think so. The problem is that SH-3 and SH-4 use the different calling
conventions for long long argument when the only half 32-bit of it can
be passed via R7. SH-3 ABI does and SH-4 ABI not :-(

> Has Toshinobu-san's patch been applied (where)?

I've just seen
  http://cvs.sourceforge.net/cgi-bin/viewcvs.cgi/linuxsh/linux/
and found that it was applied to HEAD (2.5.71) and the linux-2_4-branch
(currently 2.4.21) at least.

Sorry for the inconvenience. It would be better to apply it against
2.4.13, for example, because it is still used widely.

Regards,
	kaz