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From: James S. <jsi...@us...> - 2001-10-11 21:59:10
|
Update of /cvsroot/linux-mips/linux/arch/mips/math-emu In directory usw-pr-cvs1:/tmp/cvs-serv6741 Added Files: sp_tint.c sp_tlong.c dp_tlong.c Log Message: A bunch of soft floating point fixes. --- NEW FILE: sp_tint.c --- /* IEEE754 floating point arithmetic * single precision */ /* * MIPS floating point support * Copyright (C) 1994-2000 Algorithmics Ltd. All rights reserved. * http://www.algor.co.uk * * ######################################################################## * * This program is free software; you can distribute it and/or modify it * under the terms of the GNU General Public License (Version 2) as * published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * for more details. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. * * ######################################################################## */ #include <linux/kernel.h> #include "ieee754sp.h" int ieee754sp_tint(ieee754sp x) { COMPXSP; CLEARCX; EXPLODEXSP; FLUSHXSP; switch (xc) { case IEEE754_CLASS_SNAN: case IEEE754_CLASS_QNAN: case IEEE754_CLASS_INF: SETCX(IEEE754_INVALID_OPERATION); return ieee754si_xcpt(ieee754si_indef(), "sp_tint", x); case IEEE754_CLASS_ZERO: return 0; case IEEE754_CLASS_DNORM: case IEEE754_CLASS_NORM: break; } if (xe >= 31) { /* Set invalid. We will only use overflow for floating point overflow */ SETCX(IEEE754_INVALID_OPERATION); return ieee754si_xcpt(ieee754si_indef(), "sp_tint", x); } /* oh gawd */ if (xe > SP_MBITS) { xm <<= xe - SP_MBITS; } else { unsigned long residue; int round; int sticky; int odd; if (xe < -1) { residue = xm; round = 0; sticky = residue != 0; xm = 0; } else { residue = xm << (32 - SP_MBITS + xe); round = (residue >> 31) != 0; sticky = (residue << 1) != 0; xm >>= SP_MBITS - xe; } odd = (xm & 0x1) != 0x0; switch (ieee754_csr.rm) { case IEEE754_RN: if (round && (sticky || odd)) xm++; break; case IEEE754_RZ: break; case IEEE754_RU: /* toward +Infinity */ if ((round || sticky) && !xs) xm++; break; case IEEE754_RD: /* toward -Infinity */ if ((round || sticky) && xs) xm++; break; } if ((xm >> 31) != 0) { /* This can happen after rounding */ SETCX(IEEE754_INVALID_OPERATION); return ieee754si_xcpt(ieee754si_indef(), "sp_tint", x); } if (round || sticky) SETCX(IEEE754_INEXACT); } if (xs) return -xm; else return xm; } unsigned int ieee754sp_tuns(ieee754sp x) { ieee754sp hb = ieee754sp_1e31(); /* what if x < 0 ?? */ if (ieee754sp_lt(x, hb)) return (unsigned) ieee754sp_tint(x); return (unsigned) ieee754sp_tint(ieee754sp_sub(x, hb)) | ((unsigned) 1 << 31); } --- NEW FILE: sp_tlong.c --- /* IEEE754 floating point arithmetic * single precision */ /* * MIPS floating point support * Copyright (C) 1994-2000 Algorithmics Ltd. All rights reserved. * http://www.algor.co.uk * * ######################################################################## * * This program is free software; you can distribute it and/or modify it * under the terms of the GNU General Public License (Version 2) as * published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * for more details. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. * * ######################################################################## */ #include "ieee754sp.h" long long ieee754sp_tlong(ieee754sp x) { COMPXDP; /* <-- need 64-bit mantissa tmp */ CLEARCX; EXPLODEXSP; FLUSHXSP; switch (xc) { case IEEE754_CLASS_SNAN: case IEEE754_CLASS_QNAN: case IEEE754_CLASS_INF: SETCX(IEEE754_INVALID_OPERATION); return ieee754di_xcpt(ieee754di_indef(), "sp_tlong", x); case IEEE754_CLASS_ZERO: return 0; case IEEE754_CLASS_DNORM: case IEEE754_CLASS_NORM: break; } if (xe >= 63) { /* Set invalid. We will only use overflow for floating point overflow */ SETCX(IEEE754_INVALID_OPERATION); return ieee754di_xcpt(ieee754di_indef(), "sp_tlong", x); } /* oh gawd */ if (xe > SP_MBITS) { xm <<= xe - SP_MBITS; } else if (xe < SP_MBITS) { unsigned long residue; int round; int sticky; int odd; if (xe < -1) { residue = xm; round = 0; sticky = residue != 0; xm = 0; } else { residue = xm << (32 - SP_MBITS + xe); round = (residue >> 31) != 0; sticky = (residue << 1) != 0; xm >>= SP_MBITS - xe; } odd = (xm & 0x1) != 0x0; switch (ieee754_csr.rm) { case IEEE754_RN: if (round && (sticky || odd)) xm++; break; case IEEE754_RZ: break; case IEEE754_RU: /* toward +Infinity */ if ((round || sticky) && !xs) xm++; break; case IEEE754_RD: /* toward -Infinity */ if ((round || sticky) && xs) xm++; break; } if ((xm >> 63) != 0) { /* This can happen after rounding */ SETCX(IEEE754_INVALID_OPERATION); return ieee754si_xcpt(ieee754di_indef(), "sp_tlong", x); } if (round || sticky) SETCX(IEEE754_INEXACT); } if (xs) return -xm; else return xm; } unsigned long long ieee754sp_tulong(ieee754sp x) { ieee754sp hb = ieee754sp_1e63(); /* what if x < 0 ?? */ if (ieee754sp_lt(x, hb)) return (unsigned long long) ieee754sp_tlong(x); return (unsigned long long) ieee754sp_tlong(ieee754sp_sub(x, hb)) | (1ULL << 63); } --- NEW FILE: dp_tlong.c --- /* IEEE754 floating point arithmetic * double precision: common utilities */ /* * MIPS floating point support * Copyright (C) 1994-2000 Algorithmics Ltd. All rights reserved. * http://www.algor.co.uk * * ######################################################################## * * This program is free software; you can distribute it and/or modify it * under the terms of the GNU General Public License (Version 2) as * published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * for more details. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. * * ######################################################################## */ #include "ieee754dp.h" long long ieee754dp_tlong(ieee754dp x) { COMPXDP; CLEARCX; EXPLODEXDP; FLUSHXDP; switch (xc) { case IEEE754_CLASS_SNAN: case IEEE754_CLASS_QNAN: case IEEE754_CLASS_INF: SETCX(IEEE754_INVALID_OPERATION); return ieee754di_xcpt(ieee754di_indef(), "dp_tlong", x); case IEEE754_CLASS_ZERO: return 0; case IEEE754_CLASS_DNORM: case IEEE754_CLASS_NORM: break; } if (xe >= 63) { /* Set invalid. We will only use overflow for floating point overflow */ SETCX(IEEE754_INVALID_OPERATION); return ieee754di_xcpt(ieee754di_indef(), "dp_tlong", x); } /* oh gawd */ if (xe > DP_MBITS) { xm <<= xe - DP_MBITS; } else if (xe < DP_MBITS) { unsigned long long residue; int round; int sticky; int odd; if (xe < -1) { residue = xm; round = 0; sticky = residue != 0; xm = 0; } else { residue = xm << (64 - DP_MBITS + xe); round = (residue >> 63) != 0; sticky = (residue << 1) != 0; xm >>= DP_MBITS - xe; } odd = (xm & 0x1) != 0x0; switch (ieee754_csr.rm) { case IEEE754_RN: if (round && (sticky || odd)) xm++; break; case IEEE754_RZ: break; case IEEE754_RU: /* toward +Infinity */ if ((round || sticky) && !xs) xm++; break; case IEEE754_RD: /* toward -Infinity */ if ((round || sticky) && xs) xm++; break; } if ((xm >> 63) != 0) { /* This can happen after rounding */ SETCX(IEEE754_INVALID_OPERATION); return ieee754si_xcpt(ieee754di_indef(), "dp_tlong", x); } if (round || sticky) SETCX(IEEE754_INEXACT); } if (xs) return -xm; else return xm; } unsigned long long ieee754dp_tulong(ieee754dp x) { ieee754dp hb = ieee754dp_1e63(); /* what if x < 0 ?? */ if (ieee754dp_lt(x, hb)) return (unsigned long long) ieee754dp_tlong(x); return (unsigned long long) ieee754dp_tlong(ieee754dp_sub(x, hb)) | (1ULL << 63); } |
From: James S. <jsi...@us...> - 2001-10-11 21:57:58
|
Update of /cvsroot/linux-mips/linux/arch/mips/math-emu In directory usw-pr-cvs1:/tmp/cvs-serv6462 Modified Files: ieee754sp.c sp_fdp.c Log Message: A bunch of soft floating point fixes. Index: ieee754sp.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/math-emu/ieee754sp.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- ieee754sp.c 2001/10/04 16:22:33 1.1 +++ ieee754sp.c 2001/10/11 21:57:54 1.2 @@ -204,6 +204,24 @@ /* we underflow (tiny/zero) */ assert(xe == SP_EMIN); SETCX(IEEE754_UNDERFLOW); + if (!xm) { + switch(ieee754_csr.rm) { + case IEEE754_RN: + return ieee754sp_zero(sn); + case IEEE754_RZ: + return ieee754sp_zero(sn); + case IEEE754_RU: /* toward +Infinity */ + if(sn == 0) + return ieee754sp_mind(0); + else + return ieee754sp_zero(1); + case IEEE754_RD: /* toward -Infinity */ + if(sn == 0) + return ieee754sp_zero(0); + else + return ieee754sp_mind(1); + } + } return buildsp(sn, SP_EMIN - 1 + SP_EBIAS, xm); } else { assert((xm >> (SP_MBITS + 1)) == 0); /* no execess */ Index: sp_fdp.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/math-emu/sp_fdp.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- sp_fdp.c 2001/10/04 16:22:33 1.1 +++ sp_fdp.c 2001/10/11 21:57:54 1.2 @@ -30,6 +30,7 @@ ieee754sp ieee754sp_fdp(ieee754dp x) { COMPXDP; + ieee754sp nan; EXPLODEXDP; @@ -42,12 +43,11 @@ SETCX(IEEE754_INVALID_OPERATION); return ieee754sp_nanxcpt(ieee754sp_indef(), "fdp"); case IEEE754_CLASS_QNAN: - return ieee754sp_nanxcpt(buildsp(xs, - SP_EMAX + 1 + SP_EBIAS, - (unsigned long) - (xm >> - (DP_MBITS - SP_MBITS))), - "fdp", x); + nan = buildsp(xs, SP_EMAX + 1 + SP_EBIAS, (unsigned long) + (xm >> (DP_MBITS - SP_MBITS))); + if (!ieee754sp_isnan(nan)) + nan = ieee754sp_indef(); + return ieee754sp_nanxcpt(nan, "fdp", x); case IEEE754_CLASS_INF: return ieee754sp_inf(xs); case IEEE754_CLASS_ZERO: |
From: James S. <jsi...@us...> - 2001-10-11 21:19:22
|
Update of /cvsroot/linux-mips/linux/arch/mips/dec In directory usw-pr-cvs1:/tmp/cvs-serv27042 Added Files: Makefile Log Message: Using standard serial driver. --- NEW FILE: Makefile --- # # Makefile for the DECstation family specific parts of the kernel # # Note! Dependencies are done automagically by 'make dep', which also # removes any old dependencies. DON'T put your own dependencies here # unless it's something special (ie not a .c file). # .S.s: $(CPP) $(AFLAGS) $< -o $@ .S.o: $(CC) $(AFLAGS) -c $< -o $@ O_TARGET := dec.o all: dec.o export-objs := wbflush.o obj-y := int-handler.o setup.o irq.o time.o reset.o rtc-dec.o wbflush.o obj-$(CONFIG_PROM_CONSOLE) += promcon.o int-handler.o: int-handler.S include $(TOPDIR)/Rules.make |
From: James S. <jsi...@us...> - 2001-10-11 20:45:29
|
Update of /cvsroot/linux-mips/linux/include/asm-mips/ddb5xxx In directory usw-pr-cvs1:/tmp/cvs-serv14020/include/asm-mips/ddb5xxx Modified Files: ddb5xxx.h Log Message: Update debug crapola. Index: ddb5xxx.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/ddb5xxx/ddb5xxx.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- ddb5xxx.h 2001/10/07 05:40:22 1.2 +++ ddb5xxx.h 2001/10/11 20:45:26 1.3 @@ -21,8 +21,6 @@ #include <linux/config.h> #include <linux/types.h> -#include <asm/ddb5xxx/debug.h> - /* * This file is based on the following documentation: * |
From: James S. <jsi...@us...> - 2001-10-11 20:45:29
|
Update of /cvsroot/linux-mips/linux/drivers/sound In directory usw-pr-cvs1:/tmp/cvs-serv14020/drivers/sound Modified Files: nec_vrc5477.c Log Message: Update debug crapola. Index: nec_vrc5477.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/sound/nec_vrc5477.c,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- nec_vrc5477.c 2001/08/20 16:34:26 1.2 +++ nec_vrc5477.c 2001/10/11 20:45:26 1.3 @@ -83,17 +83,25 @@ #include <asm/uaccess.h> #include <asm/hardirq.h> -#include <asm/ddb5xxx/debug.h> +/* -------------------debug macros -------------------------------------- */ +/* #undef VRC5477_AC97_DEBUG */ +#define VRC5477_AC97_DEBUG #undef VRC5477_AC97_VERBOSE_DEBUG +/* #define VRC5477_AC97_VERBOSE_DEBUG */ -/* one must turn on CONFIG_LL_DEBUG before VERBOSE_DEBUG is turned */ #if defined(VRC5477_AC97_VERBOSE_DEBUG) -#if !defined(CONFIG_LL_DEBUG) -#error "You must turn CONFIG_LL_DEBUG" -#endif +#define VRC5477_AC97_DEBUG #endif +#if defined(VRC5477_AC97_DEBUG) +#include <linux/kernel.h> +#define ASSERT(x) if (!(x)) { \ + panic("assertion failed at %s:%d: %s\n", __FILE__, __LINE__, #x); } +#else +#define ASSERT(x) +#endif /* VRC5477_AC97_DEBUG */ + #if defined(VRC5477_AC97_VERBOSE_DEBUG) static u16 inTicket=0; /* check sync between intr & write */ static u16 outTicket=0; @@ -179,11 +187,11 @@ unsigned long io; unsigned int irq; -#ifdef CONFIG_LL_DEBUG +#ifdef VRC5477_AC97_DEBUG /* debug /proc entry */ struct proc_dir_entry *ps; struct proc_dir_entry *ac97_ps; -#endif /* CONFIG_LL_DEBUG */ +#endif /* VRC5477_AC97_DEBUG */ struct ac97_codec codec; @@ -275,7 +283,7 @@ (VRC5477_CODEC_RD_RRDYA | VRC5477_CODEC_RD_RRDYD) ) { /* we get either addr or data, or both */ if (result & VRC5477_CODEC_RD_RRDYA) { - MIPS_ASSERT(addr == ((result >> 16) & 0x7f) ); + ASSERT(addr == ((result >> 16) & 0x7f) ); } if (result & VRC5477_CODEC_RD_RRDYD) { break; @@ -408,7 +416,7 @@ } /* we should have some data to do the DMA trasnfer */ - MIPS_ASSERT(db->count >= db->fragSize); + ASSERT(db->count >= db->fragSize); /* clear pending fales interrupts */ outl(VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END, @@ -442,12 +450,12 @@ outl (temp, s->io + VRC5477_CTRL); /* it is time to setup next dma transfer */ - MIPS_ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP); - MIPS_ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP); + ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP); + ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP); temp = db->nextOut + db->fragSize; if (temp >= db->fragTotalSize) { - MIPS_ASSERT(temp == db->fragTotalSize); + ASSERT(temp == db->fragTotalSize); temp = 0; } @@ -463,7 +471,7 @@ #if defined(VRC5477_AC97_VERBOSE_DEBUG) outTicket = *(u16*)(db->lbuf+db->nextOut); if (db->count > db->fragSize) { - MIPS_ASSERT((u16)(outTicket+1) == *(u16*)(db->lbuf+temp)); + ASSERT((u16)(outTicket+1) == *(u16*)(db->lbuf+temp)); } #endif @@ -521,7 +529,7 @@ } /* we should at least have some free space in the buffer */ - MIPS_ASSERT(db->count < db->fragTotalSize - db->fragSize * 2); + ASSERT(db->count < db->fragTotalSize - db->fragSize * 2); /* clear pending ones */ outl(VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END, @@ -553,7 +561,7 @@ /* it is time to setup next dma transfer */ temp = db->nextIn + db->fragSize; if (temp >= db->fragTotalSize) { - MIPS_ASSERT(temp == db->fragTotalSize); + ASSERT(temp == db->fragTotalSize); temp = 0; } outl(db->lbufDma + temp, s->io + VRC5477_ADC1_BADDR); @@ -573,7 +581,7 @@ struct dmabuf *db) { if (db->lbuf) { - MIPS_ASSERT(db->rbuf); + ASSERT(db->rbuf); pci_free_consistent(s->dev, PAGE_SIZE << db->bufOrder, db->lbuf, db->lbufDma); pci_free_consistent(s->dev, PAGE_SIZE << db->bufOrder, @@ -592,7 +600,7 @@ unsigned bufsize; if (!db->lbuf) { - MIPS_ASSERT(!db->rbuf); + ASSERT(!db->rbuf); db->ready = 0; for (order = DMABUF_DEFAULTORDER; @@ -606,7 +614,7 @@ &db->rbufDma); if (db->lbuf && db->rbuf) break; if (db->lbuf) { - MIPS_ASSERT(!db->rbuf); + ASSERT(!db->rbuf); pci_free_consistent(s->dev, PAGE_SIZE << order, db->lbuf, @@ -614,7 +622,7 @@ } } if (!db->lbuf) { - MIPS_ASSERT(!db->rbuf); + ASSERT(!db->rbuf); return -ENOMEM; } @@ -677,7 +685,7 @@ /* set the base addr for next DMA transfer */ temp = adc->nextIn + 2*adc->fragSize; if (temp >= adc->fragTotalSize) { - MIPS_ASSERT( (temp == adc->fragTotalSize) || + ASSERT( (temp == adc->fragTotalSize) || (temp == adc->fragTotalSize + adc->fragSize) ); temp -= adc->fragTotalSize; } @@ -687,7 +695,7 @@ /* adjust nextIn */ adc->nextIn += adc->fragSize; if (adc->nextIn >= adc->fragTotalSize) { - MIPS_ASSERT(adc->nextIn == adc->fragTotalSize); + ASSERT(adc->nextIn == adc->fragTotalSize); adc->nextIn = 0; } @@ -706,13 +714,13 @@ unsigned temp; /* next DMA transfer should already started */ - MIPS_ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP); - MIPS_ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP); + ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP); + ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP); /* let us set for next next DMA transfer */ temp = dac->nextOut + dac->fragSize*2; if (temp >= dac->fragTotalSize) { - MIPS_ASSERT( (temp == dac->fragTotalSize) || + ASSERT( (temp == dac->fragTotalSize) || (temp == dac->fragTotalSize + dac->fragSize) ); temp -= dac->fragTotalSize; } @@ -728,22 +736,22 @@ printk("assert fail: - %d vs %d\n", *(u16*)(dac->lbuf + dac->nextOut), outTicket); - MIPS_ASSERT(1 == 0); + ASSERT(1 == 0); } #endif /* adjust nextOut pointer */ dac->nextOut += dac->fragSize; if (dac->nextOut >= dac->fragTotalSize) { - MIPS_ASSERT(dac->nextOut == dac->fragTotalSize); + ASSERT(dac->nextOut == dac->fragTotalSize); dac->nextOut = 0; } /* adjust count */ dac->count -= dac->fragSize; if (dac->count <=0 ) { - MIPS_ASSERT(dac->count == 0); - MIPS_ASSERT(dac->nextIn == dac->nextOut); + ASSERT(dac->count == 0); + ASSERT(dac->nextIn == dac->nextOut); /* buffer under run */ stop_dac(s); } @@ -751,12 +759,12 @@ #if defined(VRC5477_AC97_VERBOSE_DEBUG) if (dac->count) { outTicket ++; - MIPS_ASSERT(*(u16*)(dac->lbuf + dac->nextOut) == outTicket); + ASSERT(*(u16*)(dac->lbuf + dac->nextOut) == outTicket); } #endif /* we cannot have both under run and someone is waiting on us */ - MIPS_ASSERT(! (waitqueue_active(&dac->wait) && (dac->count <= 0)) ); + ASSERT(! (waitqueue_active(&dac->wait) && (dac->count <= 0)) ); /* wake up anybody listening */ if (waitqueue_active(&dac->wait)) @@ -911,7 +919,7 @@ copyCount -= count; bufStart += count; - MIPS_ASSERT(bufStart <= db->fragTotalSize); + ASSERT(bufStart <= db->fragTotalSize); buffer += count *2; } return 0; @@ -943,12 +951,12 @@ } if (copyCount + db->nextOut > db->fragTotalSize) { copyCount = db->fragTotalSize - db->nextOut; - MIPS_ASSERT((copyCount % db->fragSize) == 0); + ASSERT((copyCount % db->fragSize) == 0); } copyFragCount = (copyCount-1) >> db->fragShift; copyFragCount = (copyFragCount+1) << db->fragShift; - MIPS_ASSERT(copyFragCount >= copyCount); + ASSERT(copyFragCount >= copyCount); /* we copy differently based on adc channels */ if (s->adcChannels == 1) { @@ -971,12 +979,12 @@ db->nextOut += copyFragCount; if (db->nextOut >= db->fragTotalSize) { - MIPS_ASSERT(db->nextOut == db->fragTotalSize); + ASSERT(db->nextOut == db->fragTotalSize); db->nextOut = 0; } - MIPS_ASSERT((copyFragCount % db->fragSize) == 0); - MIPS_ASSERT( (count == 0) || (copyCount == copyFragCount)); + ASSERT((copyFragCount % db->fragSize) == 0); + ASSERT( (count == 0) || (copyCount == copyFragCount)); } spin_lock_irqsave(&s->lock, flags); @@ -1005,7 +1013,7 @@ if (!access_ok(VERIFY_WRITE, buffer, count)) return -EFAULT; - MIPS_ASSERT(db->ready); + ASSERT(db->ready); while (count > 0) { // wait for samples in capture buffer @@ -1030,7 +1038,7 @@ } } while (avail <= 0); - MIPS_ASSERT( (avail % db->fragSize) == 0); + ASSERT( (avail % db->fragSize) == 0); copyCount = copy_adc_to_user(s, buffer, count, avail); if (copyCount <=0 ) { if (!ret) ret = -EFAULT; @@ -1053,7 +1061,7 @@ struct dmabuf *db = &s->dma_dac; int bufStart = db->nextIn; - MIPS_ASSERT(db->ready); + ASSERT(db->ready); for (; copyCount > 0; ) { int i; @@ -1071,7 +1079,7 @@ copyCount -= count; bufStart += count; - MIPS_ASSERT(bufStart <= db->fragTotalSize); + ASSERT(bufStart <= db->fragTotalSize); buffer += count *2; } return 0; @@ -1107,13 +1115,13 @@ } if (copyCount + db->nextIn > db->fragTotalSize) { copyCount = db->fragTotalSize - db->nextIn; - MIPS_ASSERT((copyCount % db->fragSize) == 0); - MIPS_ASSERT(copyCount > 0); + ASSERT((copyCount % db->fragSize) == 0); + ASSERT(copyCount > 0); } copyFragCount = (copyCount-1) >> db->fragShift; copyFragCount = (copyFragCount+1) << db->fragShift; - MIPS_ASSERT(copyFragCount >= copyCount); + ASSERT(copyFragCount >= copyCount); /* we copy differently based on the number channels */ if (s->dacChannels == 1) { @@ -1153,12 +1161,12 @@ db->nextIn += copyFragCount; if (db->nextIn >= db->fragTotalSize) { - MIPS_ASSERT(db->nextIn == db->fragTotalSize); + ASSERT(db->nextIn == db->fragTotalSize); db->nextIn = 0; } - MIPS_ASSERT((copyFragCount % db->fragSize) == 0); - MIPS_ASSERT( (count == 0) || (copyCount == copyFragCount)); + ASSERT((copyFragCount % db->fragSize) == 0); + ASSERT( (count == 0) || (copyCount == copyFragCount)); } spin_lock_irqsave(&s->lock, flags); @@ -1168,7 +1176,7 @@ } /* nextIn should not be equal to nextOut unless we are full */ - MIPS_ASSERT( ( (db->count == db->fragTotalSize) && + ASSERT( ( (db->count == db->fragTotalSize) && (db->nextIn == db->nextOut) ) || ( (db->count < db->fragTotalSize) && (db->nextIn != db->nextOut) ) ); @@ -1216,7 +1224,7 @@ } } while (avail <= 0); - MIPS_ASSERT( (avail % db->fragSize) == 0); + ASSERT( (avail % db->fragSize) == 0); copyCount = copy_dac_from_user(s, buffer, count, avail); if (copyCount < 0) { if (!ret) ret = -EFAULT; @@ -1257,7 +1265,7 @@ return mask; } -#ifdef CONFIG_LL_DEBUG +#ifdef VRC5477_AC97_DEBUG static struct ioctl_str_t { unsigned int cmd; const char* str; @@ -1308,7 +1316,7 @@ int count; int val, ret; -#ifdef CONFIG_LL_DEBUG +#ifdef VRC5477_AC97_DEBUG for (count=0; count<sizeof(ioctl_str)/sizeof(ioctl_str[0]); count++) { if (ioctl_str[count].cmd == cmd) break; @@ -1639,7 +1647,7 @@ * CODEC chipstate */ -#ifdef CONFIG_LL_DEBUG +#ifdef VRC5477_AC97_DEBUG struct { const char *regname; @@ -1763,7 +1771,7 @@ return len; } -#endif /* CONFIG_LL_DEBUG */ +#endif /* VRC5477_AC97_DEBUG */ /* --------------------------------------------------------------------- */ @@ -1800,7 +1808,7 @@ udelay(100); /* workaround hardware bug */ // dump_memory(0xbb000000, 48); while ( ((result=myinl(VRC5477_CODEC_RD)) & 0xc0000000) != 0xc0000000); - MIPS_ASSERT(addr == ((result >> 16) & 0x7f) ); + ASSERT(addr == ((result >> 16) & 0x7f) ); return result & 0xffff; } @@ -1828,7 +1836,7 @@ while (myinl(VRC5477_CODEC_WR) & 0x80000000); for (i=0; i< 0x40; i+=4) { - MIPS_ASSERT(inl(s->io+i) == myinl(i)); + ASSERT(inl(s->io+i) == myinl(i)); } printk("codec registers : "); @@ -1856,8 +1864,6 @@ struct vrc5477_ac97_state *s; char proc_str[80]; - MIPS_DEBUG(printk("vrc5477_ac97_probe() invoked\n")); - if (pcidev->irq == 0) return -1; @@ -1909,37 +1915,27 @@ register_sound_mixer(&vrc5477_ac97_mixer_fops, -1)) < 0) goto err_dev2; -#ifdef CONFIG_LL_DEBUG +#ifdef VRC5477_AC97_DEBUG /* intialize the debug proc device */ s->ps = create_proc_read_entry(VRC5477_AC97_MODULE_NAME, 0, NULL, proc_vrc5477_ac97_dump, NULL); -#endif /* CONFIG_LL_DEBUG */ +#endif /* VRC5477_AC97_DEBUG */ /* enable pci io and bus mastering */ if (pci_enable_device(pcidev)) goto err_dev3; pci_set_master(pcidev); -/* -jsun_scan_pci_bus(); -vrc5477_show_pci_regs(); -vrc5477_show_pdar_regs(); -*/ - /* cold reset the AC97 */ outl(VRC5477_ACLINK_CTRL_RST_ON | VRC5477_ACLINK_CTRL_RST_TIME, s->io + VRC5477_ACLINK_CTRL); while (inl(s->io + VRC5477_ACLINK_CTRL) & VRC5477_ACLINK_CTRL_RST_ON); -/* -jsun_ac97_test(s); -*/ - /* codec init */ if (!ac97_probe_codec(&s->codec)) goto err_dev3; -#ifdef CONFIG_LL_DEBUG +#ifdef VRC5477_AC97_DEBUG sprintf(proc_str, "driver/%s/%d/ac97", VRC5477_AC97_MODULE_NAME, s->codec.id); s->ac97_ps = create_proc_read_entry (proc_str, 0, NULL, @@ -1994,10 +1990,12 @@ if (!s) return; list_del(&s->devs); -#ifdef CONFIG_LL_DEBUG + +#ifdef VRC5477_AC97_DEBUG if (s->ps) remove_proc_entry(VRC5477_AC97_MODULE_NAME, NULL); -#endif /* CONFIG_LL_DEBUG */ +#endif /* VRC5477_AC97_DEBUG */ + synchronize_irq(); free_irq(s->irq, s); release_region(s->io, pci_resource_len(dev,0)); |
From: James S. <jsi...@us...> - 2001-10-11 20:45:29
|
Update of /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5477 In directory usw-pr-cvs1:/tmp/cvs-serv14020/arch/mips/ddb5xxx/ddb5477 Modified Files: Makefile irq.c irq_5477.c pci.c pci_ops.c setup.c Log Message: Update debug crapola. Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5477/Makefile,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- Makefile 2001/10/05 21:24:19 1.2 +++ Makefile 2001/10/11 20:45:26 1.3 @@ -15,7 +15,7 @@ obj-y += int-handler.o irq.o irq_5477.o setup.o pci.o pci_ops.o -obj-$(CONFIG_LL_DEBUG) += debug.o +obj-$(CONFIG_DEBUG) += debug.o obj-$(CONFIG_REMOTE_DEBUG) += kgdb_io.o include $(TOPDIR)/Rules.make Index: irq.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5477/irq.c,v retrieving revision 1.6 retrieving revision 1.7 diff -u -d -r1.6 -r1.7 --- irq.c 2001/09/07 18:43:41 1.6 +++ irq.c 2001/10/11 20:45:26 1.7 @@ -18,10 +18,10 @@ #include <asm/system.h> #include <asm/mipsregs.h> +#include <asm/debug.h> + #include <asm/ddb5xxx/ddb5xxx.h> -/* [jsun] sooner or later we should move this debug stuff to MIPS common */ -#include <asm/ddb5xxx/debug.h> /* * IRQ mapping @@ -76,7 +76,7 @@ void ddb5477_irq_setup(void) { - MIPS_DEBUG(printk("ddb5477_irq_setup invoked.\n")); + db_run(printk("ddb5477_irq_setup invoked.\n")); /* by default, we disable all interrupts and route all vrc5477 * interrupts to pin 0 (irq 2) */ @@ -141,13 +141,13 @@ u32 bitmask; u32 i; - MIPS_ASSERT(ddb_in32(DDB_INT2STAT) == 0); - MIPS_ASSERT(ddb_in32(DDB_INT3STAT) == 0); - MIPS_ASSERT(ddb_in32(DDB_INT4STAT) == 0); - MIPS_ASSERT(ddb_in32(DDB_NMISTAT) == 0); + db_assert(ddb_in32(DDB_INT2STAT) == 0); + db_assert(ddb_in32(DDB_INT3STAT) == 0); + db_assert(ddb_in32(DDB_INT4STAT) == 0); + db_assert(ddb_in32(DDB_NMISTAT) == 0); if (ddb_in32(DDB_INT1STAT) != 0) { -#if defined(CONFIG_LL_DEBUG) +#if defined(CONFIG_DEBUG) vrc5477_show_int_regs(); #endif panic("error interrupt has happened.\n"); Index: irq_5477.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5477/irq_5477.c,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -u -d -r1.1.1.1 -r1.2 --- irq_5477.c 2001/06/22 02:29:31 1.1.1.1 +++ irq_5477.c 2001/10/11 20:45:26 1.2 @@ -23,10 +23,9 @@ #include <linux/types.h> #include <linux/ptrace.h> -#include <asm/ddb5xxx/ddb5xxx.h> +#include <asm/debug.h> -/* [jsun] sooner or later we should move this debug stuff to MIPS common */ -#include <asm/ddb5xxx/debug.h> +#include <asm/ddb5xxx/ddb5xxx.h> /* number of total irqs supported by Vrc5477 */ #define NUM_5477_IRQ 32 @@ -37,9 +36,9 @@ static void vrc5477_irq_enable(unsigned int irq) { - MIPS_ASSERT(vrc5477_irq_base != -1); - MIPS_ASSERT(irq >= vrc5477_irq_base); - MIPS_ASSERT(irq < vrc5477_irq_base+ NUM_5477_IRQ); + db_assert(vrc5477_irq_base != -1); + db_assert(irq >= vrc5477_irq_base); + db_assert(irq < vrc5477_irq_base+ NUM_5477_IRQ); ll_vrc5477_irq_enable(irq - vrc5477_irq_base); } @@ -47,9 +46,9 @@ static void vrc5477_irq_disable(unsigned int irq) { - MIPS_ASSERT(vrc5477_irq_base != -1); - MIPS_ASSERT(irq >= vrc5477_irq_base); - MIPS_ASSERT(irq < vrc5477_irq_base + NUM_5477_IRQ); + db_assert(vrc5477_irq_base != -1); + db_assert(irq >= vrc5477_irq_base); + db_assert(irq < vrc5477_irq_base + NUM_5477_IRQ); ll_vrc5477_irq_disable(irq - vrc5477_irq_base); } @@ -65,9 +64,9 @@ static void vrc5477_irq_ack(unsigned int irq) { - MIPS_ASSERT(vrc5477_irq_base != -1); - MIPS_ASSERT(irq >= vrc5477_irq_base); - MIPS_ASSERT(irq < vrc5477_irq_base+ NUM_5477_IRQ); + db_assert(vrc5477_irq_base != -1); + db_assert(irq >= vrc5477_irq_base); + db_assert(irq < vrc5477_irq_base+ NUM_5477_IRQ); /* clear the interrupt bit */ /* some irqs require the driver to clear the sources */ @@ -82,9 +81,9 @@ static void vrc5477_irq_end(unsigned int irq) { - MIPS_ASSERT(vrc5477_irq_base != -1); - MIPS_ASSERT(irq >= vrc5477_irq_base); - MIPS_ASSERT(irq < vrc5477_irq_base + NUM_5477_IRQ); + db_assert(vrc5477_irq_base != -1); + db_assert(irq >= vrc5477_irq_base); + db_assert(irq < vrc5477_irq_base + NUM_5477_IRQ); ll_vrc5477_irq_enable( irq - vrc5477_irq_base); } @@ -119,8 +118,8 @@ int vrc5477_irq_to_irq(int irq) { - MIPS_ASSERT(irq >= 0); - MIPS_ASSERT(irq < NUM_5477_IRQ); + db_assert(irq >= 0); + db_assert(irq < NUM_5477_IRQ); return irq + vrc5477_irq_base; } @@ -131,10 +130,10 @@ u32 reg_bitmask; u32 reg_index; - MIPS_ASSERT(vrc5477_irq >= 0); - MIPS_ASSERT(vrc5477_irq < NUM_5477_IRQ); - MIPS_ASSERT(ip >= 0); - MIPS_ASSERT((ip < 5) || (ip == 6)); + db_assert(vrc5477_irq >= 0); + db_assert(vrc5477_irq < NUM_5477_IRQ); + db_assert(ip >= 0); + db_assert((ip < 5) || (ip == 6)); reg_index = DDB_INTCTRL0 + vrc5477_irq/8*4; reg_value = ddb_in32(reg_index); @@ -150,13 +149,13 @@ u32 reg_bitmask; u32 reg_index; - MIPS_ASSERT(vrc5477_irq >= 0); - MIPS_ASSERT(vrc5477_irq < NUM_5477_IRQ); + db_assert(vrc5477_irq >= 0); + db_assert(vrc5477_irq < NUM_5477_IRQ); reg_index = DDB_INTCTRL0 + vrc5477_irq/8*4; reg_value = ddb_in32(reg_index); reg_bitmask = 8 << (vrc5477_irq % 8 * 4); - MIPS_ASSERT((reg_value & reg_bitmask) == 0); + db_assert((reg_value & reg_bitmask) == 0); ddb_out32(reg_index, reg_value | reg_bitmask); } @@ -166,14 +165,14 @@ u32 reg_bitmask; u32 reg_index; - MIPS_ASSERT(vrc5477_irq >= 0); - MIPS_ASSERT(vrc5477_irq < NUM_5477_IRQ); + db_assert(vrc5477_irq >= 0); + db_assert(vrc5477_irq < NUM_5477_IRQ); reg_index = DDB_INTCTRL0 + vrc5477_irq/8*4; reg_value = ddb_in32(reg_index); reg_bitmask = 8 << (vrc5477_irq % 8 * 4); /* we assert that the interrupt is enabled (perhaps over-zealous) */ - MIPS_ASSERT( (reg_value & reg_bitmask) != 0); + db_assert( (reg_value & reg_bitmask) != 0); ddb_out32(reg_index, reg_value & ~reg_bitmask); } Index: pci.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5477/pci.c,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- pci.c 2001/09/26 17:12:37 1.3 +++ pci.c 2001/10/11 20:45:26 1.4 @@ -1,12 +1,25 @@ +/* + * PCI code for DDB5477. + * + * Copyright (C) 2001 MontaVista Software Inc. + * Author: Jun Sun, js...@mv... or js...@ju... + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + #include <linux/kernel.h> #include <linux/init.h> #include <linux/types.h> #include <linux/pci.h> #include <asm/pci_channel.h> +#include <asm/debug.h> #include <asm/ddb5xxx/ddb5xxx.h> -#include <asm/ddb5xxx/debug.h> static struct resource extpci_io_resource = { "ext pci IO space", @@ -104,8 +117,8 @@ pci_for_each_dev(dev) { slot_num = PCI_SLOT(dev->devfn); - MIPS_ASSERT(slot_num < MAX_SLOT_NUM); - MIPS_ASSERT(irq_map[slot_num] != 0xff); + db_assert(slot_num < MAX_SLOT_NUM); + db_assert(irq_map[slot_num] != 0xff); pci_write_config_byte(dev, PCI_INTERRUPT_LINE, @@ -114,7 +127,7 @@ } } -#if defined(CONFIG_LL_DEBUG) +#if defined(CONFIG_DEBUG) extern void jsun_scan_pci_bus(void); extern void jsun_assign_pci_resource(void); #endif Index: pci_ops.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5477/pci_ops.c,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -u -d -r1.1.1.1 -r1.2 --- pci_ops.c 2001/06/22 02:29:31 1.1.1.1 +++ pci_ops.c 2001/10/11 20:45:26 1.2 @@ -26,7 +26,8 @@ #include <linux/types.h> #include <asm/addrspace.h> -#include <asm/ddb5xxx/debug.h> +#include <asm/debug.h> + #include <asm/ddb5xxx/ddb5xxx.h> /* @@ -76,10 +77,10 @@ // if (slot_num == 4) slot_num = 0; /* minimum pdar (window) size is 2MB */ - MIPS_ASSERT(swap->config_size >= (2 << 20)); + db_assert(swap->config_size >= (2 << 20)); - MIPS_ASSERT(slot_num < (1 << 5)); - MIPS_ASSERT(bus < (1 << 8)); + db_assert(slot_num < (1 << 5)); + db_assert(bus < (1 << 8)); /* backup registers */ swap->pdar_backup = ddb_in32(swap->pdar); @@ -115,7 +116,7 @@ virt_addr = KSEG1ADDR(swap->config_base + pci_addr); pciinit_offset = 0; } else { - MIPS_ASSERT( (pci_addr & (swap->config_size - 1)) == 0); + db_assert( (pci_addr & (swap->config_size - 1)) == 0); virt_addr = KSEG1ADDR(swap->config_base); pciinit_offset = pci_addr; } @@ -142,13 +143,13 @@ u32 bus, slot_num, func_num; u32 base; - MIPS_ASSERT((where & 3) == 0); - MIPS_ASSERT(where < (1 << 8)); + db_assert((where & 3) == 0); + db_assert(where < (1 << 8)); /* check if the bus is top-level */ if (dev->bus->parent != NULL) { bus = dev->bus->number; - MIPS_ASSERT(bus != 0); + db_assert(bus != 0); } else { bus = 0; } @@ -169,7 +170,7 @@ int status; u32 result; - MIPS_ASSERT((where & 1) == 0); + db_assert((where & 1) == 0); status = read_config_dword(swap, dev, where & ~3, &result); if (where & 2) result >>= 16; @@ -200,13 +201,13 @@ u32 bus, slot_num, func_num; u32 base; - MIPS_ASSERT((where & 3) == 0); - MIPS_ASSERT(where < (1 << 8)); + db_assert((where & 3) == 0); + db_assert(where < (1 << 8)); /* check if the bus is top-level */ if (dev->bus->parent != NULL) { bus = dev->bus->number; - MIPS_ASSERT(bus != 0); + db_assert(bus != 0); } else { bus = 0; } @@ -227,7 +228,7 @@ int status, shift=0; u32 result; - MIPS_ASSERT((where & 1) == 0); + db_assert((where & 1) == 0); status = read_config_dword(swap, dev, where & ~3, &result); if (status != PCIBIOS_SUCCESSFUL) return status; @@ -303,7 +304,7 @@ iopci_write_config_dword }; -#if defined(CONFIG_LL_DEBUG) +#if defined(CONFIG_DEBUG) void jsun_scan_pci_bus(void) { struct pci_bus bus; @@ -332,26 +333,26 @@ int i; dev.devfn = devfn; - MIPS_VERIFY(pci_read_config_dword(&dev, 0, &temp), - == PCIBIOS_SUCCESSFUL); + db_verify(pci_read_config_dword(&dev, 0, &temp), + == PCIBIOS_SUCCESSFUL); if (temp == 0xffffffff) continue; printk("slot %d: (addr %d) \n", devfn/8, 11+devfn/8); /* verify read word and byte */ - MIPS_VERIFY(pci_read_config_word(&dev, 2, &temp16), - == PCIBIOS_SUCCESSFUL); - MIPS_ASSERT(temp16 == (temp >> 16)); - MIPS_VERIFY(pci_read_config_byte(&dev, 3, &temp8), - == PCIBIOS_SUCCESSFUL); - MIPS_ASSERT(temp8 == (temp >> 24)); - MIPS_VERIFY(pci_read_config_byte(&dev, 1, &temp8), - == PCIBIOS_SUCCESSFUL); - MIPS_ASSERT(temp8 == ((temp >> 8) & 0xff)); + db_verify(pci_read_config_word(&dev, 2, &temp16), + == PCIBIOS_SUCCESSFUL); + db_assert(temp16 == (temp >> 16)); + db_verify(pci_read_config_byte(&dev, 3, &temp8), + == PCIBIOS_SUCCESSFUL); + db_assert(temp8 == (temp >> 24)); + db_verify(pci_read_config_byte(&dev, 1, &temp8), + == PCIBIOS_SUCCESSFUL); + db_assert(temp8 == ((temp >> 8) & 0xff)); for (i=0; i < 16; i++) { - MIPS_VERIFY(pci_read_config_dword(&dev, i*4, &temp), - == PCIBIOS_SUCCESSFUL); + db_verify(pci_read_config_dword(&dev, i*4, &temp), + == PCIBIOS_SUCCESSFUL); printk("\t%08X", temp); if ((i%4) == 3) printk("\n"); } @@ -374,7 +375,7 @@ /* for slot 5 (ext pci 1) eepro card */ dev.devfn = 5*8; pci_read_config_dword(&dev, 0, &temp); - MIPS_ASSERT(temp == 0x12298086); + db_assert(temp == 0x12298086); pci_write_config_dword(&dev, PCI_BASE_ADDRESS_0, DDB_PCI0_MEM_BASE); pci_write_config_dword(&dev, PCI_BASE_ADDRESS_1, 0); @@ -396,7 +397,7 @@ /* for slot 4 on board ether chip */ dev.devfn = 4*8; pci_read_config_dword(&dev, 0, &temp); - MIPS_ASSERT(temp == 0x00191011); + db_assert(temp == 0x00191011); pci_write_config_dword(&dev, PCI_BASE_ADDRESS_0, 0x1000); pci_write_config_dword(&dev, PCI_BASE_ADDRESS_1, DDB_PCI0_MEM_BASE); Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5477/setup.c,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -u -d -r1.1.1.1 -r1.2 --- setup.c 2001/06/22 02:29:31 1.1.1.1 +++ setup.c 2001/10/11 20:45:26 1.2 @@ -33,6 +33,7 @@ #include <asm/irq.h> #include <asm/reboot.h> #include <asm/gdb-stub.h> +#include <asm/debug.h> #include <asm/ddb5xxx/ddb5xxx.h> @@ -60,7 +61,7 @@ /* CPU cold reset */ t = ddb_in32(DDB_CPUSTAT); - MIPS_ASSERT((t&1)); + db_assert((t&1)); ddb_out32(DDB_CPUSTAT, t); /* Call the PROM */ @@ -90,7 +91,7 @@ rtc_ds1386_init(KSEG1ADDR(DDB_LCS1_BASE)); } -#if defined(CONFIG_LL_DEBUG) +#if defined(CONFIG_DEBUG) int board_init_done_flag = 0; #endif @@ -117,7 +118,7 @@ #endif /* this is the last board dependent code */ - MIPS_DEBUG(board_init_done_flag = 1); + db_run(board_init_done_flag = 1); } static void ddb5477_board_init(void); @@ -164,11 +165,11 @@ /* ----------- setup PDARs ------------ */ /* SDRAM should have been set */ - MIPS_ASSERT(ddb_in32(DDB_SDRAM0) == + db_assert(ddb_in32(DDB_SDRAM0) == ddb_calc_pdar(DDB_SDRAM_BASE, DDB_SDRAM_SIZE, 32, 0, 1)); /* SDRAM1 should be turned off. What is this for anyway ? */ - MIPS_ASSERT( (ddb_in32(DDB_SDRAM1) & 0xf) == 0); + db_assert( (ddb_in32(DDB_SDRAM1) & 0xf) == 0); /* Set LDCSs */ /* flash */ @@ -179,12 +180,12 @@ ddb_set_pdar(DDB_LCS2, DDB_LCS2_BASE, DDB_LCS2_SIZE, 16, 0, 0); /* verify VRC5477 base addr */ - MIPS_ASSERT(ddb_in32(DDB_VRC5477) == - ddb_calc_pdar(DDB_VRC5477_BASE, DDB_VRC5477_SIZE, 32, 0, 1)); + db_assert(ddb_in32(DDB_VRC5477) == + ddb_calc_pdar(DDB_VRC5477_BASE, DDB_VRC5477_SIZE, 32, 0, 1)); /* verify BOOT ROM addr */ - MIPS_ASSERT(ddb_in32(DDB_BOOTCS) == - ddb_calc_pdar(DDB_BOOTCS_BASE, DDB_BOOTCS_SIZE, 8, 0, 0)); + db_assert(ddb_in32(DDB_BOOTCS) == + ddb_calc_pdar(DDB_BOOTCS_BASE, DDB_BOOTCS_SIZE, 8, 0, 0)); /* setup PCI windows - window0 for MEM/config, window1 for IO */ ddb_set_pdar(DDB_PCIW0, DDB_PCI0_MEM_BASE, DDB_PCI0_MEM_SIZE, 32, 0, 1); |
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv14020/arch/mips/configs Modified Files: defconfig-atlas defconfig-cobalt defconfig-ddb5476 defconfig-ddb5477 defconfig-decstation defconfig-eagle defconfig-ev64120 defconfig-ev96100 defconfig-ip22 defconfig-it8172 defconfig-korva defconfig-malta defconfig-nino defconfig-ocelot defconfig-osprey defconfig-pb1000 defconfig-rm200 Log Message: Update debug crapola. Index: defconfig-atlas =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-atlas,v retrieving revision 1.6 retrieving revision 1.7 diff -u -d -r1.6 -r1.7 --- defconfig-atlas 2001/10/02 18:35:48 1.6 +++ defconfig-atlas 2001/10/11 20:45:25 1.7 @@ -505,6 +505,6 @@ CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set -# CONFIG_LL_DEBUG is not set +# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-cobalt =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-cobalt,v retrieving revision 1.7 retrieving revision 1.8 diff -u -d -r1.7 -r1.8 --- defconfig-cobalt 2001/10/01 18:33:03 1.7 +++ defconfig-cobalt 2001/10/11 20:45:25 1.8 @@ -544,6 +544,6 @@ CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set -# CONFIG_LL_DEBUG is not set +# CONFIG_DEBUG is not set CONFIG_MAGIC_SYSRQ=y # CONFIG_MIPS_UNCACHED is not set Index: defconfig-ddb5476 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ddb5476,v retrieving revision 1.9 retrieving revision 1.10 diff -u -d -r1.9 -r1.10 --- defconfig-ddb5476 2001/10/07 05:40:22 1.9 +++ defconfig-ddb5476 2001/10/11 20:45:25 1.10 @@ -591,6 +591,6 @@ CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set -CONFIG_LL_DEBUG=y +CONFIG_DEBUG=y # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-ddb5477 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ddb5477,v retrieving revision 1.8 retrieving revision 1.9 diff -u -d -r1.8 -r1.9 --- defconfig-ddb5477 2001/10/02 18:35:48 1.8 +++ defconfig-ddb5477 2001/10/11 20:45:25 1.9 @@ -471,6 +471,6 @@ CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set -CONFIG_LL_DEBUG=y +CONFIG_DEBUG=y # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-decstation =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-decstation,v retrieving revision 1.7 retrieving revision 1.8 diff -u -d -r1.7 -r1.8 --- defconfig-decstation 2001/10/02 18:35:48 1.7 +++ defconfig-decstation 2001/10/11 20:45:25 1.8 @@ -500,6 +500,6 @@ CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set -# CONFIG_LL_DEBUG is not set +# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-eagle =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-eagle,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- defconfig-eagle 2001/09/15 17:06:10 1.5 +++ defconfig-eagle 2001/10/11 20:45:25 1.6 @@ -539,6 +539,6 @@ CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set -# CONFIG_LL_DEBUG is not set +# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-ev64120 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ev64120,v retrieving revision 1.6 retrieving revision 1.7 diff -u -d -r1.6 -r1.7 --- defconfig-ev64120 2001/10/02 18:35:48 1.6 +++ defconfig-ev64120 2001/10/11 20:45:25 1.7 @@ -483,6 +483,6 @@ CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set -# CONFIG_LL_DEBUG is not set +# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-ev96100 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ev96100,v retrieving revision 1.7 retrieving revision 1.8 diff -u -d -r1.7 -r1.8 --- defconfig-ev96100 2001/10/02 18:35:48 1.7 +++ defconfig-ev96100 2001/10/11 20:45:25 1.8 @@ -474,6 +474,6 @@ CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set -# CONFIG_LL_DEBUG is not set +# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-ip22 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ip22,v retrieving revision 1.7 retrieving revision 1.8 diff -u -d -r1.7 -r1.8 --- defconfig-ip22 2001/10/02 18:35:48 1.7 +++ defconfig-ip22 2001/10/11 20:45:25 1.8 @@ -539,5 +539,6 @@ # Kernel hacking # CONFIG_CROSSCOMPILE=y +# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-it8172 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-it8172,v retrieving revision 1.8 retrieving revision 1.9 diff -u -d -r1.8 -r1.9 --- defconfig-it8172 2001/10/02 18:35:48 1.8 +++ defconfig-it8172 2001/10/11 20:45:25 1.9 @@ -320,6 +320,8 @@ # CONFIG_BLK_DEV_HPT366 is not set CONFIG_BLK_DEV_IT8172=y CONFIG_IT8172_TUNING=y +CONFIG_BLK_DEV_IT8172=y +CONFIG_IT8172_TUNING=y # CONFIG_BLK_DEV_NS87415 is not set # CONFIG_BLK_DEV_OPTI621 is not set # CONFIG_BLK_DEV_PDC202XX is not set @@ -635,6 +637,6 @@ CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set -# CONFIG_LL_DEBUG is not set +# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-korva =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-korva,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- defconfig-korva 2001/09/15 17:06:10 1.2 +++ defconfig-korva 2001/10/11 20:45:25 1.3 @@ -446,6 +446,6 @@ CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set -CONFIG_LL_DEBUG=y +CONFIG_DEBUG=y # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-malta =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-malta,v retrieving revision 1.6 retrieving revision 1.7 diff -u -d -r1.6 -r1.7 --- defconfig-malta 2001/10/02 18:35:48 1.6 +++ defconfig-malta 2001/10/11 20:45:25 1.7 @@ -533,6 +533,6 @@ CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set -# CONFIG_LL_DEBUG is not set +# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-nino =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-nino,v retrieving revision 1.7 retrieving revision 1.8 diff -u -d -r1.7 -r1.8 --- defconfig-nino 2001/10/02 18:35:48 1.7 +++ defconfig-nino 2001/10/11 20:45:25 1.8 @@ -319,5 +319,6 @@ # Kernel hacking # CONFIG_CROSSCOMPILE=y +# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-ocelot =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ocelot,v retrieving revision 1.6 retrieving revision 1.7 diff -u -d -r1.6 -r1.7 --- defconfig-ocelot 2001/10/02 18:35:48 1.6 +++ defconfig-ocelot 2001/10/11 20:45:25 1.7 @@ -471,6 +471,6 @@ CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set -# CONFIG_LL_DEBUG is not set +# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-osprey =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-osprey,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- defconfig-osprey 2001/10/08 16:39:41 1.5 +++ defconfig-osprey 2001/10/11 20:45:25 1.6 @@ -458,6 +458,6 @@ CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set -CONFIG_LL_DEBUG=y +# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-pb1000 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-pb1000,v retrieving revision 1.8 retrieving revision 1.9 diff -u -d -r1.8 -r1.9 --- defconfig-pb1000 2001/10/02 18:35:48 1.8 +++ defconfig-pb1000 2001/10/11 20:45:25 1.9 @@ -365,6 +365,8 @@ # CONFIG_FTAPE is not set # CONFIG_AGP is not set # CONFIG_DRM is not set +CONFIG_AU1000_GPIO=y +CONFIG_TS_AU1000_ADS7846=y # # Multimedia devices @@ -553,5 +555,6 @@ CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set +# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-rm200 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-rm200,v retrieving revision 1.6 retrieving revision 1.7 diff -u -d -r1.6 -r1.7 --- defconfig-rm200 2001/10/02 17:18:31 1.6 +++ defconfig-rm200 2001/10/11 20:45:25 1.7 @@ -409,5 +409,6 @@ # Kernel hacking # CONFIG_CROSSCOMPILE=y +# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set |
From: James S. <jsi...@us...> - 2001-10-11 20:45:29
|
Update of /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5476 In directory usw-pr-cvs1:/tmp/cvs-serv14020/arch/mips/ddb5xxx/ddb5476 Modified Files: irq.c pci.c pci_ops.c setup.c vrc5476_irq.c Log Message: Update debug crapola. Index: irq.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5476/irq.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- irq.c 2001/10/07 05:40:22 1.1 +++ irq.c 2001/10/11 20:45:26 1.2 @@ -3,6 +3,11 @@ * * Copyright (C) 2000 Geert Uytterhoeven <ge...@so...> * Sony Software Development Center Europe (SDCE), Brussels + * + * Re-write the whole thing to use new irq.c file. + * Copyright (C) 2001 MontaVista Software Inc. + * Author: Jun Sun, js...@mv... or js...@ju... + * */ #include <linux/config.h> #include <linux/init.h> Index: pci.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5476/pci.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- pci.c 2001/10/07 05:40:22 1.1 +++ pci.c 2001/10/11 20:45:26 1.2 @@ -4,9 +4,9 @@ #include <linux/pci.h> #include <asm/pci_channel.h> +#include <asm/debug.h> #include <asm/ddb5xxx/ddb5xxx.h> -#include <asm/ddb5xxx/debug.h> static struct resource extpci_io_resource = { "pci IO space", @@ -81,8 +81,8 @@ pci_for_each_dev(dev) { slot_num = PCI_SLOT(dev->devfn); - MIPS_ASSERT(slot_num < MAX_SLOT_NUM); - MIPS_ASSERT(irq_map[slot_num] != 0xff); + db_assert(slot_num < MAX_SLOT_NUM); + db_assert(irq_map[slot_num] != 0xff); pci_write_config_byte(dev, PCI_INTERRUPT_LINE, @@ -91,7 +91,7 @@ } } -#if defined(CONFIG_LL_DEBUG) +#if defined(CONFIG_DEBUG) extern void jsun_scan_pci_bus(void); #endif Index: pci_ops.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5476/pci_ops.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- pci_ops.c 2001/10/07 05:40:22 1.1 +++ pci_ops.c 2001/10/11 20:45:26 1.2 @@ -2,7 +2,7 @@ * Copyright 2001 MontaVista Software Inc. * Author: Jun Sun, js...@mv... or js...@ju... * - * arch/mips/ddb5xxx/ddb5477/pci_ops.c + * arch/mips/ddb5xxx/ddb5476/pci_ops.c * Define the pci_ops for DB5477. * * Much of the code is derived from the original DDB5074 port by @@ -21,8 +21,8 @@ #include <linux/types.h> #include <asm/addrspace.h> +#include <asm/debug.h> -#include <asm/ddb5xxx/debug.h> #include <asm/ddb5xxx/ddb5xxx.h> /* @@ -74,10 +74,10 @@ } /* minimum pdar (window) size is 2MB */ - MIPS_ASSERT(swap->config_size >= (2 << 20)); + db_assert(swap->config_size >= (2 << 20)); - MIPS_ASSERT(slot_num < (1 << 5)); - MIPS_ASSERT(bus < (1 << 8)); + db_assert(slot_num < (1 << 5)); + db_assert(bus < (1 << 8)); /* backup registers */ swap->pdar_backup = ddb_in32(swap->pdar); @@ -113,7 +113,7 @@ virt_addr = KSEG1ADDR(swap->config_base + pci_addr); pciinit_offset = 0; } else { - MIPS_ASSERT( (pci_addr & (swap->config_size - 1)) == 0); + db_assert( (pci_addr & (swap->config_size - 1)) == 0); virt_addr = KSEG1ADDR(swap->config_base); pciinit_offset = pci_addr; } @@ -140,13 +140,13 @@ u32 bus, slot_num, func_num; u32 base; - MIPS_ASSERT((where & 3) == 0); - MIPS_ASSERT(where < (1 << 8)); + db_assert((where & 3) == 0); + db_assert(where < (1 << 8)); /* check if the bus is top-level */ if (dev->bus->parent != NULL) { bus = dev->bus->number; - MIPS_ASSERT(bus != 0); + db_assert(bus != 0); } else { bus = 0; } @@ -167,7 +167,7 @@ int status; u32 result; - MIPS_ASSERT((where & 1) == 0); + db_assert((where & 1) == 0); status = read_config_dword(swap, dev, where & ~3, &result); if (where & 2) result >>= 16; @@ -198,13 +198,13 @@ u32 bus, slot_num, func_num; u32 base; - MIPS_ASSERT((where & 3) == 0); - MIPS_ASSERT(where < (1 << 8)); + db_assert((where & 3) == 0); + db_assert(where < (1 << 8)); /* check if the bus is top-level */ if (dev->bus->parent != NULL) { bus = dev->bus->number; - MIPS_ASSERT(bus != 0); + db_assert(bus != 0); } else { bus = 0; } @@ -225,7 +225,7 @@ int status, shift=0; u32 result; - MIPS_ASSERT((where & 1) == 0); + db_assert((where & 1) == 0); status = read_config_dword(swap, dev, where & ~3, &result); if (status != PCIBIOS_SUCCESSFUL) return status; @@ -284,7 +284,7 @@ }; -#if defined(CONFIG_LL_DEBUG) +#if defined(CONFIG_DEBUG) void jsun_scan_pci_bus(void) { struct pci_bus bus; @@ -310,7 +310,7 @@ int i; dev.devfn = devfn; - MIPS_VERIFY(pci_read_config_dword(&dev, 0, &temp), + db_verify(pci_read_config_dword(&dev, 0, &temp), == PCIBIOS_SUCCESSFUL); if (temp == 0xffffffff) continue; @@ -318,21 +318,21 @@ 11+devfn/8); /* verify read word and byte */ - MIPS_VERIFY(pci_read_config_word(&dev, 2, &temp16), - == PCIBIOS_SUCCESSFUL); - MIPS_ASSERT(temp16 == (temp >> 16)); - MIPS_VERIFY(pci_read_config_byte(&dev, 3, &temp8), - == PCIBIOS_SUCCESSFUL); - MIPS_ASSERT(temp8 == (temp >> 24)); - MIPS_VERIFY(pci_read_config_byte(&dev, 1, &temp8), - == PCIBIOS_SUCCESSFUL); - MIPS_ASSERT(temp8 == ((temp >> 8) & 0xff)); + db_verify(pci_read_config_word(&dev, 2, &temp16), + == PCIBIOS_SUCCESSFUL); + db_assert(temp16 == (temp >> 16)); + db_verify(pci_read_config_byte(&dev, 3, &temp8), + == PCIBIOS_SUCCESSFUL); + db_assert(temp8 == (temp >> 24)); + db_verify(pci_read_config_byte(&dev, 1, &temp8), + == PCIBIOS_SUCCESSFUL); + db_assert(temp8 == ((temp >> 8) & 0xff)); for (i=0; i < 16; i++) { if ((i%4) == 0) printk(KERN_INFO); - MIPS_VERIFY(pci_read_config_dword(&dev, i*4, &temp), - == PCIBIOS_SUCCESSFUL); + db_verify(pci_read_config_dword(&dev, i*4, &temp), + == PCIBIOS_SUCCESSFUL); printk("\t%08X", temp); if ((i%4) == 3) printk("\n"); Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5476/setup.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- setup.c 2001/10/07 05:40:22 1.1 +++ setup.c 2001/10/11 20:45:26 1.2 @@ -24,6 +24,7 @@ #include <asm/reboot.h> #include <asm/gdb-stub.h> #include <asm/time.h> +#include <asm/debug.h> #include <asm/ddb5xxx/ddb5xxx.h> @@ -189,11 +190,11 @@ { /* ----------- setup PDARs ------------ */ /* check SDRAM0, whether we are on MEM bus does not matter */ - MIPS_ASSERT((ddb_in32(DDB_SDRAM0) & 0xffffffef) == - ddb_calc_pdar(DDB_SDRAM_BASE, DDB_SDRAM_SIZE, 32, 0, 1)); + db_assert((ddb_in32(DDB_SDRAM0) & 0xffffffef) == + ddb_calc_pdar(DDB_SDRAM_BASE, DDB_SDRAM_SIZE, 32, 0, 1)); /* SDRAM1 should be turned off. What is this for anyway ? */ - MIPS_ASSERT( (ddb_in32(DDB_SDRAM1) & 0xf) == 0); + db_assert( (ddb_in32(DDB_SDRAM1) & 0xf) == 0); /* flash 1&2, DDB status, DDB control */ ddb_set_pdar(DDB_DCS2, DDB_DCS2_BASE, DDB_DCS2_SIZE, 16, 0, 0); @@ -208,13 +209,13 @@ /* verify VRC5477 base addr */ /* don't care about some details */ - MIPS_ASSERT((ddb_in32(DDB_INTCS) & 0xffffff0f) == - ddb_calc_pdar(DDB_INTCS_BASE, DDB_INTCS_SIZE, 8, 0, 0)); + db_assert((ddb_in32(DDB_INTCS) & 0xffffff0f) == + ddb_calc_pdar(DDB_INTCS_BASE, DDB_INTCS_SIZE, 8, 0, 0)); /* verify BOOT ROM addr */ /* don't care about some details */ - MIPS_ASSERT((ddb_in32(DDB_BOOTCS) & 0xffffff0f) == - ddb_calc_pdar(DDB_BOOTCS_BASE, DDB_BOOTCS_SIZE, 8, 0, 0)); + db_assert((ddb_in32(DDB_BOOTCS) & 0xffffff0f) == + ddb_calc_pdar(DDB_BOOTCS_BASE, DDB_BOOTCS_SIZE, 8, 0, 0)); /* setup PCI windows - window1 for MEM/config, window0 for IO */ ddb_set_pdar(DDB_PCIW0, DDB_PCI_IO_BASE, DDB_PCI_IO_SIZE, 32, 0, 1); Index: vrc5476_irq.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- vrc5476_irq.c 2001/10/07 05:40:22 1.1 +++ vrc5476_irq.c 2001/10/11 20:45:26 1.2 @@ -18,7 +18,6 @@ #include <asm/system.h> #include <asm/ddb5xxx/ddb5xxx.h> -#include <asm/ddb5xxx/debug.h> static int irq_base; |
From: James S. <jsi...@us...> - 2001-10-11 20:45:28
|
Update of /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/common In directory usw-pr-cvs1:/tmp/cvs-serv14020/arch/mips/ddb5xxx/common Modified Files: irq.c nile4.c rtc_ds1386.c Log Message: Update debug crapola. Index: irq.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/common/irq.c,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- irq.c 2001/09/07 18:43:40 1.3 +++ irq.c 2001/10/11 20:45:25 1.4 @@ -16,6 +16,8 @@ void (*irq_setup)(void); +extern void init_generic_irq(void); + void __init init_IRQ(void) { #ifdef CONFIG_REMOTE_DEBUG @@ -26,6 +28,8 @@ set_debug_traps(); breakpoint(); #endif + /* set up default irq controller */ + init_generic_irq(); /* invoke board-specific irq setup */ irq_setup(); Index: nile4.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/common/nile4.c,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -u -d -r1.1.1.1 -r1.2 --- nile4.c 2001/06/22 02:29:31 1.1.1.1 +++ nile4.c 2001/10/11 20:45:25 1.2 @@ -21,7 +21,6 @@ #include <linux/kernel.h> #include <asm/ddb5xxx/ddb5xxx.h> -#include <asm/ddb5xxx/debug.h> u32 ddb_calc_pdar(u32 phys, u32 size, int width, Index: rtc_ds1386.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/common/rtc_ds1386.c,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- rtc_ds1386.c 2001/08/25 06:24:45 1.3 +++ rtc_ds1386.c 2001/10/11 20:45:25 1.4 @@ -24,7 +24,7 @@ #include <asm/time.h> #include <asm/addrspace.h> -#include <asm/ddb5xxx/debug.h> +#include <asm/debug.h> #define EPOCH 2000 @@ -147,7 +147,7 @@ /* remember the base */ rtc_base = base; - MIPS_ASSERT((rtc_base & 0xe0000000) == KSEG1); + db_assert((rtc_base & 0xe0000000) == KSEG1); /* turn on RTC if it is not on */ byte = READ_RTC(0x9); |
From: James S. <jsi...@us...> - 2001-10-11 20:45:28
|
Update of /cvsroot/linux-mips/linux/arch/mips In directory usw-pr-cvs1:/tmp/cvs-serv14020/arch/mips Modified Files: config.in Log Message: Update debug crapola. Index: config.in =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/config.in,v retrieving revision 1.32 retrieving revision 1.33 diff -u -d -r1.32 -r1.33 --- config.in 2001/10/08 16:50:42 1.32 +++ config.in 2001/10/11 20:45:25 1.33 @@ -563,9 +563,7 @@ bool 'Remote GDB kernel debugging' CONFIG_REMOTE_DEBUG dep_bool 'Console output to GDB' CONFIG_GDB_CONSOLE $CONFIG_REMOTE_DEBUG fi -if [ "$CONFIG_SERIAL" = "y" ]; then - bool 'Low-level debugging' CONFIG_LL_DEBUG -fi +bool 'Enable run-time debugging' CONFIG_DEBUG bool 'Magic SysRq key' CONFIG_MAGIC_SYSRQ if [ "$CONFIG_SMP" != "y" ]; then bool 'Run uncached' CONFIG_MIPS_UNCACHED |
From: James S. <jsi...@us...> - 2001-10-11 19:19:56
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv12205/mips/kernel Modified Files: old-time.c Log Message: Fix load 1 problem. Index: old-time.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/old-time.c,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- old-time.c 2001/10/05 17:07:14 1.5 +++ old-time.c 2001/10/11 19:19:52 1.6 @@ -441,10 +441,12 @@ void indy_r4k_timer_interrupt (struct pt_regs *regs) { - static const int INDY_R4K_TIMER_IRQ = 7; int cpu = smp_processor_id(); + int irq = 7; - r4k_timer_interrupt (INDY_R4K_TIMER_IRQ, NULL, regs); + irq_enter(cpu, irq); + r4k_timer_interrupt(irq, NULL, regs); + irq_exit(cpu, irq); if (softirq_pending(cpu)) do_softirq(); |
From: James S. <jsi...@us...> - 2001-10-11 19:19:56
|
Update of /cvsroot/linux-mips/linux/arch/mips/mips-boards/generic In directory usw-pr-cvs1:/tmp/cvs-serv12205/mips/mips-boards/generic Modified Files: time.c Log Message: Fix load 1 problem. Index: time.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/mips-boards/generic/time.c,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- time.c 2001/10/05 17:07:14 1.2 +++ time.c 2001/10/11 19:19:52 1.3 @@ -133,13 +133,15 @@ */ void mips_timer_interrupt(struct pt_regs *regs) { + int cpu = smp_processor_id(); int irq = 7; if (r4k_offset == 0) goto null; + irq_enter(cpu, irq); do { - kstat.irqs[0][irq]++; + kstat.irqs[cpu][irq]++; do_timer(regs); /* Historical comment/code: @@ -172,6 +174,10 @@ } while (((unsigned long)read_32bit_cp0_register(CP0_COUNT) - r4k_cur) < 0x7fffffff); + irq_exit(cpu, irq); + + if (softirq_pending(cpu)) + do_softirq(); return; |
From: James S. <jsi...@us...> - 2001-10-11 19:19:55
|
Update of /cvsroot/linux-mips/linux/arch/mips64/sgi-ip27 In directory usw-pr-cvs1:/tmp/cvs-serv12205/mips64/sgi-ip27 Modified Files: ip27-timer.c Log Message: Fix load 1 problem. Index: ip27-timer.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/sgi-ip27/ip27-timer.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- ip27-timer.c 2001/08/22 18:19:17 1.1 +++ ip27-timer.c 2001/10/11 19:19:52 1.2 @@ -91,8 +91,9 @@ { int cpu = smp_processor_id(); int cpuA = ((cputoslice(cpu)) == 0); - int irq = 7; /* XXX Assign number */ + int irq = 9; /* XXX Assign number */ + irq_enter(cpu, irq); write_lock(&xtime_lock); again: @@ -109,19 +110,7 @@ do_timer(regs); #ifdef CONFIG_SMP - { - int user = user_mode(regs); - - /* - * update_process_times() expects us to have done irq_enter(). - * Besides, if we don't timer interrupts ignore the global - * interrupt lock, which is the WrongThing (tm) to do. - * Picked from i386 code. - */ - irq_enter(cpu, 0); - update_process_times(user); - irq_exit(cpu, 0); - } + update_process_times(user_mode(regs)); #endif /* CONFIG_SMP */ /* @@ -145,6 +134,7 @@ } write_unlock(&xtime_lock); + irq_exit(cpu, irq); if (softirq_pending(cpu)) do_softirq(); |
From: James S. <jsi...@us...> - 2001-10-11 18:38:44
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv29731 Added Files: mmu_context.h Log Message: A extern definition to make things compile. |
From: James S. <jsi...@us...> - 2001-10-11 18:19:10
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv21694 Modified Files: head.S Log Message: Ralph missed a change for current_pgd. Will submit patch to him. Index: head.S =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/head.S,v retrieving revision 1.7 retrieving revision 1.8 diff -u -d -r1.7 -r1.8 --- head.S 2001/10/09 21:37:55 1.7 +++ head.S 2001/10/11 18:19:06 1.8 @@ -105,7 +105,7 @@ .set mips3 mfc0 k0, CP0_BADVADDR # Get faulting address srl k0, k0, 22 # get pgd only bits - lw k1, current_pgd # get pgd pointer + lw k1, pgd_current # get pgd pointer sll k0, k0, 2 addu k1, k1, k0 # add in pgd offset mfc0 k0, CP0_CONTEXT # get context reg |
From: James S. <jsi...@us...> - 2001-10-11 16:41:34
|
Update of /cvsroot/linux-mips/linux/arch/mips/mm In directory usw-pr-cvs1:/tmp/cvs-serv17691 Added Files: rm7k.c Log Message: Oops. Missed adding this one. |
From: <fra...@ce...> - 2001-10-11 09:09:34
|
Humm, I'm lost, Does anyone known how to build for casio E15-105-115, witch config should I use for MACHINE SELECTION? Euh, I'm wondering while I write this e-mail if Casio is supported by linux-mips? Regards, FL |
From: Jun S. <ju...@us...> - 2001-10-10 23:50:51
|
Update of /cvsroot/linux-mips/linux/arch/mips/korva In directory usw-pr-cvs1:/tmp/cvs-serv23916/arch/mips/korva Modified Files: setup.c irq_korva.c Log Message: Remove bogus workaround. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/korva/setup.c,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- setup.c 2001/09/17 17:02:29 1.2 +++ setup.c 2001/10/10 23:50:48 1.3 @@ -28,7 +28,7 @@ #include <asm/korva.h> #include <asm/ddb5xxx/debug.h> -#define USE_CPU_TIMER 1 /* are we using cpu counter as timer */ +// #define USE_CPU_TIMER 1 /* are we using cpu counter as timer */ extern void nec_korva_restart(char* c); extern void nec_korva_halt(void); @@ -43,7 +43,6 @@ s.line = 0; /* we set the first one */ s.baud_base = 1152000; - // s.irq = 6; s.irq = 10; s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST; s.iomem_base = (u8*)(KORVA_BASE_VIRT + KORVA_UARTDLL); Index: irq_korva.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/korva/irq_korva.c,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- irq_korva.c 2001/09/17 17:02:29 1.2 +++ irq_korva.c 2001/10/10 23:50:48 1.3 @@ -22,8 +22,6 @@ #include <asm/korva.h> #include <asm/mipsregs.h> -#define KORVA_IRQ_WORKAROUND 1 - /* [jsun] sooner or later we should move this debug stuff to MIPS common */ #include <asm/ddb5xxx/debug.h> @@ -38,14 +36,8 @@ MIPS_ASSERT(irq >= korva_irq_base); MIPS_ASSERT(irq < korva_irq_base+NUM_KORVA_IRQS); -#if defined(KORVA_IRQ_WORKAROUND) - clear_cp0_cause( 1 << (6 + 8)); - set_cp0_status(1 << (6 + 8)); -#else irq -= korva_irq_base; korva_out32(KORVA_S_IMR, korva_in32(KORVA_S_IMR) | (1 << irq) ); -#endif - } static void @@ -55,12 +47,8 @@ MIPS_ASSERT(irq >= korva_irq_base); MIPS_ASSERT(irq < korva_irq_base+NUM_KORVA_IRQS); -#if defined(KORVA_IRQ_WORKAROUND) - clear_cp0_status(1 << (6 + 8)); -#else irq -= korva_irq_base; korva_out32(KORVA_S_IMR, korva_in32(KORVA_S_IMR) & ~(1 << irq) ); -#endif } static unsigned int korva_irq_startup(unsigned int irq) @@ -102,8 +90,4 @@ } korva_irq_base = irq_base; - -#if defined(KORVA_IRQ_WORKAROUND) - korva_out32(KORVA_S_IMR, 0xff); -#endif } |
From: Jun S. <ju...@us...> - 2001-10-10 23:26:35
|
Update of /cvsroot/linux-mips/linux/drivers/net In directory usw-pr-cvs1:/tmp/cvs-serv17260/drivers/net Modified Files: nec_candy.c Log Message: We need to flush cache before we recycle the recieve buffer. Also added rx_coypbreak so that we can trade the overhead of copying over the emulated unaligned access. However there seems to be a bug in CPU where BD flag is not set in unaligned access exception. We set rx_copybreak big enough so that we always copy for now. Index: nec_candy.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/net/nec_candy.c,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- nec_candy.c 2001/09/17 17:02:29 1.2 +++ nec_candy.c 2001/10/10 23:26:31 1.3 @@ -79,6 +79,17 @@ #define TX_TIMEOUT 4*HZ +/* rx_copybreak: for smaller packet we copy them to avoid emulated + * unaligned access overhead. + * + * Set it to 1518 to always copy ( you should do that on fast machines) + * + * Set it to 0 to avoid any copy. + * + * On Korva, some value in the middle might be appropriate. + */ +static int rx_copybreak=1518; + /*********************************************************************** * hardware bug workaround *********************************************************************** @@ -1310,6 +1321,12 @@ dp->status = SWAP16(DB_LP); /* 1 stands for buffer vs link ptr */ dp->size = RX_BUF_SIZE; + /* we need to clean up cache here. Otherwise we may have some + * dirty cache while ether controller is feeding fresh pkt data + * to the physical RAM. Data corruption could happen. + */ + dma_cache_wback_inv(KSEG0ADDR(dp->pointer), RX_BUF_SIZE); + if (++pp->rx_head == RX_RING_SIZE) pp->rx_head = 0; ASSERT(pp->rx_head < RX_RING_SIZE); @@ -1354,6 +1371,7 @@ struct sk_buff * newskb; struct sk_buff * rxskb; int i; + int skb_size; ASSERT(KSEGX(dp) == KSEG1); @@ -1399,7 +1417,28 @@ } /* we got a good packet */ - newskb = dev_alloc_skb(RX_BUF_SIZE); + + /* STRATEGY: ether packet has 14 bytes. So we will + * suffer from emulated unaligned access if we pass + * the skb straight to upper layer. An alternative is + * to copy the buffer by offset of 2 and then pass it up. + * Then the overhead is copying. + * + * In general, it is more beneficial to copy if we have smaller + * packet. Also, it is more beneficial to copy if we have + * faster machines. + * + * To keep it flexible, we will leave rx_copybreak flexible. + */ + + if (pkt_len < rx_copybreak) { + skb_size = pkt_len + 2; + } else { + skb_size = RX_BUF_SIZE; + } + + /* allocate a new skb */ + newskb = dev_alloc_skb(skb_size); if (newskb == NULL) { printk(KERN_ERR "%s: Memory squeeze, dropping packet.\n", @@ -1409,12 +1448,26 @@ continue; } - /* use the new skb to replace the recived one */ - rxskb = pp->rx_skb[pp->rx_head]; + if (pkt_len <= rx_copybreak) { + /* we will copy */ + rxskb = pp->rx_skb[pp->rx_head]; + ASSERT(rxskb->data == phys_to_virt(dp->pointer)); - newskb->dev = dev; - pp->rx_skb[pp->rx_head] = newskb; - reclaim_one_rx_desc(dev, newskb->data); + newskb->dev = dev; + skb_reserve(newskb, 2); /* align IP pkt to 16-byte */ + eth_copy_and_sum(newskb, rxskb->data, pkt_len, 0); + + rxskb = newskb; + reclaim_one_rx_desc(dev, NULL); + } else { + /* use the new skb to replace the recived one */ + rxskb = pp->rx_skb[pp->rx_head]; + + newskb->dev = dev; + pp->rx_skb[pp->rx_head] = newskb; + reclaim_one_rx_desc(dev, newskb->data); + + } skb_put(rxskb, pkt_len); rxskb->protocol = eth_type_trans(rxskb, dev); |
From: Pete P. <pp...@us...> - 2001-10-10 21:56:18
|
Update of /cvsroot/linux-mips/linux/include/linux In directory usw-pr-cvs1:/tmp/cvs-serv23816/include/linux Added Files: au1000_gpio.h Log Message: Added gpio and touch screen driver (ts driver not yet tested). --- NEW FILE: au1000_gpio.h --- /* * FILE NAME au1000_gpio.h * * BRIEF MODULE DESCRIPTION * API to Alchemy Au1000 GPIO device. * * Author: MontaVista Software, Inc. <so...@mv...> * Steve Longerbeam <st...@mv...> * * Copyright 2001 MontaVista Software Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */ #ifndef __AU1000_GPIO_H #define __AU1000_GPIO_H #include <linux/ioctl.h> #define AU1000GPIO_IOC_MAGIC 'A' #define AU1000GPIO_IN _IOR (AU1000GPIO_IOC_MAGIC, 0, int) #define AU1000GPIO_SET _IOW (AU1000GPIO_IOC_MAGIC, 1, int) #define AU1000GPIO_CLEAR _IOW (AU1000GPIO_IOC_MAGIC, 2, int) #define AU1000GPIO_OUT _IOW (AU1000GPIO_IOC_MAGIC, 3, int) #define AU1000GPIO_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 4, int) #define AU1000GPIO_AVAIL_MASK _IOR (AU1000GPIO_IOC_MAGIC, 5, int) #ifdef __KERNEL__ extern u32 get_au1000_avail_gpio_mask(void); extern int au1000gpio_tristate(u32 data); extern int au1000gpio_in(u32 *data); extern int au1000gpio_set(u32 data); extern int au1000gpio_clear(u32 data); extern int au1000gpio_out(u32 data); #endif #endif |
From: Pete P. <pp...@us...> - 2001-10-10 21:56:18
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv23816/include/asm-mips Modified Files: au1000_dma.h Log Message: Added gpio and touch screen driver (ts driver not yet tested). Index: au1000_dma.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/au1000_dma.h,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- au1000_dma.h 2001/09/25 03:36:35 1.3 +++ au1000_dma.h 2001/10/10 21:56:15 1.4 @@ -32,20 +32,20 @@ #define __ASM_AU1000_DMA_H #include <linux/config.h> -#include <asm/io.h> /* need byte IO */ -#include <linux/spinlock.h> /* And spinlocks */ +#include <asm/io.h> /* need byte IO */ +#include <linux/spinlock.h> /* And spinlocks */ #include <linux/delay.h> #include <asm/system.h> #define NUM_AU1000_DMA_CHANNELS 8 /* DMA Channel Base Addresses */ -#define DMA_CHANNEL_BASE 0xB4002000 -#define DMA_CHANNEL_LEN 0x00000100 +#define DMA_CHANNEL_BASE 0xB4002000 +#define DMA_CHANNEL_LEN 0x00000100 /* DMA Channel Register Offsets */ -#define DMA_MODE_SET 0x00000000 -#define DMA_MODE_CLEAR 0x00000004 +#define DMA_MODE_SET 0x00000000 +#define DMA_MODE_CLEAR 0x00000004 /* DMA Mode register bits follow */ #define DMA_DAH_MASK (0x0f << 20) #define DMA_DID_BIT 16 @@ -80,32 +80,32 @@ /* DMA Device ID's follow */ enum { - DMA_ID_UART0_TX = 0, - DMA_ID_UART0_RX, - DMA_ID_GP04, - DMA_ID_GP05, - DMA_ID_AC97C_TX, - DMA_ID_AC97C_RX, - DMA_ID_UART3_TX, - DMA_ID_UART3_RX, - DMA_ID_USBDEV_EP0_RX, - DMA_ID_USBDEV_EP0_TX, - DMA_ID_USBDEV_EP2_TX, - DMA_ID_USBDEV_EP3_TX, - DMA_ID_USBDEV_EP4_RX, - DMA_ID_USBDEV_EP5_RX, - DMA_ID_I2S_TX, - DMA_ID_I2S_RX, - DMA_NUM_DEV + DMA_ID_UART0_TX = 0, + DMA_ID_UART0_RX, + DMA_ID_GP04, + DMA_ID_GP05, + DMA_ID_AC97C_TX, + DMA_ID_AC97C_RX, + DMA_ID_UART3_TX, + DMA_ID_UART3_RX, + DMA_ID_USBDEV_EP0_RX, + DMA_ID_USBDEV_EP0_TX, + DMA_ID_USBDEV_EP2_TX, + DMA_ID_USBDEV_EP3_TX, + DMA_ID_USBDEV_EP4_RX, + DMA_ID_USBDEV_EP5_RX, + DMA_ID_I2S_TX, + DMA_ID_I2S_RX, + DMA_NUM_DEV }; struct dma_chan { - int dev_id; // this channel is allocated if >=0, free otherwise - unsigned int io; - int irq; + int dev_id; // this channel is allocated if >=0, free otherwise + unsigned int io; + int irq; const char *dev_str; - unsigned int fifo_addr; - unsigned int mode; + unsigned int fifo_addr; + unsigned int mode; }; /* These are in arch/mips/au1000/common/dma.c */ @@ -113,29 +113,29 @@ extern int request_au1000_dma(int dev_id, const char *dev_str); extern void free_au1000_dma(unsigned int dmanr); extern int au1000_dma_read_proc(char *buf, char **start, off_t fpos, - int length, int *eof, void *data); + int length, int *eof, void *data); extern void dump_au1000_dma_channel(unsigned int dmanr); -extern spinlock_t au1000_dma_spin_lock; +extern spinlock_t au1000_dma_spin_lock; static __inline__ struct dma_chan *get_dma_chan(unsigned int dmanr) { if (dmanr > NUM_AU1000_DMA_CHANNELS || au1000_dma_table[dmanr].dev_id < 0) - return NULL; - return &au1000_dma_table[dmanr]; + return NULL; + return &au1000_dma_table[dmanr]; } static __inline__ unsigned long claim_dma_lock(void) { - unsigned long flags; - spin_lock_irqsave(&au1000_dma_spin_lock, flags); - return flags; + unsigned long flags; + spin_lock_irqsave(&au1000_dma_spin_lock, flags); + return flags; } static __inline__ void release_dma_lock(unsigned long flags) { - spin_unlock_irqrestore(&au1000_dma_spin_lock, flags); + spin_unlock_irqrestore(&au1000_dma_spin_lock, flags); } /* @@ -144,22 +144,22 @@ static __inline__ void enable_dma_buffer0(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return; - outl_sync(DMA_BE0, chan->io + DMA_MODE_SET); + if (!chan) + return; + outl_sync(DMA_BE0, chan->io + DMA_MODE_SET); } static __inline__ void enable_dma_buffer1(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return; - outl_sync(DMA_BE1, chan->io + DMA_MODE_SET); + if (!chan) + return; + outl_sync(DMA_BE1, chan->io + DMA_MODE_SET); } static __inline__ void enable_dma_buffers(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return; + if (!chan) + return; outl_sync(DMA_BE0 | DMA_BE1, chan->io + DMA_MODE_SET); } @@ -167,39 +167,39 @@ static __inline__ void enable_dma(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return; + if (!chan) + return; - // set device FIFO address + // set device FIFO address outl_sync(virt_to_phys((void *) chan->fifo_addr), chan->io + DMA_PERIPHERAL_ADDR); outl_sync(chan-> mode | (chan->dev_id << DMA_DID_BIT) | DMA_IE | DMA_GO, - chan->io + DMA_MODE_SET); + chan->io + DMA_MODE_SET); } #define DMA_HALT_POLL 0x5000 static __inline__ void disable_dma(unsigned int dmanr) { - int i; + int i; struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return; + if (!chan) + return; outl_sync(DMA_D1 | DMA_D0 | DMA_GO, chan->io + DMA_MODE_CLEAR); - // poll the halt bit - for (i = 0; i < DMA_HALT_POLL; i++) + // poll the halt bit + for (i = 0; i < DMA_HALT_POLL; i++) if (inl(chan->io + DMA_MODE_SET) & DMA_HALT) - break; - if (i == DMA_HALT_POLL) { - printk(KERN_INFO "disable_dma: HALT poll expired!\n"); - } else { - // now we can disable the buffers + break; + if (i == DMA_HALT_POLL) { + printk(KERN_INFO "disable_dma: HALT poll expired!\n"); + } else { + // now we can disable the buffers outl_sync(~DMA_GO, chan->io + DMA_MODE_CLEAR); - } + } } @@ -209,22 +209,22 @@ static __inline__ void set_dma_mode(unsigned int dmanr, unsigned int mode) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return; - /* - * chan->mode only holds endianess, direction, transfer size, device - * FIFO width, and cacheability info for the channel. Make sure - * anything else is masked off. - */ + if (!chan) + return; + /* + * chan->mode only holds endianess, direction, transfer size, device + * FIFO width, and cacheability info for the channel. Make sure + * anything else is masked off. + */ mode &= (DMA_BE | DMA_DR | DMA_TS8 | DMA_DW_MASK | DMA_NC); - chan->mode = mode; + chan->mode = mode; } static __inline__ int get_dma_active_buffer(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return -1; + if (!chan) + return -1; return (inl(chan->io + DMA_MODE_SET) & DMA_AB) ? 1 : 0; } @@ -238,11 +238,11 @@ unsigned int a) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return; - - if (chan->dev_id != DMA_ID_GP04 && chan->dev_id != DMA_ID_GP05) - return; + if (!chan) + return; + + if (chan->dev_id != DMA_ID_GP04 && chan->dev_id != DMA_ID_GP05) + return; outl_sync(virt_to_phys((void *) a), chan->io + DMA_PERIPHERAL_ADDR); @@ -254,15 +254,15 @@ static __inline__ void clear_dma_done0(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return; + if (!chan) + return; outl_sync(DMA_D0, chan->io + DMA_MODE_CLEAR); } static __inline__ void clear_dma_done1(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return; + if (!chan) + return; outl_sync(DMA_D1, chan->io + DMA_MODE_CLEAR); } @@ -279,8 +279,8 @@ static __inline__ void set_dma_addr0(unsigned int dmanr, unsigned int a) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return; + if (!chan) + return; outl_sync(a, chan->io + DMA_BUFFER0_START); } @@ -290,8 +290,8 @@ static __inline__ void set_dma_addr1(unsigned int dmanr, unsigned int a) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return; + if (!chan) + return; outl_sync(a, chan->io + DMA_BUFFER1_START); } @@ -303,9 +303,9 @@ unsigned int count) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return; - count &= DMA_COUNT_MASK; + if (!chan) + return; + count &= DMA_COUNT_MASK; outl_sync(count, chan->io + DMA_BUFFER0_COUNT); } @@ -316,9 +316,9 @@ unsigned int count) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return; - count &= DMA_COUNT_MASK; + if (!chan) + return; + count &= DMA_COUNT_MASK; outl_sync(count, chan->io + DMA_BUFFER1_COUNT); } @@ -329,9 +329,9 @@ unsigned int count) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return; - count &= DMA_COUNT_MASK; + if (!chan) + return; + count &= DMA_COUNT_MASK; outl_sync(count, chan->io + DMA_BUFFER0_COUNT); outl_sync(count, chan->io + DMA_BUFFER1_COUNT); } @@ -342,30 +342,30 @@ */ static __inline__ int get_dma_buffer_done(unsigned int dmanr) { - unsigned int mode; + unsigned int mode; struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return 0; + if (!chan) + return 0; mode = inl(chan->io + DMA_MODE_SET); - if (!(mode & (DMA_D0 | DMA_D1)) || - (mode & (DMA_D0 | DMA_D1)) == (DMA_D0 | DMA_D1)) - return -1; + if (!(mode & (DMA_D0 | DMA_D1)) || + (mode & (DMA_D0 | DMA_D1)) == (DMA_D0 | DMA_D1)) + return -1; - return (mode & DMA_D0) ? 0 : 1; + return (mode & DMA_D0) ? 0 : 1; } - - + + /* * Returns the DMA channel's Buffer Done IRQ number. */ static __inline__ int get_dma_done_irq(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return -1; + if (!chan) + return -1; - return chan->irq; + return chan->irq; } /* @@ -373,22 +373,22 @@ */ static __inline__ int get_dma_residue(unsigned int dmanr) { - int curBufCntReg, count; + int curBufCntReg, count; struct dma_chan *chan = get_dma_chan(dmanr); - if (!chan) - return 0; + if (!chan) + return 0; - curBufCntReg = (inl(chan->io + DMA_MODE_SET) & DMA_AB) ? - DMA_BUFFER1_COUNT : DMA_BUFFER0_COUNT; + curBufCntReg = (inl(chan->io + DMA_MODE_SET) & DMA_AB) ? + DMA_BUFFER1_COUNT : DMA_BUFFER0_COUNT; - count = inl(chan->io + curBufCntReg) & DMA_COUNT_MASK; - - if ((chan->mode & DMA_DW_MASK) == DMA_DW16) - count <<= 1; - else if ((chan->mode & DMA_DW_MASK) == DMA_DW32) - count <<= 2; + count = inl(chan->io + curBufCntReg) & DMA_COUNT_MASK; - return count; + if ((chan->mode & DMA_DW_MASK) == DMA_DW16) + count <<= 1; + else if ((chan->mode & DMA_DW_MASK) == DMA_DW32) + count <<= 2; + + return count; } #endif /* __ASM_AU1000_DMA_H */ |
From: Pete P. <pp...@us...> - 2001-10-10 21:56:17
|
Update of /cvsroot/linux-mips/linux/drivers/char In directory usw-pr-cvs1:/tmp/cvs-serv23816/drivers/char Modified Files: Config.in Makefile Added Files: au1000_gpio.c au1000_ts.c Log Message: Added gpio and touch screen driver (ts driver not yet tested). --- NEW FILE: au1000_gpio.c --- /* * FILE NAME au1000_gpio.c * * BRIEF MODULE DESCRIPTION * Driver for Alchemy Au1000 GPIO. * * Author: MontaVista Software, Inc. <so...@mv...> * Steve Longerbeam <st...@mv...> * * Copyright 2001 MontaVista Software Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <linux/module.h> #include <linux/config.h> #include <linux/types.h> #include <linux/kernel.h> #include <linux/miscdevice.h> #include <linux/au1000_gpio.h> #include <linux/init.h> #include <asm/uaccess.h> #include <asm/io.h> #include <asm/au1000.h> #define VERSION "0.01" static const struct { u32 active_hi; u32 avail_mask; } pinfunc_to_avail[15] = { {1, 0x7<<16}, // 0 = SSI0 / GPIO[18:16] {-1, 0}, // 1 = AC97 / SSI1 {1, 1<<19}, // 2 = IRDA / GPIO19 {1, 1<<20}, // 3 = UART0 / GPIO20 {1, 0x1f<<24}, // 4 = NIC2 / GPIO[28:24] {1, 0x7<<29}, // 5 = I2S / GPIO[31:29] {0, 1<<8}, // 6 = I2SDI / GPIO8 {0, 0x3f<<9}, // 7 = UART3 / GPIO[14:9] {0, 1<<15}, // 8 = IRFIRSEL / GPIO15 {0, 1<<2}, // 9 = EXTCLK0 or OSC / GPIO2 {0, 1<<3}, // 10 = EXTCLK1 / GPIO3 {0, 1<<6}, // 11 = SMROMCKE / GPIO6 {1, 1<<21}, // 12 = UART1 / GPIO21 {1, 1<<22}, // 13 = UART2 / GPIO22 {1, 1<<23} // 14 = UART3 / GPIO23 }; u32 get_au1000_avail_gpio_mask(void) { int i; u32 pinfunc = inl(PIN_FUNCTION); u32 avail_mask = 0; // start with no gpio available // first, check for GPIO's reprogrammed as peripheral pins for (i=0; i<15; i++) { if (pinfunc_to_avail[i].active_hi < 0) continue; if (!(pinfunc_to_avail[i].active_hi ^ ((pinfunc & (1<<i)) ? 1:0))) avail_mask |= pinfunc_to_avail[i].avail_mask; } // check for GPIO's used as interrupt sources avail_mask &= ~(inl(INTC1_MASK_READ) & (inl(INTC1_CONFIG0_READ) | inl(INTC1_CONFIG1_READ))); #ifdef CONFIG_USB_OHCI avail_mask &= ~((1<<4) | (1<<11)); #ifndef CONFIG_AU1000_USB_DEVICE avail_mask &= ~((1<<5) | (1<<13)); #endif #endif return avail_mask; } /* * Tristate the requested GPIO pins specified in data. * Only available GPIOs will be tristated. */ int au1000gpio_tristate(u32 data) { data &= get_au1000_avail_gpio_mask(); if (data) outl(data, TSTATE_STATE_SET); return 0; } /* * Return the pin state. Pins configured as outputs will return * the output state, and pins configured as inputs (tri-stated) * will return input pin state. */ int au1000gpio_in(u32 *data) { *data = inl(PIN_STATE); return 0; } /* * Set/clear GPIO pins. Only available GPIOs will be affected. */ int au1000gpio_set(u32 data) { data &= get_au1000_avail_gpio_mask(); if (data) outl(data, OUTPUT_STATE_SET); return 0; } int au1000gpio_clear(u32 data) { data &= get_au1000_avail_gpio_mask(); if (data) outl(data, OUTPUT_STATE_CLEAR); return 0; } /* * Output data to GPIO pins. Only available GPIOs will be affected. */ int au1000gpio_out(u32 data) { au1000gpio_set(data); au1000gpio_clear(~data); return 0; } EXPORT_SYMBOL(get_au1000_avail_gpio_mask); EXPORT_SYMBOL(au1000gpio_tristate); EXPORT_SYMBOL(au1000gpio_in); EXPORT_SYMBOL(au1000gpio_set); EXPORT_SYMBOL(au1000gpio_clear); EXPORT_SYMBOL(au1000gpio_out); static int au1000gpio_open(struct inode *inode, struct file *file) { MOD_INC_USE_COUNT; return 0; } static int au1000gpio_release(struct inode *inode, struct file *file) { MOD_DEC_USE_COUNT; return 0; } static int au1000gpio_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) { int status; u32 val; switch(cmd) { case AU1000GPIO_IN: status = au1000gpio_in(&val); if (status != 0) return status; return put_user(val, (u32 *)arg); case AU1000GPIO_OUT: if (get_user(val, (u32 *)arg)) return -EFAULT; return au1000gpio_out(val); case AU1000GPIO_SET: if (get_user(val, (u32 *)arg)) return -EFAULT; return au1000gpio_set(val); case AU1000GPIO_CLEAR: if (get_user(val, (u32 *)arg)) return -EFAULT; return au1000gpio_clear(val); case AU1000GPIO_TRISTATE: if (get_user(val, (u32 *)arg)) return -EFAULT; return au1000gpio_tristate(val); case AU1000GPIO_AVAIL_MASK: return put_user(get_au1000_avail_gpio_mask(), (u32 *)arg); default: return -ENOIOCTLCMD; } return 0; } static struct file_operations au1000gpio_fops = { owner: THIS_MODULE, ioctl: au1000gpio_ioctl, open: au1000gpio_open, release: au1000gpio_release, }; static struct miscdevice au1000gpio_miscdev = { GPIO_MINOR, "au1000_gpio", &au1000gpio_fops }; int __init au1000gpio_init(void) { misc_register(&au1000gpio_miscdev); printk("Au1000 gpio driver, version %s\n", VERSION); return 0; } void __exit au1000gpio_exit(void) { misc_deregister(&au1000gpio_miscdev); } module_init(au1000gpio_init); module_exit(au1000gpio_exit); --- NEW FILE: au1000_ts.c --- /* * au1000_ts.c -- Touch screen driver for the Alchemy Au1000's * SSI Port 0 talking to the ADS7846 touch screen * controller. * * Copyright 2001 MontaVista Software Inc. * Author: MontaVista Software, Inc. * st...@mv... or so...@mv... * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. * * Notes: * * Revision history * 06.27.2001 Initial version */ #include <linux/module.h> #include <linux/version.h> #include <linux/init.h> #include <linux/fs.h> #include <linux/delay.h> #include <linux/poll.h> #include <linux/string.h> #include <linux/ioport.h> /* request_region */ #include <linux/interrupt.h> /* mark_bh */ #include <asm/uaccess.h> /* get_user,copy_to_user */ #include <asm/io.h> #include <asm/au1000.h> #define TS_NAME "au1000-ts" #define TS_MAJOR 11 #define PFX TS_NAME #define AU1000_TS_DEBUG 1 #ifdef AU1000_TS_DEBUG #define dbg(format, arg...) printk(KERN_DEBUG PFX ": " format "\n" , ## arg) #else #define dbg(format, arg...) do {} while (0) #endif #define err(format, arg...) printk(KERN_ERR PFX ": " format "\n" , ## arg) #define info(format, arg...) printk(KERN_INFO PFX ": " format "\n" , ## arg) #define warn(format, arg...) printk(KERN_WARNING PFX ": " format "\n" , ## arg) // SSI Status register bit defines #define SSISTAT_BF (1<<4) #define SSISTAT_OF (1<<3) #define SSISTAT_UF (1<<2) #define SSISTAT_DONE (1<<1) #define SSISTAT_BUSY (1<<0) // SSI Interrupt Pending and Enable register bit defines #define SSIINT_OI (1<<3) #define SSIINT_UI (1<<2) #define SSIINT_DI (1<<1) // SSI Address/Data register bit defines #define SSIADAT_D (1<<24) #define SSIADAT_ADDR_BIT 16 #define SSIADAT_ADDR_MASK (0xff<<SSIADAT_ADDR_BIT) #define SSIADAT_DATA_BIT 0 #define SSIADAT_DATA_MASK (0xfff<<SSIADAT_DATA_BIT) // SSI Enable register bit defines #define SSIEN_CD (1<<1) #define SSIEN_E (1<<0) // SSI Config register bit defines #define SSICFG_AO (1<<24) #define SSICFG_DO (1<<23) #define SSICFG_ALEN_BIT 20 #define SSICFG_ALEN_MASK (0x7<<SSICFG_ALEN_BIT) #define SSICFG_DLEN_BIT 16 #define SSICFG_DLEN_MASK (0xf<<SSICFG_DLEN_BIT) #define SSICFG_DD (1<<11) #define SSICFG_AD (1<<10) #define SSICFG_BM_BIT 8 #define SSICFG_BM_MASK (0x3<<SSICFG_BM_BIT) #define SSICFG_CE (1<<7) #define SSICFG_DP (1<<6) #define SSICFG_DL (1<<5) #define SSICFG_EP (1<<4) // Bus Turnaround Selection #define SCLK_HOLD_HIGH 0 #define SCLK_HOLD_LOW 1 #define SCLK_CYCLE 2 /* * Default config for SSI0: * * - transmit MSBit first * - expect MSBit first on data receive * - address length 7 bits * - expect data length 12 bits * - do not disable Direction bit * - do not disable Address bits * - SCLK held low during bus turnaround * - Address and Data bits clocked out on falling edge of SCLK * - Direction bit high is a read, low is a write * - Direction bit precedes Address bits * - Active low enable signal */ #define DEFAULT_SSI_CONFIG \ (SSICFG_AO | SSICFG_DO | (6<<SSICFG_ALEN_BIT) | (11<<SSICFG_DLEN_BIT) |\ (SCLK_HOLD_LOW<<SSICFG_BM_BIT) | SSICFG_DP | SSICFG_EP) // ADS7846 Control Byte bit defines #define ADS7846_ADDR_BIT 4 #define ADS7846_ADDR_MASK (0x7<<ADS7846_ADDR_BIT) #define ADS7846_MEASURE_X (0x5<<ADS7846_ADDR_BIT) #define ADS7846_MEASURE_Y (0x1<<ADS7846_ADDR_BIT) #define ADS7846_MEASURE_Z1 (0x3<<ADS7846_ADDR_BIT) #define ADS7846_MEASURE_Z2 (0x4<<ADS7846_ADDR_BIT) #define ADS7846_8BITS (1<<3) #define ADS7846_12BITS 0 #define ADS7846_SER (1<<2) #define ADS7846_DFR 0 #define ADS7846_PWR_BIT 0 #define ADS7846_PD 0 #define ADS7846_ADC_ON (0x1<<ADS7846_PWR_BIT) #define ADS7846_REF_ON (0x2<<ADS7846_PWR_BIT) #define ADS7846_REF_ADC_ON (0x3<<ADS7846_PWR_BIT) #define MEASURE_12BIT_X \ (ADS7846_MEASURE_X | ADS7846_12BITS | ADS7846_DFR | ADS7846_PD) #define MEASURE_12BIT_Y \ (ADS7846_MEASURE_Y | ADS7846_12BITS | ADS7846_DFR | ADS7846_PD) #define MEASURE_12BIT_Z1 \ (ADS7846_MEASURE_Z1 | ADS7846_12BITS | ADS7846_DFR | ADS7846_PD) #define MEASURE_12BIT_Z2 \ (ADS7846_MEASURE_Z2 | ADS7846_12BITS | ADS7846_DFR | ADS7846_PD) typedef enum { IDLE = 0, ACQ_X, ACQ_Y, ACQ_Z1, ACQ_Z2 } acq_state_t; /* +++++++++++++ Lifted from include/linux/h3600_ts.h ++++++++++++++*/ typedef struct { unsigned short pressure; // touch pressure unsigned short x; // calibrated X unsigned short y; // calibrated Y unsigned short millisecs; // timestamp of this event } TS_EVENT; typedef struct { int xscale; int xtrans; int yscale; int ytrans; int xyswap; } TS_CAL; /* Use 'f' as magic number */ #define IOC_MAGIC 'f' #define TS_GET_RATE _IO(IOC_MAGIC, 8) #define TS_SET_RATE _IO(IOC_MAGIC, 9) #define TS_GET_CAL _IOR(IOC_MAGIC, 10, TS_CAL) #define TS_SET_CAL _IOW(IOC_MAGIC, 11, TS_CAL) /* +++++++++++++ Done lifted from include/linux/h3600_ts.h +++++++++*/ #define EVENT_BUFSIZE 128 /* * Which pressure equation to use from ADS7846 datasheet. * The first equation requires knowing only the X plate * resistance, but needs 4 measurements (X, Y, Z1, Z2). * The second equation requires knowing both X and Y plate * resistance, but only needs 3 measurements (X, Y, Z1). * The second equation is preferred because of the shorter * acquisition time required. */ enum { PRESSURE_EQN_1 = 0, PRESSURE_EQN_2 }; /* * The touch screen's X and Y plate resistances, used by * pressure equations. */ #define DEFAULT_X_PLATE_OHMS 580 #define DEFAULT_Y_PLATE_OHMS 580 /* * Pen up/down pressure resistance thresholds. * * FIXME: these are bogus and will have to be found empirically. * * These are hysteresis points. If pen state is up and pressure * is greater than pen-down threshold, pen transitions to down. * If pen state is down and pressure is less than pen-up threshold, * pen transitions to up. If pressure is in-between, pen status * doesn't change. * * This wouldn't be needed if PENIRQ* from the ADS7846 were * routed to an interrupt line on the Au1000. This would issue * an interrupt when the panel is touched. */ #define DEFAULT_PENDOWN_THRESH_OHMS 100 #define DEFAULT_PENUP_THRESH_OHMS 80 typedef struct { int baudrate; u32 clkdiv; acq_state_t acq_state; // State of acquisition state machine int x_raw, y_raw, z1_raw, z2_raw; // The current raw acquisition values TS_CAL cal; // Calibration values // The X and Y plate resistance, needed to calculate pressure int x_plate_ohms, y_plate_ohms; // pressure resistance at which pen is considered down/up int pendown_thresh_ohms; int penup_thresh_ohms; int pressure_eqn; // eqn to use for pressure calc int pendown; // 1 = pen is down, 0 = pen is up TS_EVENT event_buf[EVENT_BUFSIZE];// The event queue int nextIn, nextOut; int event_count; struct fasync_struct *fasync; // asynch notification struct timer_list acq_timer; // Timer for triggering acquisitions wait_queue_head_t wait; // read wait queue spinlock_t lock; struct tq_struct chug_tq; } au1000_ts_t; static au1000_ts_t au1000_ts; static inline u32 calc_clkdiv(int baud) { u32 sys_busclk = (get_au1000_speed() / (int)(inl(PM_POWERUP_CONTROL)&0x03) + 2); return (sys_busclk / (2 * baud)) - 1; } static inline int calc_baudrate(u32 clkdiv) { u32 sys_busclk = (get_au1000_speed() / (int)(inl(PM_POWERUP_CONTROL)&0x03) + 2); return sys_busclk / (2 * (clkdiv + 1)); } /* * This is a bottom-half handler that is scheduled after * raw X,Y,Z1,Z2 coordinates have been acquired, and does * the following: * * - computes touch screen pressure resistance * - if pressure is above a threshold considered to be pen-down: * - compute calibrated X and Y coordinates * - queue a new TS_EVENT * - signal asynchronously and wake up any read */ static void chug_raw_data(void* private) { au1000_ts_t* ts = (au1000_ts_t*)private; TS_EVENT event; int Rt, Xcal, Ycal; unsigned long flags; // timestamp this new event. event.millisecs = jiffies; // Calculate touch pressure resistance if (ts->pressure_eqn == PRESSURE_EQN_2) { Rt = (ts->x_plate_ohms * ts->x_raw * (4096 - ts->z1_raw)) / ts->z1_raw; Rt -= (ts->y_plate_ohms * ts->y_raw); Rt = (Rt + 2048) >> 12; // round up to nearest ohm } else { Rt = (ts->x_plate_ohms * ts->x_raw * (ts->z2_raw - ts->z1_raw)) / ts->z1_raw; Rt = (Rt + 2048) >> 12; // round up to nearest ohm } // hysteresis if (!ts->pendown && Rt > ts->pendown_thresh_ohms) ts->pendown = 1; else if (ts->pendown && Rt < ts->penup_thresh_ohms) ts->pendown = 0; if (ts->pendown) { // Pen is down // Calculate calibrated X,Y Xcal = ((ts->cal.xscale * ts->x_raw) >> 8) + ts->cal.xtrans; Ycal = ((ts->cal.yscale * ts->y_raw) >> 8) + ts->cal.ytrans; event.x = (unsigned short)Xcal; event.y = (unsigned short)Ycal; event.pressure = (unsigned short)Rt; // add this event to the event queue spin_lock_irqsave(&ts->lock, flags); ts->event_buf[ts->nextIn++] = event; if (ts->nextIn == EVENT_BUFSIZE) ts->nextIn = 0; if (ts->event_count < EVENT_BUFSIZE) { ts->event_count++; } else { // throw out the oldest event if (++ts->nextOut == EVENT_BUFSIZE) ts->nextOut = 0; } spin_unlock_irqrestore(&ts->lock, flags); // async notify if (ts->fasync) kill_fasync(&ts->fasync, SIGIO, POLL_IN); // wake up any read call if (waitqueue_active(&ts->wait)) wake_up_interruptible(&ts->wait); } } /* * Raw X,Y,pressure acquisition timer function. This triggers * the start of a new acquisition. Its duration between calls * is the touch screen polling rate. */ static void au1000_acq_timer(unsigned long data) { au1000_ts_t* ts = (au1000_ts_t*)data; unsigned long flags; spin_lock_irqsave(&ts->lock, flags); // start acquisition with X coordinate ts->acq_state = ACQ_X; // start me up outl(SSIADAT_D | (MEASURE_12BIT_X << SSIADAT_ADDR_BIT), SSI0_ADATA); // schedule next acquire ts->acq_timer.expires = jiffies + HZ / 100; add_timer(&ts->acq_timer); spin_unlock_irqrestore(&ts->lock, flags); } static void ssi0_interrupt(int irq, void *dev_id, struct pt_regs *regs) { au1000_ts_t *ts = (au1000_ts_t*)dev_id; u32 stat, int_stat, data; spin_lock(&ts->lock); stat = inl(SSI0_STATUS); // clear sticky status bits outl(stat & (SSISTAT_OF|SSISTAT_UF|SSISTAT_DONE), SSI0_STATUS); int_stat = inl(SSI0_INT); // clear sticky intr status bits outl(int_stat & (SSIINT_OI|SSIINT_UI|SSIINT_DI), SSI0_INT); if ((int_stat & (SSIINT_OI|SSIINT_UI|SSIINT_DI)) != SSIINT_DI) { if (int_stat & SSIINT_OI) err("overflow"); if (int_stat & SSIINT_UI) err("underflow"); spin_unlock(&ts->lock); return; } data = inl(SSI0_ADATA) & SSIADAT_DATA_MASK; switch (ts->acq_state) { case IDLE: break; case ACQ_X: ts->x_raw = data; ts->acq_state = ACQ_Y; // trigger Y acq outl(SSIADAT_D | (MEASURE_12BIT_Y << SSIADAT_ADDR_BIT), SSI0_ADATA); break; case ACQ_Y: ts->y_raw = data; ts->acq_state = ACQ_Z1; // trigger Z1 acq outl(SSIADAT_D | (MEASURE_12BIT_Z1 << SSIADAT_ADDR_BIT), SSI0_ADATA); break; case ACQ_Z1: ts->z1_raw = data; if (ts->pressure_eqn == PRESSURE_EQN_2) { // don't acq Z2, using 2nd eqn for touch pressure ts->acq_state = IDLE; // got the raw stuff, now mark BH queue_task(&ts->chug_tq, &tq_immediate); mark_bh(IMMEDIATE_BH); } else { ts->acq_state = ACQ_Z2; // trigger Z2 acq outl(SSIADAT_D | (MEASURE_12BIT_Z2<<SSIADAT_ADDR_BIT), SSI0_ADATA); } break; case ACQ_Z2: ts->z2_raw = data; ts->acq_state = IDLE; // got the raw stuff, now mark BH queue_task(&ts->chug_tq, &tq_immediate); mark_bh(IMMEDIATE_BH); break; } spin_unlock(&ts->lock); } /* +++++++++++++ File operations ++++++++++++++*/ static int au1000_fasync(int fd, struct file *filp, int mode) { au1000_ts_t* ts = (au1000_ts_t*)filp->private_data; return fasync_helper(fd, filp, mode, &ts->fasync); } static int au1000_ioctl(struct inode * inode, struct file *filp, unsigned int cmd, unsigned long arg) { au1000_ts_t* ts = (au1000_ts_t*)filp->private_data; switch(cmd) { case TS_GET_RATE: /* TODO: what is this? */ break; case TS_SET_RATE: /* TODO: what is this? */ break; case TS_GET_CAL: copy_to_user((char *)arg, (char *)&ts->cal, sizeof(TS_CAL)); break; case TS_SET_CAL: copy_from_user((char *)&ts->cal, (char *)arg, sizeof(TS_CAL)); break; default: err("unknown cmd %04x", cmd); return -EINVAL; } return 0; } static unsigned int au1000_poll(struct file * filp, poll_table * wait) { au1000_ts_t* ts = (au1000_ts_t*)filp->private_data; poll_wait(filp, &ts->wait, wait); if (ts->event_count) return POLLIN | POLLRDNORM; return 0; } static ssize_t au1000_read(struct file * filp, char * buf, size_t count, loff_t * l) { au1000_ts_t* ts = (au1000_ts_t*)filp->private_data; unsigned long flags; TS_EVENT event; int i; if (ts->event_count == 0) { if (filp->f_flags & O_NONBLOCK) return -EAGAIN; interruptible_sleep_on(&ts->wait); if (signal_pending(current)) return -ERESTARTSYS; } for (i = count; i >= sizeof(TS_EVENT); i -= sizeof(TS_EVENT), buf += sizeof(TS_EVENT)) { if (ts->event_count == 0) break; spin_lock_irqsave(&ts->lock, flags); event = ts->event_buf[ts->nextOut++]; if (ts->nextOut == EVENT_BUFSIZE) ts->nextOut = 0; if (ts->event_count) ts->event_count--; spin_unlock_irqrestore(&ts->lock, flags); copy_to_user(buf, &event, sizeof(TS_EVENT)); } return count - i; } static int au1000_open(struct inode * inode, struct file * filp) { au1000_ts_t* ts; unsigned long flags; filp->private_data = ts = &au1000_ts; spin_lock_irqsave(&ts->lock, flags); // setup SSI0 config outl(DEFAULT_SSI_CONFIG, SSI0_CONFIG); // clear out SSI0 status bits outl(SSISTAT_OF|SSISTAT_UF|SSISTAT_DONE, SSI0_STATUS); // clear out SSI0 interrupt pending bits outl(SSIINT_OI|SSIINT_UI|SSIINT_DI, SSI0_INT); // enable SSI0 interrupts outl(SSIINT_OI|SSIINT_UI|SSIINT_DI, SSI0_INT_ENABLE); /* * init bh handler that chugs the raw data (calibrates and * calculates touch pressure). */ ts->chug_tq.routine = chug_raw_data; ts->chug_tq.data = ts; ts->pendown = 0; // pen up // flush event queue ts->nextIn = ts->nextOut = ts->event_count = 0; // Start acquisition timer function init_timer(&ts->acq_timer); ts->acq_timer.function = au1000_acq_timer; ts->acq_timer.data = (unsigned long)ts; ts->acq_timer.expires = jiffies + HZ / 100; add_timer(&ts->acq_timer); spin_unlock_irqrestore(&ts->lock, flags); MOD_INC_USE_COUNT; return 0; } static int au1000_release(struct inode * inode, struct file * filp) { au1000_ts_t* ts = (au1000_ts_t*)filp->private_data; unsigned long flags; au1000_fasync(-1, filp, 0); del_timer_sync(&ts->acq_timer); spin_lock_irqsave(&ts->lock, flags); // disable SSI0 interrupts outl(0, SSI0_INT_ENABLE); spin_unlock_irqrestore(&ts->lock, flags); MOD_DEC_USE_COUNT; return 0; } static struct file_operations ts_fops = { read: au1000_read, poll: au1000_poll, ioctl: au1000_ioctl, fasync: au1000_fasync, open: au1000_open, release: au1000_release, }; /* +++++++++++++ End File operations ++++++++++++++*/ int __init au1000ts_init_module(void) { au1000_ts_t* ts = &au1000_ts; int ret; /* register our character device */ if ((ret = register_chrdev(TS_MAJOR, TS_NAME, &ts_fops)) < 0) { err("can't get major number"); return ret; } info("registered"); memset(ts, 0, sizeof(au1000_ts_t)); init_waitqueue_head(&ts->wait); spin_lock_init(&ts->lock); if (!request_region(virt_to_phys((void*)SSI0_STATUS), 0x100, TS_NAME)) { err("SSI0 ports in use"); return -ENXIO; } if ((ret = request_irq(AU1000_SSI0_INT, ssi0_interrupt, SA_SHIRQ | SA_INTERRUPT, TS_NAME, ts))) { err("could not get IRQ"); return ret; } // initial calibration values ts->cal.xscale = -93; ts->cal.xtrans = 346; ts->cal.yscale = -64; ts->cal.ytrans = 251; // init pen up/down hysteresis points ts->pendown_thresh_ohms = DEFAULT_PENDOWN_THRESH_OHMS; ts->penup_thresh_ohms = DEFAULT_PENUP_THRESH_OHMS; ts->pressure_eqn = PRESSURE_EQN_2; // init X and Y plate resistances ts->x_plate_ohms = DEFAULT_X_PLATE_OHMS; ts->y_plate_ohms = DEFAULT_Y_PLATE_OHMS; // set GPIO to SSI0 function outl(inl(PIN_FUNCTION) & ~1, PIN_FUNCTION); // enable SSI0 clock and bring SSI0 out of reset outl(0, SSI0_CONTROL); udelay(1000); outl(SSIEN_E, SSI0_CONTROL); udelay(100); // FIXME: is this a working baudrate? ts->clkdiv = 0; ts->baudrate = calc_baudrate(ts->clkdiv); outl(ts->clkdiv, SSI0_CLKDIV); info("baudrate = %d Hz", ts->baudrate); return 0; } void au1000ts_cleanup_module(void) { // disable clocks and hold in reset outl(SSIEN_CD, SSI0_CONTROL); free_irq(AU1000_SSI0_INT, &au1000_ts); release_region(virt_to_phys((void*)SSI0_STATUS), 0x100); unregister_chrdev(TS_MAJOR, TS_NAME); } /* Module information */ MODULE_AUTHOR("Steve Longerbeam, st...@mv..., www.mvista.com"); MODULE_DESCRIPTION("Au1000/ADS7846 Touch Screen Driver"); module_init(au1000ts_init_module); module_exit(au1000ts_cleanup_module); Index: Config.in =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/char/Config.in,v retrieving revision 1.7 retrieving revision 1.8 diff -u -d -r1.7 -r1.8 --- Config.in 2001/09/25 03:36:35 1.7 +++ Config.in 2001/10/10 21:56:15 1.8 @@ -212,6 +212,10 @@ if [ "$CONFIG_HOTPLUG" = "y" -a "$CONFIG_PCMCIA" != "n" ]; then source drivers/char/pcmcia/Config.in fi +if [ "$CONFIG_MIPS_AU1000" = "y" ]; then + tristate ' Alchemy Au1000 GPIO device support' CONFIG_AU1000_GPIO + tristate ' Au1000/ADS7846 touchscreen support' CONFIG_TS_AU1000_ADS7846 +fi if [ "$CONFIG_MIPS_ITE8172" = "y" ]; then tristate ' ITE GPIO' CONFIG_ITE_GPIO fi Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/char/Makefile,v retrieving revision 1.9 retrieving revision 1.10 diff -u -d -r1.9 -r1.10 --- Makefile 2001/09/25 19:57:07 1.9 +++ Makefile 2001/10/10 21:56:15 1.10 @@ -23,7 +23,7 @@ export-objs := busmouse.o console.o keyboard.o sysrq.o \ misc.o pty.o random.o selection.o serial.o \ - sonypi.o tty_io.o tty_ioctl.o + sonypi.o tty_io.o tty_ioctl.o au1000_gpio.o mod-subdirs := joystick ftape drm pcmcia @@ -147,6 +147,7 @@ obj-$(CONFIG_SERIAL_21285) += serial_21285.o obj-$(CONFIG_SERIAL_SA1100) += serial_sa1100.o obj-$(CONFIG_SERIAL_AMBA) += serial_amba.o +obj-$(CONFIG_TS_AU1000_ADS7846) += au1000_ts.o ifndef CONFIG_SUN_KEYBOARD obj-$(CONFIG_VT) += keyboard.o $(KEYMAP) $(KEYBD) @@ -213,6 +214,7 @@ obj-$(CONFIG_DS1620) += ds1620.o obj-$(CONFIG_INTEL_RNG) += i810_rng.o obj-$(CONFIG_ITE_GPIO) += ite_gpio.o +obj-$(CONFIG_AU1000_GPIO) += au1000_gpio.o obj-$(CONFIG_COBALT_LCD) += lcd.o obj-$(CONFIG_QIC02_TAPE) += tpqic02.o |
From: Pete P. <pp...@us...> - 2001-10-10 19:21:15
|
Update of /cvsroot/linux-mips/linux/arch/mips/au1000/pb1000 In directory usw-pr-cvs1:/tmp/cvs-serv23851/arch/mips/au1000/pb1000 Modified Files: setup.c Log Message: Epson 1356 fb driver update from MontaVista's source tree. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/pb1000/setup.c,v retrieving revision 1.10 retrieving revision 1.11 diff -u -d -r1.10 -r1.11 --- setup.c 2001/10/03 23:04:23 1.10 +++ setup.c 2001/10/10 19:21:06 1.11 @@ -160,9 +160,12 @@ outl(0x0030, OUTPUT_STATE_CLEAR); #endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1000_USB_DEVICE) - /* make gpio 15 an input (interrupt line) */ + /* select gpio 15 (for interrupt line) */ pin_func = inl(PIN_FUNCTION) & (u32)(~0x100); + /* we don't need I2S, so make it available for GPIO[31:29] */ + pin_func |= (1<<5); outl(pin_func, PIN_FUNCTION); + outl(0x8000, TSTATE_STATE_SET); #ifdef CONFIG_FB |
From: Pete P. <pp...@us...> - 2001-10-10 19:21:15
|
Update of /cvsroot/linux-mips/linux/drivers/video In directory usw-pr-cvs1:/tmp/cvs-serv23851/drivers/video Modified Files: epson1356fb.c epson1356fb.h Log Message: Epson 1356 fb driver update from MontaVista's source tree. Index: epson1356fb.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/video/epson1356fb.c,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- epson1356fb.c 2001/09/12 22:23:31 1.5 +++ epson1356fb.c 2001/10/10 19:21:06 1.6 @@ -197,47 +197,6 @@ fb_mmap: e1356fb_mmap, }; - -static struct fb_videomode __initdata panel_default_mode[] = { - { - /* 640x480 @ ?? Hz */ - NULL, 60, 640, 480, -1, 32, 10, 1, 1, 22, 1, - 0, FB_VMODE_NONINTERLACED - }, { - /* 800x600 @ ?? Hz */ - NULL, 60, 800, 600, -1, 32, 10, 1, 1, 22, 1, - 0, FB_VMODE_NONINTERLACED - } -}; -static struct fb_videomode __initdata crt_default_mode[] = { - { - /* 640x480 @ ?? Hz */ - NULL, 85, 640, 480, -1, 96, 32, 23, 1, 64, 5, - 0, FB_VMODE_NONINTERLACED - }, { - /* 800x600 @ ?? Hz */ - NULL, 60, 800, 600, -1, 88, 40, 23, 1, 128, 4, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, - FB_VMODE_NONINTERLACED - } -}; -static struct fb_videomode __initdata ntsc_default_mode[] = { - { - /* 640x480 @ 62 Hz, requires flicker filter */ - //NULL, 62, 640, 480, 34921, 213, 57, 20, 2, 0, 0, - NULL, 62, 640, 480, 34921, 200, 70, 15, 7, 0, 0, - 0, FB_VMODE_NONINTERLACED - } -}; -static struct fb_videomode __initdata pal_default_mode[] = { - { - /* 640x480 @ 56 Hz, requires flicker filter */ - NULL, 56, 640, 480, 28194, 350, 145, 49, 23, 0, 0, - 0, FB_VMODE_NONINTERLACED - } -}; - - #define PCI_VENDOR_ID_EPSON 0x10f4 #define PCI_DEVICE_ID_EPSON_SDU1356 0x1300 @@ -291,6 +250,141 @@ return timeout; } + +static struct fb_videomode panel_modedb[] = { + { + /* 320x240 @ 109 Hz, 33.3 kHz hsync */ + NULL, 109, 320, 240, KHZ2PICOS(MAX_PIXCLOCK/3), + 16, 16, 32, 24, 48, 8, + 0, FB_VMODE_NONINTERLACED + }, { + /* 640x480 @ 84 Hz, 48.1 kHz hsync */ + NULL, 84, 640, 480, KHZ2PICOS(MAX_PIXCLOCK/1), + 96, 32, 32, 48, 64, 8, + 0, FB_VMODE_NONINTERLACED + }, { + /* 800x600 @ 76 Hz, 46.3 kHz hsync */ + NULL, 76, 800, 600, KHZ2PICOS(MAX_PIXCLOCK/1), + 32, 10, 1, 1, 22, 1, + 0, FB_VMODE_NONINTERLACED + } +}; +static struct fb_videomode crt_modedb[] = { + { + /* 320x240 @ 84 Hz, 31.25 kHz hsync */ + NULL, 84, 320, 240, KHZ2PICOS(MAX_PIXCLOCK/2), + 128, 128, 60, 60, 64, 8, + 0, FB_VMODE_NONINTERLACED + }, { + /* 320x240 @ 109 Hz, 33.3 kHz hsync */ + NULL, 109, 320, 240, KHZ2PICOS(MAX_PIXCLOCK/3), + 16, 16, 32, 24, 48, 8, + 0, FB_VMODE_NONINTERLACED + }, { + /* 512x384 @ 77 Hz, 31.25 kHz hsync */ + NULL, 77, 512, 384, KHZ2PICOS(MAX_PIXCLOCK/2), + 48, 16, 16, 1, 64, 3, + 0, FB_VMODE_NONINTERLACED + }, { + /* 640x400 @ 88 Hz, 43.1 kHz hsync */ + NULL, 88, 640, 400, KHZ2PICOS(MAX_PIXCLOCK/1), + 128, 96, 32, 48, 64, 8, + 0, FB_VMODE_NONINTERLACED + }, { + /* 640x480 @ 84 Hz, 48.1 kHz hsync */ + NULL, 84, 640, 480, KHZ2PICOS(MAX_PIXCLOCK/1), + 96, 32, 32, 48, 64, 8, + 0, FB_VMODE_NONINTERLACED + }, { + /* 768x576 @ 62 Hz, 38.5 kHz hsync */ + NULL, 62, 768, 576, KHZ2PICOS(MAX_PIXCLOCK/1), + 144, 16, 28, 6, 112, 4, + 0, FB_VMODE_NONINTERLACED + }, { + /* 800x600 @ 60 Hz, 37.9 kHz hsync */ + NULL, 60, 800, 600, KHZ2PICOS(MAX_PIXCLOCK/1), + 88, 40, 23, 1, 128, 4, + FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED + } +}; + +static struct fb_videomode ntsc_modedb[] = { + { + /* 640x480 @ 62 Hz, requires flicker filter */ + //NULL, 62, 640, 480, 34921, 213, 57, 20, 2, 0, 0, + NULL, 62, 640, 480, KHZ2PICOS(2*NTSC_PIXCLOCK), + 200, 70, 15, 7, 0, 0, + FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED + } +}; +static struct fb_videomode pal_modedb[] = { + { + /* 640x480 @ 56 Hz, requires flicker filter */ + NULL, 56, 640, 480, KHZ2PICOS(2*PAL_PIXCLOCK), + 350, 145, 49, 23, 0, 0, + FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED + } +}; + + +static inline void +fb_videomode_to_var(struct fb_videomode* mode, + struct fb_var_screeninfo*var) +{ + var->xres = mode->xres; + var->yres = mode->yres; + var->pixclock = mode->pixclock; + var->left_margin = mode->left_margin; + var->right_margin = mode->right_margin; + var->upper_margin = mode->upper_margin; + var->lower_margin = mode->lower_margin; + var->hsync_len = mode->hsync_len; + var->vsync_len = mode->vsync_len; + var->sync = mode->sync; + var->vmode = mode->vmode; +} + + +static int +e1356fb_get_mode(const struct fb_info_e1356 *info, + int xres, + int yres, + struct fb_videomode ** modedb, + struct fb_videomode ** mode) +{ + struct fb_videomode * ret; + int i, dbsize; + + if (IS_PANEL(info->fix.disp_type)) { + ret = panel_modedb; + dbsize = sizeof(panel_modedb)/sizeof(struct fb_videomode); + } else if (info->fix.disp_type == DISP_TYPE_CRT) { + ret = crt_modedb; + dbsize = sizeof(crt_modedb)/sizeof(struct fb_videomode); + } else if (info->fix.disp_type == DISP_TYPE_NTSC) { + ret = ntsc_modedb; + dbsize = sizeof(ntsc_modedb)/sizeof(struct fb_videomode); + } else { + ret = pal_modedb; + dbsize = sizeof(pal_modedb)/sizeof(struct fb_videomode); + } + + if (modedb) + *modedb = ret; + for (i=0; i<dbsize; i++) { + if (xres == ret[i].xres && yres == ret[i].yres) { + *mode = &ret[i]; + break; + } + } + if (i == dbsize) + return -EINVAL; + return dbsize; +} + + + #ifdef E1356FB_VERBOSE_DEBUG static void dump_par(const struct e1356fb_par* par) @@ -355,9 +449,10 @@ #endif // E1356FB_VERBOSE_DEBUG + // Input: ipclk->clksrc, ipclk->pixclk_d // Output: ipclk->pixclk, ipclk->error, and ipclk->divisor -static void +static int get_nearest_pixclk_div(pixclock_info_t* ipclk, int x2) { int pixclk_d = ipclk->pixclk_d; @@ -365,17 +460,20 @@ if (x2) clksrc *= 2; - if (clksrc < ((3*pixclk_d)+1)/2) + if (clksrc < (3*pixclk_d+1)/2) ipclk->divisor = 1; - else if (clksrc < ((5*pixclk_d)+1)/2) + else if (clksrc < (5*pixclk_d+1)/2) ipclk->divisor = 2; - else if (clksrc < ((7*pixclk_d)+1)/2) + else if (clksrc < (7*pixclk_d+1)/2) ipclk->divisor = 3; - else + else if (clksrc < (9*pixclk_d+1)/2) ipclk->divisor = 4; + else + return -ENXIO; ipclk->pixclk = clksrc / ipclk->divisor; - ipclk->error = (100*abs(pixclk_d - (ipclk->pixclk))) / pixclk_d; + ipclk->error = (100*(pixclk_d - ipclk->pixclk)) / pixclk_d; + return 0; } static int @@ -390,40 +488,41 @@ test.pixclk_d = ipclk->pixclk_d; ret.error = 100; - + if (IS_TV(info->fix.disp_type) && (info->fix.tv_filt & TV_FILT_FLICKER)) flicker_mult = 0x80; test.clksrc = info->fix.busclk; - get_nearest_pixclk_div(&test, flicker_mult != 0); - if (test.error <= MAX_PCLK_PERCENT_ERROR && test.error < ret.error) { + if (get_nearest_pixclk_div(&test, flicker_mult != 0) == 0 && + abs(test.error) < abs(ret.error)) { ret = test; src_sel = 0x01; } test.clksrc = info->fix.mclk; - get_nearest_pixclk_div(&test, flicker_mult != 0); - if (test.error <= MAX_PCLK_PERCENT_ERROR && test.error < ret.error) { + if (get_nearest_pixclk_div(&test, flicker_mult != 0) == 0 && + abs(test.error) < abs(ret.error)) { ret = test; src_sel = 0x03; } test.clksrc = info->fix.clki; - get_nearest_pixclk_div(&test, flicker_mult != 0); - if (test.error <= MAX_PCLK_PERCENT_ERROR && test.error < ret.error) { + if (get_nearest_pixclk_div(&test, flicker_mult != 0) == 0 && + abs(test.error) < abs(ret.error)) { ret = test; src_sel = 0x00; } test.clksrc = info->fix.clki2; - get_nearest_pixclk_div(&test, flicker_mult != 0); - if (test.error <= MAX_PCLK_PERCENT_ERROR && test.error < ret.error) { + if (get_nearest_pixclk_div(&test, flicker_mult != 0) == 0 && + abs(test.error) < abs(ret.error)) { ret = test; src_sel = 0x02; } - if (ret.error == 100) + if (ret.error > MAX_PCLK_ERROR_LOWER || + ret.error < MAX_PCLK_ERROR_HIGHER) return -ENXIO; ret.pixclk_bits = flicker_mult | ((ret.divisor-1)<<4) | src_sel; @@ -1243,11 +1342,10 @@ u8 main_display_mode=0; u16 height, addr_offset; int disp_type = info->fix.disp_type; - int hsync = (1000 * par->ipclk.pixclk) / (par->width + par->horiz_ndp); DPRINTK("%dx%d-%dbpp @ %d Hz, %d kHz hsync\n", par->width, par->height, par->bpp, - hsync / (par->height + par->vert_ndp), (((2*hsync)/1000)+1)/2); + par->vsync_freq, (((2*par->hsync_freq)/1000)+1)/2); #ifdef E1356FB_VERBOSE_DEBUG dump_par(par); #endif @@ -1367,63 +1465,60 @@ static int -e1356fb_verify_par(struct e1356fb_par* par, - const struct fb_info_e1356* info) +e1356fb_verify_timing(struct e1356fb_par* par, + const struct fb_info_e1356* info) { int disp_type = info->fix.disp_type; - int tv_pixclk; - - if (par->bpp != 8 && par->bpp != 16) { - DPRINTK("depth not supported: %u\n", par->bpp); - return -EINVAL; - } - - if (par->width > par->width_virt) { - DPRINTK("virtual x resolution < physical x resolution not possible\n"); - return -EINVAL; - } - - if (par->height > par->height_virt) { - DPRINTK("virtual y resolution < physical y resolution not possible\n"); - return -EINVAL; - } - - if (par->width < 320 || par->width > 2048) { - DPRINTK("width not supported: %u\n", par->width); - return -EINVAL; - } - if ((disp_type == DISP_TYPE_LCD && (par->width % 16)) || - (disp_type == DISP_TYPE_TFT && (par->width % 8))) { - DPRINTK("invalid width for panel type: %u\n", par->width); + // timing boundary checks + if (par->horiz_ndp > max_hndp[disp_type]) { + DPRINTK("horiz_ndp too big: %d\n", par->horiz_ndp); return -EINVAL; } - - if (par->height < 200 || par->height > 2048) { - DPRINTK("height not supported: %u\n", par->height); + if (par->vert_ndp > max_vndp[disp_type]) { + DPRINTK("vert_ndp too big: %d\n", par->vert_ndp); return -EINVAL; } - if (par->width_virt * par->height_virt * par->Bpp > - info->fb_size) { - DPRINTK("not enough memory for virtual screen (%ux%ux%u)\n", - par->width_virt, par->height_virt, par->bpp); - return -EINVAL; + if (disp_type != DISP_TYPE_LCD) { + if (par->hsync_start > + max_hsync_start[(par->bpp==16)][disp_type]) { + DPRINTK("hsync_start too big: %d\n", + par->hsync_start); + return -EINVAL; + } + if (par->vsync_start > max_vsync_start[disp_type]) { + DPRINTK("vsync_start too big: %d\n", + par->vsync_start); + return -EINVAL; + } + if (!IS_TV(disp_type)) { + if (par->hsync_width > max_hsync_width[disp_type]) { + DPRINTK("hsync_width too big: %d\n", + par->hsync_width); + return -EINVAL; + } + if (par->vsync_width > max_vsync_width[disp_type]) { + DPRINTK("vsync_width too big: %d\n", + par->vsync_width); + return -EINVAL; + } + } } if (IS_TV(disp_type)) { - tv_pixclk = (disp_type == DISP_TYPE_NTSC) ? + int tv_pixclk = (disp_type == DISP_TYPE_NTSC) ? NTSC_PIXCLOCK : PAL_PIXCLOCK; if (info->fix.tv_filt & TV_FILT_FLICKER) tv_pixclk *= 2; - + if (par->ipclk.pixclk_d != tv_pixclk) { DPRINTK("invalid TV pixel clock %u kHz\n", par->ipclk.pixclk_d); return -EINVAL; } } - + if (e1356_calc_pixclock(info, &par->ipclk) < 0) { DPRINTK("can't set pixel clock %u kHz\n", par->ipclk.pixclk_d); @@ -1435,7 +1530,6 @@ par->ipclk.pixclk_d, par->ipclk.pixclk, par->ipclk.error); #endif - // timing checks if (disp_type != DISP_TYPE_LCD) { if (par->horiz_ndp < par->hsync_start + par->hsync_width) { DPRINTK("invalid horiz. timing\n"); @@ -1460,9 +1554,73 @@ } } + par->hsync_freq = (1000 * par->ipclk.pixclk) / + (par->width + par->horiz_ndp); + par->vsync_freq = par->hsync_freq / (par->height + par->vert_ndp); + + if (par->hsync_freq < 30000 || par->hsync_freq > 90000) { + DPRINTK("hsync freq too %s: %u Hz\n", + par->hsync_freq < 30000 ? "low" : "high", + par->hsync_freq); + return -EINVAL; + } + if (par->vsync_freq < 50 || par->vsync_freq > 110) { + DPRINTK("vsync freq too %s: %u Hz\n", + par->vsync_freq < 50 ? "low" : "high", + par->vsync_freq); + return -EINVAL; + } + return 0; } +static int +e1356fb_verify_par(struct e1356fb_par* par, + const struct fb_info_e1356* info) +{ + int disp_type = info->fix.disp_type; + + if (par->bpp != 8 && par->bpp != 16) { + DPRINTK("depth not supported: %u bpp\n", par->bpp); + return -EINVAL; + } + + if (par->width > par->width_virt) { + DPRINTK("virtual x resolution < physical x resolution not possible\n"); + return -EINVAL; + } + + if (par->height > par->height_virt) { + DPRINTK("virtual y resolution < physical y resolution not possible\n"); + return -EINVAL; + } + + if (par->width < 320 || par->width > 1024) { + DPRINTK("width not supported: %u\n", par->width); + return -EINVAL; + } + + if ((disp_type == DISP_TYPE_LCD && (par->width % 16)) || + (disp_type == DISP_TYPE_TFT && (par->width % 8))) { + DPRINTK("invalid width for panel type: %u\n", par->width); + return -EINVAL; + } + + if (par->height < 200 || par->height > 1024) { + DPRINTK("height not supported: %u\n", par->height); + return -EINVAL; + } + + if (par->width_virt * par->height_virt * par->Bpp > + info->fb_size) { + DPRINTK("not enough memory for virtual screen (%ux%ux%u)\n", + par->width_virt, par->height_virt, par->bpp); + return -EINVAL; + } + + return e1356fb_verify_timing(par, info); +} + static int e1356fb_var_to_par(const struct fb_var_screeninfo* var, @@ -1485,14 +1643,15 @@ par->ipclk.pixclk_d = PICOS2KHZ(var->pixclock); - par->horiz_ndp = var->left_margin + var->right_margin + var->hsync_len; par->hsync_start = var->right_margin; par->hsync_width = var->hsync_len; - - par->vert_ndp = var->upper_margin + var->lower_margin + var->vsync_len; + par->vsync_start = var->lower_margin; par->vsync_width = var->vsync_len; + par->horiz_ndp = var->left_margin + var->right_margin + var->hsync_len; + par->vert_ndp = var->upper_margin + var->lower_margin + var->vsync_len; + par->hsync_pol = (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 1 : 0; par->vsync_pol = (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 1 : 0; @@ -1677,16 +1836,35 @@ int activate = var->activate; int j,k; - //DPRINTK("\n"); - + DPRINTK("\n"); + if (con >= 0) display = &fb_display[con]; else display = fb->disp; /* used during initialization */ - - if ((err = e1356fb_var_to_par(var, &par, info))) - return err; + if ((err = e1356fb_var_to_par(var, &par, info))) { + struct fb_videomode *dm; + /* + * this mode didn't pass the tests. Try the + * corresponding mode from our own modedb. + */ + DPRINTK("req mode failed, trying SED1356 %dx%d mode\n", + var->xres, var->yres); + if (e1356fb_get_mode(info, var->xres, + var->yres, NULL, &dm) < 0) { + DPRINTK("no SED1356 %dx%d mode found, failed\n", + var->xres, var->yres); + return err; + } + fb_videomode_to_var(dm, var); + if ((err = e1356fb_var_to_par(var, &par, info))) { + DPRINTK("SED1356 %dx%d mode failed\n", + var->xres, var->yres); + return err; + } + } + if (info->fix.tv_filt & TV_FILT_FLICKER) printk("e1356fb: TV flicker filter enabled\n"); @@ -2121,19 +2299,19 @@ // Find the highest allowable MCLK epfix->mclk = mclk_cfg = 0; - if (epfix->busclk <= 40000 && epfix->busclk > epfix->mclk) { + if (epfix->busclk <= MAX_PIXCLOCK && epfix->busclk > epfix->mclk) { epfix->mclk = epfix->busclk; mclk_cfg = 0x01; } - if (epfix->clki <= 40000 && epfix->clki > epfix->mclk) { + if (epfix->clki <= MAX_PIXCLOCK && epfix->clki > epfix->mclk) { epfix->mclk = epfix->clki; mclk_cfg = 0x00; } - if (epfix->busclk/2 <= 40000 && epfix->busclk/2 > epfix->mclk) { + if (epfix->busclk/2 <= MAX_PIXCLOCK && epfix->busclk/2 > epfix->mclk) { epfix->mclk = epfix->busclk/2; mclk_cfg = 0x11; } - if (epfix->clki/2 <= 40000 && epfix->clki/2 > epfix->mclk) { + if (epfix->clki/2 <= MAX_PIXCLOCK && epfix->clki/2 > epfix->mclk) { epfix->mclk = epfix->clki/2; mclk_cfg = 0x10; } @@ -2329,24 +2507,23 @@ * fb_find_mode. */ if (epfix->mode_option) { - struct fb_videomode* dm; - if (IS_PANEL(epfix->disp_type)) { - dm = &panel_default_mode[1]; - } else if (epfix->disp_type == DISP_TYPE_CRT) { - dm = &crt_default_mode[1]; - } else if (epfix->disp_type == DISP_TYPE_NTSC) { - dm = &ntsc_default_mode[0]; - } else { - dm = &pal_default_mode[0]; - } - // throw the max pixclock at it - dm->pixclock = KHZ2PICOS(fb_info.max_pixclock); - + struct fb_videomode* modedb, *dm; + int dbsize = e1356fb_get_mode(&fb_info, 640, 480, &modedb, &dm); + + // first try the generic modedb if (!fb_find_mode(&var, &fb_info.fb_info, epfix->mode_option, - NULL, 0, dm, boot_par.bpp)) { - printk("e1356fb: mode %s and default mode failed\n", + NULL, 0, NULL, boot_par.bpp)) { + printk("e1356fb: mode %s failed, trying e1356 modedb\n", epfix->mode_option); - goto ret_enxio; + // didn't work in generic modedb, try ours + if (!fb_find_mode(&var, &fb_info.fb_info, + epfix->mode_option, + modedb, dbsize, dm, boot_par.bpp)) { + printk("e1356fb: mode %s failed e1356 modedb too, sorry\n", + epfix->mode_option); + + goto ret_enxio; + } } var.xres_virtual = boot_par.width_virt ? @@ -2795,7 +2972,6 @@ h = fb_info.cursor.h; w = fb_info.cursor.w; - DPRINTK("w=%d\n", w); u = fb_info.cursor.u; memcursor = fb_info.membase_virt + fb_info.fb_size; Index: epson1356fb.h =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/video/epson1356fb.h,v retrieving revision 1.4 retrieving revision 1.5 diff -u -d -r1.4 -r1.5 --- epson1356fb.h 2001/09/12 22:23:31 1.4 +++ epson1356fb.h 2001/10/10 19:21:06 1.5 @@ -27,7 +27,7 @@ */ #ifdef E1356FB_DEBUG -#define DPRINTK(a,b...) printk(KERN_INFO "e1356fb: %s: " a, __FUNCTION__ , ## b) +#define DPRINTK(a,b...) printk(KERN_DEBUG "e1356fb: %s: " a, __FUNCTION__ , ## b) #else #define DPRINTK(a,b...) #endif @@ -37,14 +37,17 @@ #define PICOS2KHZ(a) (1000000000UL/(a)) #define KHZ2PICOS(a) (1000000000UL/(a)) +#define MAX_PIXCLOCK 40000 // KHz #define NTSC_PIXCLOCK 14318 // KHz #define PAL_PIXCLOCK 17734 // KHz /* - * Maximum percent error between desired pixel clock and - * supported pixel clock. + * Maximum percent errors between desired pixel clock and + * supported pixel clock. Lower-than and higher-than desired + * clock percent errors. */ -#define MAX_PCLK_PERCENT_ERROR 10 +#define MAX_PCLK_ERROR_LOWER 10 +#define MAX_PCLK_ERROR_HIGHER -1 #define fontwidth_x8(p) (((fontwidth(p) + 7) >> 3) << 3) @@ -278,6 +281,22 @@ DISP_TYPE_NTSC }; +/* + * Maximum timing values, as determined by the SED1356 register + * field sizes. All are indexed by display type, except + * max_hsync_start which is first indexed by color depth, + * then by display type. + */ +static const int max_hndp[5] = {256, 256, 512, 511, 510}; +static const int max_hsync_start[2][5] = { + {0, 252, 507, 505, 505}, // 8 bpp + {0, 254, 509, 507, 507} // 16 bpp +}; +static const int max_hsync_width[5] = {0, 128, 128, 0, 0}; +static const int max_vndp[5] = {64, 64, 128, 128, 128}; +static const int max_vsync_start[5] = {0, 64, 128, 128, 128}; +static const int max_vsync_width[5] = {0, 8, 8, 0, 0}; + #define IS_PANEL(disp_type) \ (disp_type == DISP_TYPE_LCD || disp_type == DISP_TYPE_TFT) #define IS_CRT(disp_type) (disp_type == DISP_TYPE_CRT) @@ -363,10 +382,12 @@ // FPLINE for TFT). 0=active lo, 1=active hi int hsync_start; // Horiz. Sync Start position, pixels int hsync_width; // Horiz. Sync Pulse width, pixels + int hsync_freq; // calculated horizontal sync frequency int vsync_pol; // Polarity of vert. sync signal (VRTC for CRT/TV, // FPFRAME for TFT). 0=active lo, 1=active hi int vsync_start; // Vert. Sync Start position, lines int vsync_width; // Vert. Sync Pulse width, lines + int vsync_freq; // calculated vertical sync frequency int cmap_len; // color-map length }; @@ -489,7 +510,7 @@ { // par 0, 0, 1024, 768, 8, 1, // timings will be set by modedb - {0}, 0, 0, 0, 0, 0, 0, 0, 0, + {0}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 256 } }, @@ -522,7 +543,7 @@ { // par 0, 0, 1024, 768, 8, 1, // timings will be set by modedb - {0}, 0, 0, 0, 0, 0, 0, 0, 0, + {0}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 256 } }, @@ -553,7 +574,7 @@ { // par 0, 0, 1024, 768, 16, 2, // timings will be set by modedb - {0}, 0, 0, 0, 0, 0, 0, 0, 0, + {0}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16 } } |
From: Pete P. <pp...@us...> - 2001-10-10 17:46:59
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot/lib In directory usw-pr-cvs1:/tmp/cvs-serv26774/arch/mips/zboot/lib Added Files: Makefile zlib.c Log Message: Alchemy PB1000 zImage support. Most of this work is portable to other embedded mips boards. The board specific code is in the pb1000 directory and it's just head.S and the Makefile and linker script. The common code was ported with very few modifications from the PPC boot code. --- NEW FILE: Makefile --- # # Makefile for some libs needed by zImage. # L_TARGET := zlib.a obj-y := zlib.o include $(TOPDIR)/Rules.make --- NEW FILE: zlib.c --- /* * This file is derived from various .h and .c files from the zlib-0.95 * distribution by Jean-loup Gailly and Mark Adler, with some additions * by Paul Mackerras to aid in implementing Deflate compression and * decompression for PPP packets. See zlib.h for conditions of * distribution and use. * * Changes that have been made include: * - changed functions not used outside this file to "local" * - added minCompression parameter to deflateInit2 * - added Z_PACKET_FLUSH (see zlib.h for details) * - added inflateIncomp * * $Id: zlib.c,v 1.1 2001/10/10 17:46:56 ppopov Exp $ */ /*+++++*/ /* zutil.h -- internal interface and configuration of the compression library * Copyright (C) 1995 Jean-loup Gailly. [...2109 lines suppressed...] unsigned long s2 = (adler >> 16) & 0xffff; int k; if (buf == Z_NULL) return 1L; while (len > 0) { k = len < NMAX ? len : NMAX; len -= k; while (k >= 16) { DO16(buf); k -= 16; } if (k != 0) do { DO1(buf); } while (--k); s1 %= BASE; s2 %= BASE; } return (s2 << 16) | s1; } |