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|
From: Paul M. <le...@us...> - 2002-03-09 01:23:38
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4131/casio-be300
In directory usw-pr-cvs1:/tmp/cvs-serv30761/vr41xx/vr4131/casio-be300
Added Files:
Makefile pci_fixup.c prom.c setup.c
Log Message:
Move BE-300 code around.
--- NEW FILE: Makefile ---
#
# Makefile for the Casio Cassiopeia BE-300 specific parts of the kernel
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
.S.s:
$(CPP) $(AFLAGS) $< -o $@
.S.o:
$(CC) $(AFLAGS) -c $< -o $@
O_TARGET := casio-be300.o
obj-y := prom.o setup.o
obj-$(CONFIG_PCI) += pci_fixup.o
include $(TOPDIR)/Rules.make
--- NEW FILE: pci_fixup.c ---
/*
* arch/mips/vr4131/casio-be300/pci_fixup.c
*
* PCI fixup routines for the Casio Cassiopeia BE-300
*
* Copyright (C) 2002 Paul Mundt <le...@ch...>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 2 of the License, or (at your option)
* any later version.
*/
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <asm/vrc4173.h>
#include <asm/vr41xx.h>
#include <asm/pci_channel.h>
struct pci_channel mips_pci_channels[] = {
{ 0, }
};
void __init pcibios_fixup_resources(struct pci_dev *pdev)
{
}
void __init pcibios_fixup(void)
{
}
void __init pcibios_fixup_irqs(void)
{
}
unsigned int pcibios_assign_all_busses(void)
{
return 0;
}
--- NEW FILE: prom.c ---
/*
* arch/mips/vr4131/casio-be300/prom.c
*
* PROM library initialization routines for the Casio Cassiopeia BE-300
*
* Copyright (C) 2002 Paul Mundt <le...@ch...>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 2 of the License, or (at your option)
* any later version.
*/
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include <asm/vr41xx.h>
char arcs_cmdline[CL_SIZE];
const char *get_system_type(void)
{
return "NEC_Vr41xx Casio Cassiopeia BE-300";
}
void __init prom_init(int argc, char **argv, char **envp)
{
int i;
for (i = 1; i < argc; i++) {
strcat(arcs_cmdline, argv[i]);
if (i < (argc - 1))
strcat(arcs_cmdline, " ");
}
mips_machgroup = MACH_GROUP_NEC_VR41XX;
mips_machtype = MACH_CASIO_BE300;
add_memory_region(0, PAGE_ALIGN((16 << 20) - PAGE_SIZE), BOOT_MEM_RAM);
}
void __init prom_free_prom_memory(void)
{
}
--- NEW FILE: setup.c ---
/*
* arch/mips/vr4131/casio-be300/setup.c
*
* Setup routines for the Casio Cassiopeia BE-300
*
* Copyright (C) 2002 Paul Mundt <le...@ch...>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 2 of the License, or (at your option)
* any later version.
*/
#include <linux/init.h>
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/console.h>
#include <asm/vr41xx.h>
#include <asm/reboot.h>
#include <asm/time.h>
extern void vr4122_restart(char *command);
extern void vr4122_halt(void);
extern void vr4122_power_off(void);
extern void vr4122_time_init(void);
extern void vr4122_timer_setup(struct irqaction *irq);
void __init bus_error_init(void)
{
}
void __init casio_be300_setup(void)
{
_machine_restart = vr4122_restart;
_machine_halt = vr4122_halt;
_machine_power_off = vr4122_power_off;
board_time_init = vr4122_time_init;
board_timer_setup = vr4122_timer_setup;
#ifdef CONFIG_FB
conswitchp = &dummy_con;
#endif
}
|
|
From: Paul M. <le...@us...> - 2002-03-09 01:23:37
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr4131/common In directory usw-pr-cvs1:/tmp/cvs-serv30761/vr4131/common Removed Files: Makefile Log Message: Move BE-300 code around. --- Makefile DELETED --- |
|
From: Paul M. <le...@us...> - 2002-03-09 01:23:36
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr4131/casio-be300 In directory usw-pr-cvs1:/tmp/cvs-serv30761/vr4131/casio-be300 Removed Files: Makefile pci_fixup.c prom.c setup.c Log Message: Move BE-300 code around. --- Makefile DELETED --- --- pci_fixup.c DELETED --- --- prom.c DELETED --- --- setup.c DELETED --- |
|
From: Paul M. <le...@us...> - 2002-03-09 01:18:40
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4131/casio-be300 In directory usw-pr-cvs1:/tmp/cvs-serv29850/casio-be300 Log Message: Directory /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4131/casio-be300 added to the repository |
|
From: Paul M. <le...@us...> - 2002-03-09 01:14:34
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4131/common In directory usw-pr-cvs1:/tmp/cvs-serv28999/common Log Message: Directory /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4131/common added to the repository |
|
From: Paul M. <le...@us...> - 2002-03-09 01:14:19
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4131 In directory usw-pr-cvs1:/tmp/cvs-serv28964/vr4131 Log Message: Directory /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4131 added to the repository |
|
From: Paul M. <le...@us...> - 2002-03-08 20:14:29
|
Update of /cvsroot/linux-mips/linux/drivers/video
In directory usw-pr-cvs1:/tmp/cvs-serv19615
Modified Files:
fbmem.c
Log Message:
Remove useless comment, drivers are sorted based on resources, not where they came from..
Index: fbmem.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/fbmem.c,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -d -r1.17 -r1.18
--- fbmem.c 7 Mar 2002 09:15:17 -0000 1.17
+++ fbmem.c 8 Mar 2002 20:14:25 -0000 1.18
@@ -319,11 +319,6 @@
#ifdef CONFIG_FB_MAXINE
{ "maxinefb", maxinefb_init, NULL },
#endif
-
- /*
- * Linux VR drivers
- */
-
#ifdef CONFIG_FB_SIMPLE
{ "sfb", sfb_init, sfb_setup },
#endif
|
|
From: Paul M. <le...@us...> - 2002-03-08 20:10:55
|
Update of /cvsroot/linux-mips/linux/drivers/video
In directory usw-pr-cvs1:/tmp/cvs-serv18705
Modified Files:
Config.in
Log Message:
Add back in the IT8181 option..
Index: Config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/Config.in,v
retrieving revision 1.14
retrieving revision 1.15
diff -u -d -r1.14 -r1.15
--- Config.in 7 Mar 2002 23:30:22 -0000 1.14
+++ Config.in 8 Mar 2002 20:10:51 -0000 1.15
@@ -156,10 +156,9 @@
bool ' Use TFT Panel on Pb1500 ' CONFIG_PB1500_TFT
fi
fi
-
- # Linux VR devices
- tristate ' Simple Frame Buffer support' CONFIG_FB_SIMPLE
- tristate ' Simple Frame Buffer with HPC device control (Experimental)' CONFIG_FB_HPCSFB
+ tristate ' ITE IT8181 framebuffer support' CONFIG_FB_IT8181
+ tristate ' Simple Frame Buffer support' CONFIG_FB_SIMPLE
+ tristate ' Simple Frame Buffer with HPC device control (Experimental)' CONFIG_FB_HPCSFB
fi
if [ "$ARCH" = "sparc" -o "$ARCH" = "sparc64" ]; then
bool ' SBUS and UPA framebuffers' CONFIG_FB_SBUS
|
|
From: Paul M. <le...@us...> - 2002-03-08 18:55:50
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4121/workpad
In directory usw-pr-cvs1:/tmp/cvs-serv31497/arch/mips/vr41xx/vr4121/workpad
Modified Files:
init.c
Log Message:
Fix for missing break from Yoichi-san.
Index: init.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4121/workpad/init.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- init.c 7 Mar 2002 03:16:54 -0000 1.1
+++ init.c 8 Mar 2002 18:55:45 -0000 1.2
@@ -60,6 +60,7 @@
switch (mem_size) {
case 16:
add_memory_region(0, 16 << 20, BOOT_MEM_RAM);
+ break;
case 32:
add_memory_region(0, 32 << 20, BOOT_MEM_RAM);
break;
|
|
From: Leblanc f. <fle...@us...> - 2002-03-08 16:37:45
|
Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv19411/include/asm-mips
Modified Files:
vr41xx.h
Log Message:
Remove polluting definitions that shouldn't be there.
Index: vr41xx.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/vr41xx.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- vr41xx.h 7 Mar 2002 03:16:55 -0000 1.3
+++ vr41xx.h 8 Mar 2002 16:37:42 -0000 1.4
@@ -4,8 +4,7 @@
* Primary header for NEC VR41xx processors.
*
* Copyright (C) 1999 Michael Klar
- * Copyright (C) 2001, 2002 Paul Mundt
- * Copyright (C) 2002 MontaVista Software, Inc.
+ * Copyright (C) 2001 Paul Mundt <le...@ch...>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -16,7 +15,6 @@
#define __ASM_MIPS_VR41XX_H
#include <linux/config.h>
-#include <linux/interrupt.h>
/*
* Any code being written for a VR41xx device should be including this
@@ -40,72 +38,6 @@
#elif defined(CONFIG_VR4181)
#include <asm/vr4181/vr4181.h>
#endif
-
-/*
- * Bus Control Uint
- */
-extern void vr41xx_bcu_init(void);
-
-/*
- * Clock Mask Unit
- */
-extern void vr41xx_clock_supply(u16 mask);
-extern void vr41xx_clock_mask(u16 mask);
-
-/*
- * Interrupt Control Unit
- */
-
-/* GIU Interrupt Numbers */
-#define GIUL_IRQ(x) (40 + (x))
-#define GIUH_IRQ(x) (56 + (x))
-
-struct irqcascade {
- int cascade;
- int (*get_irq_number)(int irq);
-};
-
-extern void vr41xx_board_irq_init(void);
-extern void vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq));
-
-/*
- * Serial Interface Unit
- */
-extern void vr41xx_siu_init(int line, int interface, int module);
-extern void vr41xx_siu_ifselect(int interface, int module);
-
-/* SIU interfaces */
-enum {
- SIU_RS232C,
- SIU_IRDA
-};
-
-/* IrDA interfaces */
-enum {
- IRDA_SHARP = 1,
- IRDA_TEMIC,
- IRDA_HP
-};
-
-/*
- * Debug Serial Interface Unit
- */
-extern void vr41xx_dsiu_init(int line);
-
-/*
- * PCI Control Unit
- */
-extern void vr41xx_pciu_init(void);
-
-/*
- * MISC
- */
-extern void vr41xx_time_init(void);
-extern void vr41xx_timer_setup(struct irqaction *irq);
-
-extern void vr41xx_restart(char *command);
-extern void vr41xx_halt(void);
-extern void vr41xx_power_off(void);
#endif /* __ASM_MIPS_VR41XX_H */
|
|
From: Pete P. <pp...@us...> - 2002-03-08 00:15:17
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot/pb1500
In directory usw-pr-cvs1:/tmp/cvs-serv16868/arch/mips/zboot/pb1500
Added Files:
Makefile head.S ld.script
Log Message:
Pb1500 zImage support.
--- NEW FILE: Makefile ---
# arch/mips/compressed/alchemy/Makefile
#
# Makefile for Alchemy Semiconductor PB1500 board.
# All of the boot loader code was derived from the ppc
# boot code.
#
# Copyright 2001,2002 MontaVista Software Inc.
#
# Author: Mark A. Greer
# mg...@mv...
# Ported and modified for mips support by
# Pete Popov <pp...@mv...>
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the
# Free Software Foundation; either version 2 of the License, or (at your
# option) any later version.
.c.s:
$(CC) $(CFLAGS) -S -o $*.s $<
.s.o:
$(AS) -o $*.o $<
.c.o:
$(CC) $(CFLAGS) -D__BOOTER__ -c -o $*.o $<
.S.s:
$(CPP) $(AFLAGS) -o $*.o $<
.S.o:
$(CC) $(AFLAGS) -c -o $*.o $<
#########################################################################
# START BOARD SPECIFIC VARIABLES
BNAME=pb1500
# These two variables control where the zImage is stored
# in flash and loaded in memory. If you change either one,
# be sure to make the appropriate change to the zImage
# rule.
RAM_LOAD_ADDR = 0x81000000
FLASH_LOAD_ADDR = 0xBFD00000
# These two variables specify the free ram region
# that can be used for temporary malloc area
AVAIL_RAM_START=0x80400000
AVAIL_RAM_END=0x80800000
# This one must match the LOADADDR in arch/mips/Makefile!
LOADADDR=0x80100000
# END BOARD SPECIFIC VARIABLES
#########################################################################
ZLINKFLAGS = -T ld.script -Ttext $(RAM_LOAD_ADDR)
OBJECTS := head.o ../common/misc-common.o ../common/misc-simple.o \
../common/au1k_uart.o ../common/string.o ../common/ctype.o
LIBS := ../lib/zlib.a
ENTRY := ../utils/entry
OFFSET := ../utils/offset
SIZE := ../utils/size
all: zImage
clean:
rm -rf *.o vmlinux* zvmlinux.*
head.o: head.S $(TOPDIR)/vmlinux
$(CC) -DFLASH_LOAD_ADDR=$(FLASH_LOAD_ADDR) $(AFLAGS) \
-DKERNEL_ENTRY=$(shell sh $(ENTRY) $(NM) $(TOPDIR)/vmlinux ) \
-c -o $*.o $<
../common/misc-simple.o:
$(CC) $(CFLAGS) -DINITRD_OFFSET=0 -DINITRD_SIZE=0 -DZIMAGE_OFFSET=0 \
-DAVAIL_RAM_START=$(AVAIL_RAM_START) \
-DAVAIL_RAM_END=$(AVAIL_RAM_END) \
-DLOADADDR=$(LOADADDR) \
-DZIMAGE_SIZE=0 -c -o $@ $*.c
# This is the first pass at building the boot loader image,
# without knowing the file offset where the vmlinuz.gz
# kernel will end up. We build this image, check the offset,
# and then rebuild it with the correct offset and size
# passed to mips-simple.c
zvmlinux.no: $(OBJECTS) $(LIBS) ../images/vmlinux.gz
$(LD) $(ZLINKFLAGS) -o $@.tmp $(OBJECTS) $(LIBS)
$(OBJCOPY) -R .comment \
--add-section=image=../images/vmlinux.gz \
$@.tmp $@
# rm -f $@.tmp
# This is the final image we build, now that we know what
# the vmlinuz.gz offset is.
zvmlinux: $(OBJECTS) $(LIBS) ../images/vmlinux.gz zvmlinux.no
$(CC) $(CFLAGS) -DINITRD_OFFSET=0 -DINITRD_SIZE=0 \
-DZIMAGE_OFFSET=$(shell sh $(OFFSET) $(OBJDUMP) $@.no image) \
-DZIMAGE_SIZE=$(shell sh $(SIZE) $(OBJDUMP) $@.no image) \
-D__BOOTER__ \
-DAVAIL_RAM_START=$(AVAIL_RAM_START) \
-DAVAIL_RAM_END=$(AVAIL_RAM_END) \
-DLOADADDR=$(LOADADDR) \
-c -o ../common/misc-simple.o ../common/misc-simple.c
$(LD) $(ZLINKFLAGS) -o $@.tmp $(OBJECTS) $(LIBS)
$(OBJCOPY) -R .comment \
--add-section=image=../images/vmlinux.gz \
$@.tmp $@
$(OBJCOPY) --adjust-section-vma=image+$(RAM_LOAD_ADDR) $@
$(OBJCOPY) --adjust-section-vma=image+$(shell sh $(OFFSET) \
$(OBJDUMP) $@.no image ) $@
# rm -f $@.tmp
# rm -f $@.no
# Here we manipulate the image in order to get it the necessary
# srecord file we need.
zImage: zvmlinux
mv zvmlinux ../images/$@.$(BNAME)
$(OBJCOPY) --set-section-flags=image=alloc,load,code ../images/$@.$(BNAME)
$(OBJCOPY) -O srec --adjust-vma 0x3ed00000 \
../images/$@.$(BNAME) ../images/$@.$(BNAME).srec
# rm ../images/vmlinux.gz
include $(TOPDIR)/Rules.make
--- NEW FILE: head.S ---
/*
* arch/mips/kernel/head.S
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1994, 1995 Waldorf Electronics
* Written by Ralf Baechle and Andreas Busse
* Copyright (C) 1995 - 1999 Ralf Baechle
* Copyright (C) 1996 Paul M. Antoine
* Modified for DECStation and hence R3000 support by Paul M. Antoine
* Further modifications by David S. Miller and Harald Koerfgen
* Copyright (C) 1999 Silicon Graphics, Inc.
*
* Head.S contains the MIPS exception handler and startup code.
*
**************************************************************************
* 9 Nov, 2000.
* Added Cache Error exception handler and SBDDP EJTAG debug exception.
*
* Kevin Kissell, ke...@mi... and Carsten Langgaard, car...@mi...
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
**************************************************************************
*/
#include <linux/config.h>
#include <linux/threads.h>
#include <asm/asm.h>
#include <asm/cacheops.h>
#include <asm/current.h>
#include <asm/offset.h>
#include <asm/processor.h>
#include <asm/regdef.h>
#include <asm/cachectl.h>
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
#include <asm/bootinfo.h>
#define IndexInvalidate_I 0x00
.set noreorder
.cprestore
LEAF(start)
start:
locate:
la sp, .stack
move s0, a0
move s1, a1
move s2, a2
move s3, a3
la a0, start
/* li a1, 0xbfd00000 */
li a1, FLASH_LOAD_ADDR
la a2, _edata
subu t1, a2, a0
srl t1, t1, 2
/* copy text section */
li t0, 0
1: lw v0, 0(a1)
nop
sw v0, 0(a0)
xor t0, t0, v0
addu a0, 4
bne a2, a0, 1b
addu a1, 4
/* Clear BSS */
la a0, _edata
la a2, _end
2: sw zero, 0(a0)
bne a2, a0, 2b
addu a0, 4
/* flush the I-Cache */
li k0, 0x80000000 # start address
li k1, 0x80004000 # end address (16KB I-Cache)
subu k1, 128
1:
.set mips3
cache IndexInvalidate_I, 0(k0)
cache IndexInvalidate_I, 32(k0)
cache IndexInvalidate_I, 64(k0)
cache IndexInvalidate_I, 96(k0)
.set mips0
bne k0, k1, 1b
addu k0, k0, 128
/* done */
li a0, FLASH_LOAD_ADDR /* load address */
move a1, t1 /* length in words */
move a2, t0 /* checksum */
move a3, sp
la ra, 1f
la k0, decompress_kernel
jr k0
nop
1:
move a0, s0
move a1, s1
move a2, s2
move a3, s3
li k0, KERNEL_ENTRY
jr k0
nop
3:
b 3b
END(start)
LEAF(udelay)
udelay:
END(udelay)
LEAF(FlushCache)
li k0, 0x80000000 # start address
li k1, 0x80004000 # end address (16KB I-Cache)
subu k1, 128
1:
.set mips3
cache IndexInvalidate_I, 0(k0)
cache IndexInvalidate_I, 32(k0)
cache IndexInvalidate_I, 64(k0)
cache IndexInvalidate_I, 96(k0)
.set mips0
bne k0, k1, 1b
addu k0, k0, 128
jr ra
nop
END(FlushCache)
.comm .stack,4096*2,4
--- NEW FILE: ld.script ---
OUTPUT_ARCH(mips)
ENTRY(start)
SECTIONS
{
/* Read-only sections, merged into text segment: */
/* . = 0x81000000; */
.init : { *(.init) } =0
.text :
{
_ftext = . ;
*(.text)
*(.rodata)
*(.rodata1)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
} =0
.kstrtab : { *(.kstrtab) }
. = ALIGN(16); /* Exception table */
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
__start___dbe_table = .; /* Exception table for data bus errors */
__dbe_table : { *(__dbe_table) }
__stop___dbe_table = .;
__start___ksymtab = .; /* Kernel symbol table */
__ksymtab : { *(__ksymtab) }
__stop___ksymtab = .;
_etext = .;
. = ALIGN(8192);
.data.init_task : { *(.data.init_task) }
/* Startup code */
. = ALIGN(4096);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(16);
__setup_start = .;
.setup.init : { *(.setup.init) }
__setup_end = .;
__initcall_start = .;
.initcall.init : { *(.initcall.init) }
__initcall_end = .;
. = ALIGN(4096); /* Align double page for init_task_union */
__init_end = .;
. = ALIGN(4096);
.data.page_aligned : { *(.data.idt) }
. = ALIGN(32);
.data.cacheline_aligned : { *(.data.cacheline_aligned) }
.fini : { *(.fini) } =0
.reginfo : { *(.reginfo) }
/* Adjust the address for the data segment. We want to adjust up to
the same address within the page on the next page up. It would
be more correct to do this:
. = .;
The current expression does not correctly handle the case of a
text segment ending precisely at the end of a page; it causes the
data segment to skip a page. The above expression does not have
this problem, but it will currently (2/95) cause BFD to allocate
a single segment, combining both text and data, for this case.
This will prevent the text segment from being shared among
multiple executions of the program; I think that is more
important than losing a page of the virtual address space (note
that no actual memory is lost; the page which is skipped can not
be referenced). */
. = .;
.data :
{
_fdata = . ;
*(.data)
/* Align the initial ramdisk image (INITRD) on page boundaries. */
. = ALIGN(4096);
__rd_start = .;
*(.initrd)
__rd_end = .;
. = ALIGN(4096);
CONSTRUCTORS
}
.data1 : { *(.data1) }
_gp = . + 0x8000;
.lit8 : { *(.lit8) }
.lit4 : { *(.lit4) }
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
.got : { *(.got.plt) *(.got) }
.dynamic : { *(.dynamic) }
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
.sdata : { *(.sdata) }
. = ALIGN(4);
_edata = .;
PROVIDE (edata = .);
__bss_start = .;
_fbss = .;
.sbss : { *(.sbss) *(.scommon) }
.bss :
{
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
_end = . ;
PROVIDE (end = .);
}
/* Sections to be discarded */
/DISCARD/ :
{
*(.text.exit)
*(.data.exit)
*(.exitcall.exit)
}
/* This is the MIPS specific mdebug section. */
.mdebug : { *(.mdebug) }
/* These are needed for ELF backends which have not yet been
converted to the new style linker. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
/* DWARF debug sections.
Symbols in the .debug DWARF section are relative to the beginning of the
section so we begin .debug at 0. It's not clear yet what needs to happen
for the others. */
.debug 0 : { *(.debug) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_sfnames 0 : { *(.debug_sfnames) }
.line 0 : { *(.line) }
/* These must appear regardless of . */
.gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
.gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
.comment : { *(.comment) }
.note : { *(.note) }
}
|
|
From: Pete P. <pp...@us...> - 2002-03-08 00:14:34
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot/pb1500 In directory usw-pr-cvs1:/tmp/cvs-serv16782/arch/mips/zboot/pb1500 Log Message: Directory /cvsroot/linux-mips/linux/arch/mips/zboot/pb1500 added to the repository |
|
From: Pete P. <pp...@us...> - 2002-03-07 23:30:28
|
Update of /cvsroot/linux-mips/linux/drivers/video
In directory usw-pr-cvs1:/tmp/cvs-serv5932/drivers/video
Modified Files:
Config.in epson1356fb.c epson1356fb.h
Log Message:
* Added 1386 support to the driver
* Modified driver so it can be used as a loadable module
* Modified pb1000 and pb1500 addresses to be the true 36 bit addresses
Index: Config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/Config.in,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -d -r1.13 -r1.14
--- Config.in 7 Mar 2002 09:15:16 -0000 1.13
+++ Config.in 7 Mar 2002 23:30:22 -0000 1.14
@@ -151,6 +151,10 @@
bool ' Use Compsite NTSC on Pb1000 (J63)' CONFIG_PB1000_NTSC
bool ' Use TFT Panel on Pb1000 (J64)' CONFIG_PB1000_TFT
fi
+ if [ "$CONFIG_MIPS_PB1500" = "y" -a "$CONFIG_FB_E1356" != "n" ]; then
+ bool ' Use CRT on Pb1500 ' CONFIG_PB1500_CRT
+ bool ' Use TFT Panel on Pb1500 ' CONFIG_PB1500_TFT
+ fi
fi
# Linux VR devices
Index: epson1356fb.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/epson1356fb.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- epson1356fb.c 19 Oct 2001 21:19:39 -0000 1.7
+++ epson1356fb.c 7 Mar 2002 23:30:22 -0000 1.8
@@ -1,7 +1,7 @@
/*
* epson1356fb.c -- Epson SED1356 Framebuffer Driver
*
- * Copyright 2001 MontaVista Software Inc.
+ * Copyright 2001, 2002 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* st...@mv... or so...@mv...
*
@@ -34,7 +34,9 @@
*/
#include <linux/config.h>
+#include <linux/version.h>
#include <linux/module.h>
+
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
@@ -79,6 +81,9 @@
#undef SHADOW_FRAME_BUFFER
#include "epson1356fb.h"
+static char *options;
+MODULE_PARM(options, "s");
+
/*
* Frame buffer device API
*/
@@ -1741,8 +1746,10 @@
static int e1356fb_open(struct fb_info *fb, int user)
{
struct fb_info_e1356 *info = (struct fb_info_e1356*)fb;
- if (user)
+ if (user) {
info->open++;
+ }
+ MOD_INC_USE_COUNT;
return 0;
}
@@ -1754,6 +1761,7 @@
if (info->open == 0)
info->mmaped = 0;
}
+ MOD_DEC_USE_COUNT;
return 0;
}
@@ -2166,14 +2174,24 @@
int dram_timing, rr_div, mclk_src;
u8 rev_code, btmp, mclk_cfg;
+ if (options) {
+ e1356fb_setup(options, 0);
+ }
+
// clear out fb_info
memset(&fb_info, 0, sizeof(struct fb_info_e1356));
// copy boot options
fb_info.fix = boot_fix;
fb_info.default_par = boot_par;
-
+
fb_info.regbase_size = E1356_REG_SIZE;
+
+ if (!epfix->system) {
+ printk(KERN_ERR "e1356/86fb: no valid system found\n");
+ return -ENODEV;
+ }
+
if (epfix->system == SYS_SDU1356) {
// it's the SDU1356B0C PCI eval card.
struct pci_dev *pdev = NULL;
@@ -2223,9 +2241,15 @@
writeb(0, ®->basic->misc);
rev_code = readb(®->basic->rev_code);
- if ((rev_code >> 2) != 0x04) {
+ if ((rev_code >> 2) == 0x04) {
+ printk("Found EPSON1356 Display Controller\n");
+ }
+ else if ((rev_code >> 2) == 0x07) {
+ printk("Found EPSON13806 Display Controller\n");
+ }
+ else {
iounmap(fb_info.regbase_virt);
- printk("e1356fb: %s not found, rev_code=0x%02x.\n",
+ printk("e1356/806fb: %s not found, rev_code=0x%02x.\n",
name, rev_code);
return -ENODEV;
}
@@ -2238,11 +2262,17 @@
case 2:
fb_info.fb_size = 0x80000; /* 512K bytes */
break;
+ case 1:
+ if ((rev_code >> 2) == 7) /* 806 */
+ fb_info.fb_size = 0x140000; /* 1.2M bytes */
+ else
+ fb_info.fb_size = 0x200000; /* 2M bytes */
+ break;
default:
fb_info.fb_size = 0x200000; /* 2M bytes */
break;
}
-
+
fb_info.membase_virt = ioremap_nocache(epfix->membase_phys,
fb_info.fb_size);
@@ -2252,8 +2282,8 @@
return -ENXIO;
}
- printk("e1356fb: Detected %s framebuffer\n",
- fb_info.fb_size == 0x80000 ? "512KB" : "2MB");
+ printk("e1356/806fb: Detected %dKB framebuffer\n",
+ (unsigned)fb_info.fb_size/1000);
#ifdef CONFIG_MTRR
if (!epfix->nomtrr) {
@@ -2282,13 +2312,15 @@
// Set the GPIO1 and 2 to inputs
writeb(0, ®->genio->gpio_cfg);
writeb(0, ®->genio->gpio_ctrl);
+ if (fb_info.chip_rev == 7) /* 806 */
+ writeb(0, ®->genio->gpio_ctrl2);
/*
* Program the clocks
*/
#ifdef CONFIG_MIPS_AU1000
- if (epfix->system == SYS_PB1000)
+ if ((epfix->system == SYS_PB1000) || (epfix->system == SYS_PB1500))
epfix->busclk = get_au1000_lcd_clock();
#endif
@@ -2297,23 +2329,32 @@
goto ret_enxio;
}
- // Find the highest allowable MCLK
epfix->mclk = mclk_cfg = 0;
- if (epfix->busclk <= MAX_PIXCLOCK && epfix->busclk > epfix->mclk) {
+ if (epfix->system == SYS_PB1500) {
epfix->mclk = epfix->busclk;
mclk_cfg = 0x01;
}
- if (epfix->clki <= MAX_PIXCLOCK && epfix->clki > epfix->mclk) {
- epfix->mclk = epfix->clki;
- mclk_cfg = 0x00;
- }
- if (epfix->busclk/2 <= MAX_PIXCLOCK && epfix->busclk/2 > epfix->mclk) {
- epfix->mclk = epfix->busclk/2;
- mclk_cfg = 0x11;
- }
- if (epfix->clki/2 <= MAX_PIXCLOCK && epfix->clki/2 > epfix->mclk) {
- epfix->mclk = epfix->clki/2;
- mclk_cfg = 0x10;
+ else {
+ // Find the highest allowable MCLK
+ if (epfix->busclk <= MAX_PIXCLOCK &&
+ epfix->busclk > epfix->mclk) {
+ epfix->mclk = epfix->busclk;
+ mclk_cfg = 0x01;
+ }
+ if (epfix->clki <= MAX_PIXCLOCK && epfix->clki > epfix->mclk) {
+ epfix->mclk = epfix->clki;
+ mclk_cfg = 0x00;
+ }
+ if (epfix->busclk/2 <= MAX_PIXCLOCK &&
+ epfix->busclk/2 > epfix->mclk) {
+ epfix->mclk = epfix->busclk/2;
+ mclk_cfg = 0x11;
+ }
+ if (epfix->clki/2 <= MAX_PIXCLOCK &&
+ epfix->clki/2 > epfix->mclk) {
+ epfix->mclk = epfix->clki/2;
+ mclk_cfg = 0x10;
+ }
}
if (!epfix->mclk) {
@@ -2326,7 +2367,7 @@
®->clk_cfg->mem_clk_cfg);
writeb(mclk_cfg, ®->clk_cfg->mem_clk_cfg);
- printk("e1356fb: clocks (kHz): busclk=%d, mclk=%d, clki=%d, clki2=%d\n",
+ printk("e1356fb: clocks (kHz): busclk=%d mclk=%d clki=%d clki2=%d\n",
epfix->busclk, epfix->mclk, epfix->clki, epfix->clki2);
// Set max pixel clock
@@ -2353,7 +2394,9 @@
if (readb(®->md_cfg->md_cfg_stat1) & (1<<4))
periodBCLK *= 2;
- if (periodMCLK - 4 > periodBCLK)
+ if ((epfix->system == SYS_PB1000) || (epfix->system == SYS_PB1500))
+ writeb(0x00, ®->clk_cfg->cpu2mem_wait_sel);
+ else if (periodMCLK - 4 > periodBCLK)
writeb(0x02, ®->clk_cfg->cpu2mem_wait_sel);
else if (2*periodMCLK - 4 > periodBCLK)
writeb(0x01, ®->clk_cfg->cpu2mem_wait_sel);
@@ -2362,7 +2405,7 @@
// Program memory config
if (epfix->mem_type < MEM_TYPE_EDO_2CAS ||
- epfix->mem_type > MEM_TYPE_FPM_2WE) {
+ epfix->mem_type > MEM_TYPE_EMBEDDED_SDRAM) {
printk("e1356fb: bad memory type specified\n");
goto ret_enxio;
}
@@ -2577,7 +2620,6 @@
GET_FB_IDX(fb_info.fb_info.node),
fb_info.fb_info.modename);
- MOD_INC_USE_COUNT;
return 0;
@@ -2625,7 +2667,6 @@
module_exit(e1356fb_exit);
-#ifndef MODULE
void
e1356fb_setup(char *options, int *ints)
{
@@ -2735,6 +2776,9 @@
if (!strncmp(this_opt+7, "pb1000", 10)) {
boot_fix = systems[SYS_PB1000].fix;
boot_par = systems[SYS_PB1000].par;
+ } else if (!strncmp(this_opt+7, "pb1500", 7)) {
+ boot_fix = systems[SYS_PB1500].fix;
+ boot_par = systems[SYS_PB1500].par;
} else if (!strncmp(this_opt+7, "sdu1356", 7)) {
boot_fix = systems[SYS_SDU1356].fix;
boot_par = systems[SYS_SDU1356].par;
@@ -2747,7 +2791,6 @@
}
}
}
-#endif
/*
Index: epson1356fb.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/epson1356fb.h,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- epson1356fb.h 10 Oct 2001 19:21:06 -0000 1.5
+++ epson1356fb.h 7 Mar 2002 23:30:22 -0000 1.6
@@ -66,8 +66,10 @@
#define REG_BASE_GENIO 0x04
typedef struct {
u8 gpio_cfg; // 04
- u8 spacer[3]; // 05
+ u8 gpio_cfg2; // 05 SED13806
+ u8 spacer[2]; // 06
u8 gpio_ctrl; // 08
+ u8 gpio_ctrl2; // 09 SED13806
} reg_genio_t;
// MD Config Readback
@@ -264,7 +266,8 @@
MEM_TYPE_EDO_2CAS = 0,
MEM_TYPE_FPM_2CAS,
MEM_TYPE_EDO_2WE,
- MEM_TYPE_FPM_2WE
+ MEM_TYPE_FPM_2WE,
+ MEM_TYPE_EMBEDDED_SDRAM = 0x80
};
enum mem_smr_t {
@@ -448,7 +451,9 @@
// The following are boot options for particular SED1356-based target systems
enum {
+ SYS_NULL,
SYS_PB1000,
+ SYS_PB1500,
SYS_SDU1356,
SYS_CLIO1050,
NUM_SYSTEMS // must be last
@@ -458,8 +463,21 @@
struct e1356fb_fix fix;
struct e1356fb_par par;
} systems[NUM_SYSTEMS] = {
+
/*
- * Alchemy Pb1000 evaluation board
+ * NULL system to help us detect missing options
+ * when the driver is compiled as a module.
+ */
+ {
+ { // fix
+ SYS_NULL,
+ },
+ { // par
+ }
+ },
+
+ /*
+ * Alchemy Pb1000 evaluation board, SED1356
*/
{
{ // fix
@@ -508,7 +526,54 @@
"800x600@60"
},
{ // par
- 0, 0, 1024, 768, 8, 1,
+ 0, 0, 800, 600, 8, 1,
+ // timings will be set by modedb
+ {0}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 256
+ }
+ },
+
+ /*
+ * Alchemy Pb1500 evaluation board, SED13806
+ */
+ {
+ { // fix
+ SYS_PB1500,
+ /*
+ * Note!: these are "pseudo" physical addresses;
+ * the SED1356 is not actually mapped here, but rather
+ * at the 36-bit address of 0xE 0000 0000. There is an
+ * ugly hack in the Au1000 TLB refill handler that will
+ * translate pte_t's in the range 0xE000 0000 -->
+ * 0xEFFF FFFF to the 36-bit range 0xE 0000 0000 -->
+ * 0xE 0FFF FFFF. The long-term solution is to support
+ * 36-bit physical addresses in linux-mips32 mm, since
+ * the mips32 specification specifically supports this.
+ */
+ 0xE0000000, 0xE0200000,
+ 50, MEM_TYPE_EMBEDDED_SDRAM, 64, MEM_SMR_CBR,
+ 0, 0, // BUSCLK and MCLK are calculated at run-time
+ 40000, 14318, // CLKI, CLKI2
+#ifdef CONFIG_PB1500_CRT
+ DISP_TYPE_CRT,
+ 0, 0, // TV Options
+ 0, 0, // Panel options
+#else
+ DISP_TYPE_TFT,
+ 0, 0, // TV Options
+ 0, 12, // Panel options, EL panel?, data width?
+#endif
+ 0, 0,
+#ifdef CONFIG_MTRR
+ 0,
+#endif
+ 0,
+ 0,
+ {0},
+ "800x600@60"
+ },
+ { // par
+ 0, 0, 800, 600, 8, 1,
// timings will be set by modedb
{0}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
256
|
|
From: Pete P. <pp...@us...> - 2002-03-07 19:58:06
|
Update of /cvsroot/linux-mips/linux/drivers/pcmcia
In directory usw-pr-cvs1:/tmp/cvs-serv3891/drivers/pcmcia
Modified Files:
au1000_pb1000.c
Log Message:
Removed unnecessary/dangerous register writes in the socket init.
Index: au1000_pb1000.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/pcmcia/au1000_pb1000.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- au1000_pb1000.c 15 Feb 2002 19:47:27 -0000 1.4
+++ au1000_pb1000.c 7 Mar 2002 19:58:00 -0000 1.5
@@ -288,18 +288,12 @@
break;
}
- writew(pcr, PB1000_PCR);
- au_sync_delay(300);
-
- writew(pcr | PCR_SLOT_0_RST, PB1000_PCR);
- au_sync_delay(100);
-
pcr &= ~(PCR_SLOT_0_RST);
if (configure->reset) {
pcr |= PCR_SLOT_0_RST;
}
writew(pcr, PB1000_PCR);
- au_sync_delay(100);
+ au_sync_delay(300);
return 0;
}
|
|
From: Leblanc f. <fle...@us...> - 2002-03-07 16:21:58
|
Update of /cvsroot/linux-mips/linux/drivers/char
In directory usw-pr-cvs1:/tmp/cvs-serv30771/drivers/char
Modified Files:
Config.in
Log Message:
Remove not matched if.
Index: Config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/char/Config.in,v
retrieving revision 1.32
retrieving revision 1.33
diff -u -d -r1.32 -r1.33
--- Config.in 26 Feb 2002 19:03:29 -0000 1.32
+++ Config.in 7 Mar 2002 16:21:50 -0000 1.33
@@ -207,7 +207,6 @@
tristate ' W83877F (EMACS) Watchdog Timer' CONFIG_W83877F_WDT
tristate ' ZF MachZ Watchdog' CONFIG_MACHZ_WDT
dep_tristate ' Indy/I2 Hardware Watchdog' CONFIG_INDYDOG $CONFIG_SGI_IP22
-fi
dep_tristate ' NEC VR41xx Watchdog (DSU)' CONFIG_VR41XX_WDT $CONFIG_CPU_VR41XX
fi
endmenu
|
|
From: Leblanc f. <fle...@us...> - 2002-03-07 09:15:20
|
Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv3157/include/asm-mips
Modified Files:
io.h vr41xx-platdep.h
Added Files:
power.h
Log Message:
Adds more VR stuff for Cassiopeia E15 Support.
--- NEW FILE: power.h ---
/*
* power.h - Common power management defines
*
* Copyright (C) 2000 Michael Klar
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#ifndef __ASM_POWER_H
#define __ASM_POWER_H
#ifndef _LANGUAGE_ASSEMBLY
extern unsigned int powerevent_queued;
extern unsigned int hibernation_state;
extern asmlinkage void do_wakeup(char *command);
extern asmlinkage void do_hibernate(void *sp);
#endif
#define LOAD_MAGIC (('L'<<24) | ('O'<<16) | ('A'<<8) | 'D')
#define HIB_MAGIC ((' '<<24) | ('H'<<16) | ('I'<<8) | 'B')
#define RUN_MAGIC ((' '<<24) | ('R'<<16) | ('U'<<8) | 'N')
#endif /* __ASM_POWER_H */
Index: io.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/io.h,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -d -r1.17 -r1.18
--- io.h 12 Feb 2002 18:03:12 -0000 1.17
+++ io.h 7 Mar 2002 09:15:17 -0000 1.18
@@ -309,6 +309,39 @@
}
}
+#ifdef CONFIG_CASIO_E15
+#define __OUTS1(s) \
+extern inline void __outs##s(unsigned int port, const void * addr, unsigned long count) {
+
+#define __OUTS2(m) \
+if (count) \
+__asm__ __volatile__ ( \
+ ".set\tnoreorder\n\t" \
+ ".set\tnoat\n" \
+ "1:\tl" #m "\t$1,(%0)\n\t" \
+ "subu\t%1,1\n\t" \
+ "s" #m "\t$1,%4(%5)\n\t" \
+ "bne\t$0,%1,1b\n\t" \
+ "addiu\t%0,%6\n\t" \
+ ".set\tat\n\t" \
+ ".set\treorder"
+
+#define __OUTS(m,s,i) \
+__OUTS1(s) __OUTS2(m) \
+ : "=r" (addr), "=r" (count) \
+ : "0" (addr), "1" (count), "i" (0), "r" (mips_io_port_base+port), "I" (i) \
+ : "$1");} \
+__OUTS1(s##c) __OUTS2(m) \
+ : "=r" (addr), "=r" (count) \
+ : "0" (addr), "1" (count), "ir" (port), "r" (mips_io_port_base), "I" (i) \
+ : "$1");}
+
+__OUTS(h,w,2)
+
+#define outsw(port,addr,count) \
+ __outsw ((port),(addr),(count))
+
+#else
static inline void outsw(unsigned long port, void *addr, unsigned int count)
{
while (count--) {
@@ -316,7 +349,41 @@
addr += 2;
}
}
+#endif
+
+#ifdef CONFIG_CASIO_E15
+#define __INS1(s) \
+extern inline void __ins##s(unsigned int port, void * addr, unsigned long count) {
+
+#define __INS2(m) \
+if (count) \
+__asm__ __volatile__ ( \
+ ".set\tnoreorder\n\t" \
+ ".set\tnoat\n" \
+ "1:\tl" #m "\t$1,%4(%5)\n\t" \
+ "subu\t%1,1\n\t" \
+ "s" #m "\t$1,(%0)\n\t" \
+ "bne\t$0,%1,1b\n\t" \
+ "addiu\t%0,%6\n\t" \
+ ".set\tat\n\t" \
+ ".set\treorder"
+#define __INS(m,s,i) \
+__INS1(s) __INS2(m) \
+ : "=r" (addr), "=r" (count) \
+ : "0" (addr), "1" (count), "i" (0), "r" (mips_io_port_base+port), "I" (i) \
+ : "$1");} \
+__INS1(s##c) __INS2(m) \
+ : "=r" (addr), "=r" (count) \
+ : "0" (addr), "1" (count), "ir" (port), "r" (mips_io_port_base), "I" (i) \
+ : "$1");}
+
+__INS(h,w,2)
+
+#define insw(port,addr,count) \
+ __insw((port),(addr),(count))
+
+#else
static inline void insw(unsigned long port, void *addr, unsigned int count)
{
while (count--) {
@@ -324,6 +391,7 @@
addr += 2;
}
}
+#endif
static inline void outsl(unsigned long port, void *addr, unsigned int count)
{
Index: vr41xx-platdep.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/vr41xx-platdep.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- vr41xx-platdep.h 10 Dec 2001 17:39:09 -0000 1.1
+++ vr41xx-platdep.h 7 Mar 2002 09:15:17 -0000 1.2
@@ -67,7 +67,38 @@
#define FB_Y_RES 320
#define FB_BPP 4
#define FB_IS_GREY 1
-#define FB_IS_INVERSE 1
+#define FB_IS_INVERSE 0 //1
+
+// GPIO[27] is speaker power on/off bit
+#define VR41XX_ENABLE_SPEAKER() \
+ { \
+ int flags; \
+ save_and_cli(flags); \
+ *VR41XX_GIUPIODH |= VR41XX_GIUPIODH_GPIO27; \
+ restore_flags(flags); \
+ }
+#define VR41XX_DISABLE_SPEAKER() \
+ { \
+ int flags; \
+ save_and_cli(flags); \
+ *VR41XX_GIUPIODH &= ~VR41XX_GIUPIODH_GPIO27; \
+ restore_flags(flags); \
+ }
+
+/* LCD control management */
+extern void gpiolcd_setup(void);
+extern int gpiolcd_backlight(int n);
+extern int get_gpiolcd_backlight(void);
+extern int gpiolcd_contrast(int n);
+extern int get_gpiolcd_contrast(void);
+extern int gpiolcd_lcdpower(int on);
+#define LCD_SETUP() gpiolcd_setup()
+#define LCD_BACKLIGHT(n) gpiolcd_backlight(n)
+#define GET_LCD_BACKLIGHT() get_gpiolcd_backlight()
+#define LCD_CONTRAST(n) gpiolcd_contrast(n)
+#define GET_LCD_CONTRAST() get_gpiolcd_contrast()
+#define LCD_POWER(n) gpiolcd_lcdpower(n)
+
#endif
#ifdef CONFIG_CASIO_E105
|
|
From: Leblanc f. <fle...@us...> - 2002-03-07 09:15:20
|
Update of /cvsroot/linux-mips/linux/include/linux
In directory usw-pr-cvs1:/tmp/cvs-serv3157/include/linux
Modified Files:
fb.h miscdevice.h
Added Files:
buttons.h tpanel.h
Log Message:
Adds more VR stuff for Cassiopeia E15 Support.
--- NEW FILE: buttons.h ---
/*
* Data defines for button input
*
* This was created for the NEC VR41xx GPIO button driver, but should be
* general enough that it applies to other platforms as well.
*
* Copyright (c) 2000 Michael Klar <wyl...@in...>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#ifndef _LINUX_BUTTONS_H
#define _LINUX_BUTTONS_H
#define BTN_PRESS 0x8000
#define BTN_RELEASE 0
#define BTN_STATE_MASK 0x8000
#define BTN_DATA_MASK 0x0fff
/*
* The button definitions:
*
* Feel free to add more. With 4096 potential vlaues, we're not going to
* run out any time soon. Note that the application types listed for the
* BTN_AP buttons are only suggestions for which AP buttons to assign to
* which physical button based on button icon, and may not be applicable
* to platforms that are not productivity-oriented.
*/
#define BTN_POWER 0 // Button driver might not queue
// BTN_POWER releases (e.g. on VR41xx).
#define BTN_ACTION 1
#define BTN_EXIT 2
#define BTN_UP 3
#define BTN_DOWN 4
#define BTN_CONTRAST 5
#define BTN_BACKLIGHT 6
#define BTN_NORTH 7
#define BTN_SOUTH 8
#define BTN_EAST 9
#define BTN_WEST 10
#define BTN_NOTIFICATION 11
#define BTN_SYNC 12
#define BTN_POWER_GPIO 13 // Power switch also hooked to GPIO to
// detect power button releases.
#define BTN_BATT_DOOR 14
#define BTN_PEN 15
#define BTN_AP1 256 // Task list
#define BTN_AP2 257 // Address book
#define BTN_AP3 258 // Notepad
#define BTN_AP4 259 // Calendar
#define BTN_AP5 260 // Voice recorder
#define BTN_AP6 261
#define BTN_AP7 262
#define BTN_AP8 263
#define BTN_AP9 264
#define BTN_AP10 265
#define BTN_AP11 266
#define BTN_AP12 267
#define BTN_AP13 268
#define BTN_AP14 269
#define BTN_AP15 270
#define BTN_AP16 271
#define BTN_AP17 272
#define BTN_AP18 273
#define BTN_AP19 274
#define BTN_AP20 275
#define BTN_AP21 276
#define BTN_AP22 277
#define BTN_AP23 278
#define BTN_AP24 279
#define BTN_AP25 280
#define BTN_AP26 281
#define BTN_AP27 282
#define BTN_AP28 283
#define BTN_AP29 284
#define BTN_AP30 285
#define BTN_AP31 286
#define BTN_AP32 287
#define BTN_AP33 288
#define BTN_AP34 289
#define BTN_AP35 290
#define BTN_AP36 291
#define BTN_AP37 292
#endif /* _LINUX_BUTTONS_H */
--- NEW FILE: tpanel.h ---
/*
* Touch Panel Data Structures
* by Michael Klar, wyl...@in...
*
* Created for the touch panel interface built into the NEC VR41xx family of
* CPUs, but should be applicable to other touch panel hardware
*/
#ifndef _LINUX_TPANEL_H
#define _LINUX_TPANEL_H
#include <linux/ioctl.h>
/*
* The scan interval and settling time can be set via IOCTL, but the defualt
* of .01 sec and 480us should suffice for most applications. The argument to
* these IOCTL calls is a struct of the values in microseconds, but note that
* the hardware may have a less precise interval. If so, the value will be
* rounded and the actual value returned back.
*/
struct scanparam {
unsigned int interval;
unsigned int settletime;
};
#define TPGETSCANPARM _IOR( 0xB0, 0x00, struct scanparam )
#define TPSETSCANPARM _IOW( 0xB0, 0x01, struct scanparam )
#endif /* _LINUX_TPANEL_H */
Index: fb.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/linux/fb.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- fb.h 17 Aug 2001 22:53:26 -0000 1.2
+++ fb.h 7 Mar 2002 09:15:17 -0000 1.3
@@ -32,6 +32,12 @@
#define FBIOPUT_MODEINFO 0x4617
#define FBIOGET_DISPINFO 0x4618
+/* For Linux VR */
+#define FBIOGET_BACKLIGHT 0x4620
+#define FBIOPUT_BACKLIGHT 0x4621
+#define FBIOGET_CONTRAST 0x4622
+#define FBIOPUT_CONTRAST 0x4623
+#define FBIO_POWER 0x4624
#define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */
#define FB_TYPE_PLANES 1 /* Non interleaved planes */
Index: miscdevice.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/linux/miscdevice.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- miscdevice.h 6 Nov 2001 00:30:47 -0000 1.3
+++ miscdevice.h 7 Mar 2002 09:15:17 -0000 1.4
@@ -13,6 +13,7 @@
#define APOLLO_MOUSE_MINOR 7
#define PC110PAD_MINOR 9
#define ADB_MOUSE_MINOR 10
+#define VR41XX_TPANEL_MINOR 11
#define WATCHDOG_MINOR 130 /* Watchdog timer */
#define TEMP_MINOR 131 /* Temperature Sensor */
#define RTC_MINOR 135
@@ -21,6 +22,7 @@
#define LCD_MINOR 140
#define NVRAM_MINOR 144
#define I2O_MINOR 166
+#define VR41XX_BUTTONS_MINOR 180
#define MICROCODE_MINOR 184
#define GPIO_MINOR 185
#define MWAVE_MINOR 219 /* ACP/Mwave Modem */
|
|
From: Leblanc f. <fle...@us...> - 2002-03-07 09:15:20
|
Update of /cvsroot/linux-mips/linux/drivers/video
In directory usw-pr-cvs1:/tmp/cvs-serv3157/drivers/video
Modified Files:
Config.in Makefile fbmem.c sfb.c
Added Files:
hpcsfb.c
Log Message:
Adds more VR stuff for Cassiopeia E15 Support.
--- NEW FILE: hpcsfb.c ---
/*
* linux/drivers/video/hpcsfb.c
*
* simple framebuffer device w/ HPC device control
*
* For now, this is a crude hack of SFB, which in turn was a crude hack of
* virtual frame buffer by Geert Uytterhoeven.
*
* modified part written by SATO Kazumi.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive for
* more details.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
[...1035 lines suppressed...]
read: hpcsfb_contrast_read,
write: hpcsfb_contrast_write,
};
static struct proc_dir_entry *proc_root_backlight;
static struct proc_dir_entry *proc_root_contrast;
static int __init hpcsfb_proc_init(void)
{
proc_root_backlight = create_proc_entry("backlight",
S_IWUSR | S_IRUGO, &proc_root);
proc_root_backlight->proc_fops = &backlight_fops;
proc_root_contrast = create_proc_entry("contrast",
S_IWUSR | S_IRUGO, &proc_root);
proc_root_contrast->proc_fops = &contrast_fops;
return 0;
}
#endif /* CONFIG_PROC_FS */
Index: Config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/Config.in,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -d -r1.12 -r1.13
--- Config.in 26 Feb 2002 19:03:29 -0000 1.12
+++ Config.in 7 Mar 2002 09:15:16 -0000 1.13
@@ -153,8 +153,9 @@
fi
fi
- tristate ' ITE IT8181 framebuffer support' CONFIG_FB_IT8181
- tristate ' Simple framebuffer support' CONFIG_FB_SIMPLE
+ # Linux VR devices
+ tristate ' Simple Frame Buffer support' CONFIG_FB_SIMPLE
+ tristate ' Simple Frame Buffer with HPC device control (Experimental)' CONFIG_FB_HPCSFB
fi
if [ "$ARCH" = "sparc" -o "$ARCH" = "sparc64" ]; then
bool ' SBUS and UPA framebuffers' CONFIG_FB_SBUS
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/Makefile,v
retrieving revision 1.11
retrieving revision 1.12
diff -u -d -r1.11 -r1.12
--- Makefile 26 Feb 2002 19:03:30 -0000 1.11
+++ Makefile 7 Mar 2002 09:15:16 -0000 1.12
@@ -118,7 +118,9 @@
obj-$(CONFIG_FB_IT8181) += it8181fb.o fbgen.o
obj-$(CONFIG_FB_PVR2) += pvr2fb.o
obj-$(CONFIG_FB_VOODOO1) += sstfb.o
+# For Linux VR
obj-$(CONFIG_FB_SIMPLE) += sfb.o
+obj-$(CONFIG_FB_HPCSFB) += hpcsfb.o
# Generic Low Level Drivers
Index: fbmem.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/fbmem.c,v
retrieving revision 1.16
retrieving revision 1.17
diff -u -d -r1.16 -r1.17
--- fbmem.c 26 Feb 2002 19:03:31 -0000 1.16
+++ fbmem.c 7 Mar 2002 09:15:17 -0000 1.17
@@ -123,8 +123,6 @@
extern int pmagbafb_init(void);
extern int pmagbbfb_init(void);
extern void maxinefb_init(void);
-extern int sfb_init(void);
-extern int sfb_setup(char*);
extern int tx3912fb_init(void);
extern int radeonfb_init(void);
extern int radeonfb_setup(char*);
@@ -140,6 +138,11 @@
extern int mq200fb_setup(char*);
extern int sstfb_init(void);
extern int sstfb_setup(char*);
+/* For Linux VR */
+extern int sfb_init(void);
+extern int sfb_setup(char*);
+extern int hpcsfb_init(void);
+extern int hpcsfb_setup(char*);
static struct {
const char *name;
@@ -316,10 +319,17 @@
#ifdef CONFIG_FB_MAXINE
{ "maxinefb", maxinefb_init, NULL },
#endif
+
+ /*
+ * Linux VR drivers
+ */
+
#ifdef CONFIG_FB_SIMPLE
{ "sfb", sfb_init, sfb_setup },
#endif
-
+#ifdef CONFIG_FB_HPCSFB
+ { "hpcsfb", hpcsfb_init, hpcsfb_setup },
+#endif
/*
* Generic drivers that don't use resource management (yet)
Index: sfb.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/sfb.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- sfb.c 10 Dec 2001 20:27:17 -0000 1.1
+++ sfb.c 7 Mar 2002 09:15:17 -0000 1.2
@@ -27,7 +27,7 @@
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/tty.h>
-#include <linux/malloc.h>
+#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
|
|
From: Leblanc f. <fle...@us...> - 2002-03-07 09:15:19
|
Update of /cvsroot/linux-mips/linux/drivers/sound
In directory usw-pr-cvs1:/tmp/cvs-serv3157/drivers/sound
Modified Files:
Config.in Makefile
Added Files:
vr41xx-sound.c
Log Message:
Adds more VR stuff for Cassiopeia E15 Support.
--- NEW FILE: vr41xx-sound.c ---
/*
linux/drivers/sound/vr41xx.c
VR41XX DMA based 10bit DAC sound driver derived from dmasound.c (of AMIGA)
Copyright (C) 2000,2001 by Hiroshi Kawashima <kaw...@in...>
This is distributed under the GNU GENERAL PUBLIC LICENSE (GPL)
Version 2 (June 1991). See the "COPYING" file distributed with this
software for more info.
*/
/*
**** Supported feature ****
* Linear signed/unsigned 8/16bit big/little endian PCM.
* 8bit A-Law/Mu-Law.
* Stereo -> Mono conversion (just compute average of R/L-ch).
**** Known Limitation ****
[...2265 lines suppressed...]
numBufs = ints[1];
if (ints[2] < MIN_BUFSIZE || ints[2] > MAX_BUFSIZE)
printk("dmasound_setup: illegal buffer size, using default = %d\n", bufSize);
else
bufSize = ints[2];
break;
case 0:
break;
default:
printk("dmasound_setup: illegal number of arguments\n");
return 0;
}
return 1;
}
__setup("dmasound=", dmasound_setup);
#endif /* MODULE */
/* vim:set ts=4:set sw=4: */
Index: Config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/sound/Config.in,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -d -r1.13 -r1.14
--- Config.in 5 Feb 2002 17:25:11 -0000 1.13
+++ Config.in 7 Mar 2002 09:15:16 -0000 1.14
@@ -118,6 +118,11 @@
dep_tristate ' VIA 82C686 Audio Codec' CONFIG_SOUND_VIA82CXXX $CONFIG_PCI
dep_mbool ' VIA 82C686 MIDI' CONFIG_MIDI_VIA82CXXX $CONFIG_SOUND_VIA82CXXX
+# Sound driver for VR41XX
+if [ "$CONFIG_CPU_VR41XX" = "y" ]; then
+ bool ' Enable VR41XX 10bit DAC sound (Very alpha code)' CONFIG_SOUND_VR41XX
+fi
+
dep_tristate ' OSS sound modules' CONFIG_SOUND_OSS $CONFIG_SOUND
if [ "$CONFIG_SOUND_OSS" = "y" -o "$CONFIG_SOUND_OSS" = "m" ]; then
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/sound/Makefile,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -d -r1.12 -r1.13
--- Makefile 28 Jan 2002 21:00:02 -0000 1.12
+++ Makefile 7 Mar 2002 09:15:16 -0000 1.13
@@ -78,6 +78,7 @@
obj-$(CONFIG_SOUND_BT878) += btaudio.o
obj-$(CONFIG_SOUND_EMU10K1) += ac97_codec.o
obj-$(CONFIG_SOUND_RME96XX) += rme96xx.o
+obj-$(CONFIG_SOUND_VR41XX) += vr41xx-sound.o
ifeq ($(CONFIG_MIDI_EMU10K1),y)
obj-$(CONFIG_SOUND_EMU10K1) += sound.o
|
|
From: Leblanc f. <fle...@us...> - 2002-03-07 09:15:19
|
Update of /cvsroot/linux-mips/linux/drivers/char
In directory usw-pr-cvs1:/tmp/cvs-serv3157/drivers/char
Modified Files:
Makefile misc.c
Added Files:
buttons.c e105btns.c gpiobtns.c tpanel.c
Log Message:
Adds more VR stuff for Cassiopeia E15 Support.
--- NEW FILE: buttons.c ---
/*
* VR41xx button input driver
*
* Note that the way this driver does atomic access to buffers is not
* SMP-safe. VR41xx CPUs don't support SMP anyway.
*
* Copyright (c) 2000 Michael Klar <wyl...@in...>
* Copyright (c) 2001 François Leblanc <fra...@ce...>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/sched.h>
#include <linux/signal.h>
#include <linux/errno.h>
#include <linux/poll.h>
#include <linux/miscdevice.h>
#include <linux/init.h>
#ifdef CONFIG_BUTTONS_DIRECT_POWEROFF
#include <linux/reboot.h>
#endif
#ifdef CONFIG_PM_SUSPEND_WAKEUP
#include <asm/power.h>
#endif
#include <linux/buttons.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <asm/vr41xx.h>
#define VRBUTTONS_VERSION "0.1.1"
extern unsigned short gpio_btn_map[];
extern void open_gpio_buttons(void);
extern void close_gpio_buttons(void);
extern unsigned short e105_btn_map[];
extern void open_e105_buttons(void);
extern void close_e105_buttons(void);
// BUFFSIZE must be power of 2
#define BUFFSIZE 16
struct buttons_instance {
struct buttons_instance *next;
struct file *owner;
struct fasync_struct *fasyncptr;
wait_queue_head_t wait;
unsigned char head;
unsigned char tail;
unsigned char buffer[BUFFSIZE];
};
// Implicit NULL initializers:
static struct buttons_instance *buttons_head;
void add_button_data(unsigned char data)
{
struct buttons_instance *btnptr = buttons_head;
while (btnptr) {
// MFK *** maybe implement a mask, so not all buttons have to go to all openers
// otherwise, might as well make the wake_up and kill_fasync global instead of per-open
btnptr->buffer[btnptr->head++] = data;
btnptr->head &= BUFFSIZE - 1;
if (btnptr->head == btnptr->tail) {
btnptr->tail++;
btnptr->tail &= BUFFSIZE - 1;
btnptr->buffer[btnptr->tail] |= 0x40;
}
wake_up_interruptible(&btnptr->wait);
if (btnptr->fasyncptr)
kill_fasync(&btnptr->fasyncptr, SIGIO, POLL_IN);
btnptr = btnptr->next;
}
// printk("button 0x%02x\n", data);
}
static void power_btn_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
add_button_data(0xbf);
*VR41XX_PMUINTREG = 1;
#ifdef CONFIG_BUTTONS_DIRECT_POWEROFF
if(!buttons_head)
machine_halt();
#endif
}
static loff_t llseek_buttons(struct file * file, loff_t offset, int origin)
{
return -ESPIPE;
}
/*
* Read data format (subject to change):
* unsigned short: bit 15: press/release 1 = pressed, 0 = released
* bit 14: data lost flag 1 = data lost (but this data still valid)
* bit 13: reserved
* bit 12: reserved
* bits 0-11: button code
*/
static ssize_t read_buttons(struct file * file,
char * buffer, size_t count, loff_t *ppos)
{
struct buttons_instance *btnptr = file->private_data;
unsigned char bufdat;
unsigned short data;
size_t retcnt = 0;
if (count < sizeof(data))
return -EINVAL;
cli();
while (btnptr->head == btnptr->tail) {
if (file->f_flags & O_NONBLOCK) {
sti();
return -EAGAIN;
}
interruptible_sleep_on(&btnptr->wait);
// sleep_on will sti for us
if (signal_pending(current))
return -ERESTARTSYS;
cli();
}
do {
bufdat = btnptr->buffer[btnptr->tail++];
btnptr->tail &= BUFFSIZE - 1;
sti();
data = (bufdat & 0xc0) << 8;
#ifdef CONFIG_VR41XX_GPIO_BUTTONS
if ((bufdat & 0x3f) < 0x20)
data |= gpio_btn_map[bufdat & 0x1f];
else
#endif
#ifdef CONFIG_VR41XX_E105_BUTTONS
if ((bufdat & 0x3f) < 0x28)
data |= e105_btn_map[bufdat & 0x07];
else
#endif
if ((bufdat & 0x3f) == 0x3f)
data |= BTN_POWER;
if(put_user(data, (short*)(buffer + retcnt)))
return -EFAULT;
retcnt += sizeof(data);
if (retcnt > count - sizeof(data))
return retcnt;
cli();
} while (btnptr->head != btnptr->tail);
sti();
return retcnt;
}
static unsigned int poll_buttons(struct file *file, poll_table * wait)
{
struct buttons_instance *btnptr = file->private_data;
int comp;
poll_wait(file, &btnptr->wait, wait);
cli();
comp = (btnptr->head != btnptr->tail);
sti();
if (comp)
return POLLIN | POLLRDNORM;
return 0;
}
static int ioctl_buttons(struct inode * inode, struct file * file,
unsigned int cmd, unsigned long arg)
{
// Lots of good stuff to be added here
return -EINVAL;
}
static int open_buttons(struct inode * inode, struct file * file)
{
struct buttons_instance *prev = NULL, *btnptr = buttons_head;
while (btnptr) {
// sanity check: make sure same open hasn't already happened
if (btnptr->owner == file)
return -EINVAL;
prev = btnptr;
btnptr = btnptr->next;
}
btnptr = kmalloc(sizeof(struct buttons_instance), GFP_KERNEL);
if (!btnptr)
return -ENOMEM;
memset(btnptr, 0, sizeof(struct buttons_instance));
btnptr->owner = file;
init_waitqueue_head(&btnptr->wait);
// on first open, request IRQs and set to level trigger, active high
// enabling IRQs before buttons_head is assigned causes any pending
// ints to not fill buffer with data, which is probably good
if (!prev) {
#ifdef CONFIG_VR41XX_GPIO_BUTTONS
open_gpio_buttons();
#endif
#ifdef CONFIG_VR41XX_E105_BUTTONS
open_e105_buttons();
#endif
buttons_head = btnptr;
} else {
prev->next = btnptr;
}
file->private_data = btnptr;
return 0;
}
static int fasync_buttons(int fd, struct file * file, int on)
{
struct buttons_instance *btnptr = file->private_data;
int retval;
retval = fasync_helper(fd, file, on, &btnptr->fasyncptr);
if (retval < 0)
return retval;
return 0;
}
static int release_buttons(struct inode * inode, struct file * file)
{
struct buttons_instance *prev = NULL, *btnptr = buttons_head;
fasync_buttons(-1, file, 0);
while (btnptr) {
if ((btnptr->owner == file) || (btnptr == file->private_data))
break;
prev = btnptr;
btnptr = btnptr->next;
}
if (btnptr) {
if (!prev)
buttons_head = btnptr->next;
else
prev->next = btnptr->next;
kfree(btnptr);
} else { // shouldn't ever happen
if (file->private_data)
kfree(file->private_data);
}
// free IRQs on last close
if (!buttons_head) {
#ifdef CONFIG_VR41XX_GPIO_BUTTONS
close_gpio_buttons();
#endif
#ifdef CONFIG_VR41XX_E105_BUTTONS
close_e105_buttons();
#endif
}
file->private_data = NULL;
return 0;
}
struct file_operations vr41xx_buttons_fops = {
llseek: llseek_buttons,
read: read_buttons,
poll: poll_buttons,
ioctl: ioctl_buttons,
open: open_buttons,
release: release_buttons,
fasync: fasync_buttons,
};
static struct miscdevice vr41xx_buttons = {
VR41XX_BUTTONS_MINOR, "vrbuttons", &vr41xx_buttons_fops
};
int __init vr41xx_buttons_init(void)
{
int retval;
printk (KERN_INFO"VR41xx button input driver version "VRBUTTONS_VERSION"\n");
#ifdef CONFIG_VR41XX_E105_BUTTONS
printk (KERN_INFO "E105 buttons mapping configured\n");
#endif
retval = misc_register(&vr41xx_buttons);
if (retval < 0)
return retval;
// always have power buton active, other buttons active only on first open
if (request_irq(VR41XX_IRQ_POWER, power_btn_interrupt, SA_SAMPLE_RANDOM |
SA_INTERRUPT, "vrbuttons", NULL))
printk(KERN_ERR "vrbuttons: Unable to get power button IRQ.\n");
return 0;
}
--- NEW FILE: e105btns.c ---
/* $Id: e105btns.c,v 1.1 2002/03/07 09:15:16 fleblanc Exp $
*
* Casio E-10x/50x input button (sub)driver
*
* Original driver by Robert Coie, modified and integrated into main VR41xx
* buttons driver by Michael Klar.
*
* Copyright (c) 1999, Robert Coie <ra...@in...>
* Copyright (c) 2000, Michael Klar, mf...@po...
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/signal.h>
#include <linux/ioport.h>
#include <linux/buttons.h>
#include <asm/io.h>
#include <asm/vr41xx.h>
extern void add_button_data(unsigned char);
#define E105_BUTTONS_GPIO 9
#define E105_BUTTONS_IRQ VR41XX_IRQ_GPIO(E105_BUTTONS_GPIO)
#define E105_BUTTONS_MASK (1 << E105_BUTTONS_GPIO)
#define E105_BUTTONS_PORT 0xA018
#define E105_BUTTONS_DEV_ID ((void *) 0x45357878) /* 'E5xx' */
const unsigned short e105_btn_map[] = { BTN_UP, BTN_DOWN, BTN_ACTION,
BTN_EXIT, BTN_NORTH, BTN_SOUTH, BTN_EAST, BTN_WEST };
struct e105_buttons_device_t {
struct timer_list timer;
u8 status;
volatile char bounce;
};
static struct e105_buttons_device_t buttons;
// this is only called from int handler if no timer active, so not reentrant
//
static void
process_e105_buttons(void)
{
u8 new_status, diff_status;
int i;
diff_status = buttons.status;
buttons.status = new_status = inb(E105_BUTTONS_PORT);
diff_status ^= new_status;
if (diff_status == 0)
return;
for (i = 0; i < 8; i++)
if (diff_status & (1 << i))
add_button_data((new_status & (1 << i) ? 0 : 0x80) |
(i + 0x20));
}
static void
e105_button_timer(unsigned long data)
{
// if bouncing, just unmark bounce and go on, will handle data
// next timer tick
if (buttons.bounce) {
buttons.bounce = 0;
} else {
process_e105_buttons();
if (!buttons.status) {
unsigned long flags;
// handle potential race with int handler:
save_and_cli(flags);
if (!buttons.bounce) {
buttons.timer.data = 0;
restore_flags(flags);
return;
}
restore_flags(flags);
}
}
buttons.timer.expires = jiffies + (HZ + 99)/100;
add_timer(&buttons.timer);
}
static void
e105_buttons_interrupt(int irq, void * dev_id, struct pt_regs * regs)
{
// flip active level for interrupt to opposite of current pin state
if (*VR41XX_GIUPIODL & E105_BUTTONS_MASK)
*VR41XX_GIUINTALSELL &= ~E105_BUTTONS_MASK;
else
*VR41XX_GIUINTALSELL |= E105_BUTTONS_MASK;
// if timer not already active, activate it
// this is only case for first button press if multiple buttons
// pressed simulateously
if (!buttons.timer.data) {
buttons.timer.expires = jiffies + (HZ + 99)/100 + 1;
buttons.timer.data = 1;
add_timer(&buttons.timer);
process_e105_buttons();
}
// otherwise just mark as (still) bouncing
buttons.bounce = 1;
}
void open_e105_buttons(void)
{
if (check_region(E105_BUTTONS_PORT, 1))
return;
init_timer(&buttons.timer);
buttons.timer.function = &e105_button_timer;
// see README.GIU for explaination of why cli/sti
cli();
*VR41XX_GIUINTTYPL &= ~E105_BUTTONS_MASK;
*VR41XX_GIUINTALSELL |= E105_BUTTONS_MASK;
sti();
if (request_irq(E105_BUTTONS_IRQ, e105_buttons_interrupt,
SA_SHIRQ | SA_SAMPLE_RANDOM | SA_INTERRUPT,
"E105buttons", E105_BUTTONS_DEV_ID));
return;
request_region(E105_BUTTONS_PORT, 1, "E105buttons");
}
void close_e105_buttons(void)
{
free_irq(E105_BUTTONS_IRQ, E105_BUTTONS_DEV_ID);
del_timer_sync(&buttons.timer);
buttons.status = 0;
buttons.bounce = 0;
release_region(E105_BUTTONS_PORT, 1);
}
--- NEW FILE: gpiobtns.c ---
/* $Id: gpiobtns.c,v 1.1 2002/03/07 09:15:16 fleblanc Exp $
*
* GPIO button functions for VR41xx button input driver
*
* Note that the way this driver does atomic access to buffers is not
* SMP-safe. VR41xx CPUs don't support SMP anyway.
*
* Copyright (c) 2000 Michael Klar <wyl...@in...>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/signal.h>
#include <linux/timer.h>
#include <linux/buttons.h>
#include <asm/vr41xx-platdep.h>
extern void add_button_data(unsigned char);
#ifdef CONFIG_CPU_VR4181
typedef u16 btn_mask_t;
#define NUM_GPIO_IRQS 16
#else
#ifdef CONFIG_HAS_VRC4173
typedef u64 btn_mask_t;
#define NUM_GPIO_IRQS 52
#else
typedef u32 btn_mask_t;
#define NUM_GPIO_IRQS 32
#endif
#endif
#ifdef GPIO_BTN_MAP
unsigned short gpio_btn_map[NUM_GPIO_IRQS] = GPIO_BTN_MAP;
#else
#warning "No GPIO button map defined, using default blank map"
// Implicit 0 initializer:
unsigned short gpio_btn_map[NUM_GPIO_IRQS];
#endif
struct gpiobtns_device {
struct timer_list btn_timer;
btn_mask_t btn_timer_data;
btn_mask_t btn_state;
btn_mask_t btn_bounce;
btn_mask_t pending_bits;
unsigned char press_low;
};
#ifdef GPIO_BTN_PRESS_LOW
static struct gpiobtns_device gpiob = { { }, 0, 0, 0, 0, 0x80 };
#else
static struct gpiobtns_device gpiob;
#endif
#ifdef CONFIG_HAS_VRC4173
extern void vrc4173_init_buttons(void);
extern void vrc4173_close_buttons(void);
extern btn_mask_t vrc4173_gpio_state(void);
#endif
static void debounce_timer_event(unsigned long data)
{
btn_mask_t curstate, same, mask;
int i;
long flags;
// This is fairly nasty, but we need to make sure no button interrupt
// happens while we're tweaking the debounce bits
save_and_cli(flags);
// reread data rather than trust passed arg, since int handler may
// have added bits
mask = gpiob.btn_timer_data;
#ifdef CONFIG_CPU_VR4181
curstate = *VR41XX_GPDATLREG;
#else
curstate = *VR41XX_GIUPIODL | ((btn_mask_t)*VR41XX_GIUPIODH << 16);
#ifdef CONFIG_HAS_VRC4173
curstate |= vrc4173_gpio_state();
#endif
#endif
gpiob.btn_state ^= mask;
same = (curstate ^ gpiob.btn_state) & mask;
gpiob.btn_bounce &= ~(same ^ mask);
// if state is same as before transition detected, we either missed a
// transition, or button switched state for real during debounce period
if (same)
for (i = 0; i < NUM_GPIO_IRQS; i++)
if (same & ((btn_mask_t)1 << i))
add_button_data((((gpiob.btn_state & ((btn_mask_t)1 << i)) ?
0 : 0x80) ^ gpiob.press_low) | i);
gpiob.btn_timer_data = gpiob.pending_bits | same;
gpiob.pending_bits = 0;
if (gpiob.btn_timer_data) {
gpiob.btn_timer.expires = jiffies + (HZ + 99)/100;
add_timer(&gpiob.btn_timer);
}
restore_flags(flags);
}
void gpio_handle_btn_interrupt(int gpio)
{
btn_mask_t gpiobit;
// shouldn't get a non-button irq, but just in case...
if (!gpio_btn_map[gpio])
return;
gpiobit = (btn_mask_t)1 << gpio;
if (gpiob.btn_bounce & gpiobit)
return;
// add data as opposite of previous state, rather than current pin state
add_button_data((((gpiob.btn_state & gpiobit) ? 0 : 0x80) ^
gpiob.press_low)| gpio);
gpiob.btn_bounce |= gpiobit;
// debounce for at least 10ms past end of current timer tick
// if timer event not active yet, just activate it for this bit
if (!gpiob.btn_timer_data) {
gpiob.btn_timer.expires = jiffies + (HZ + 99)/100 + 1;
gpiob.btn_timer_data = gpiobit;
add_timer(&gpiob.btn_timer);
return;
}
// if timer event already active at right time, add this bit
if (time_after_eq(gpiob.btn_timer.expires, jiffies + (HZ + 99)/100 + 1)) {
gpiob.btn_timer_data |= gpiobit;
return;
}
// otherwise, wait until the timer event to (re)activate for this bit
gpiob.pending_bits |= gpiobit;
}
static void gpio_btn_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
unsigned short bit;
int gpio = irq - 40;
// flip active level for interrupt to opposite of current pin state
#ifdef CONFIG_CPU_VR4181
bit = 1 << ((gpio & 7) * 2);
if (*VR41XX_GPDATLREG & (1 << gpio))
*(gpio < 8 ? VR41XX_GPINTTYPL : VR41XX_GPINTTYPH) &= ~bit;
else
*(gpio < 8 ? VR41XX_GPINTTYPL : VR41XX_GPINTTYPH) |= bit;
#else
bit = 1 << (gpio & 15);
if (*(gpio < 16 ? VR41XX_GIUPIODL : VR41XX_GIUPIODH) & bit)
*(gpio < 16 ? VR41XX_GIUINTALSELL : VR41XX_GIUINTALSELH) &= ~bit;
else
*(gpio < 16 ? VR41XX_GIUINTALSELL : VR41XX_GIUINTALSELH) |= bit;
#endif
gpio_handle_btn_interrupt(gpio);
}
void open_gpio_buttons(void)
{
int i;
unsigned short bits;
init_timer(&gpiob.btn_timer);
gpiob.btn_timer.function = &debounce_timer_event;
for (i = 0; i < NUM_GPIO_IRQS; i++) {
if (!(gpio_btn_map[i]))
continue;
#ifdef CONFIG_CPU_VR4181
bits = 0x0003 << ((i & 7) * 2);
if (*(i < 8 ? VR41XX_GPMD0REG : VR41XX_GPMD1REG) & bits) {
gpio_btn_map[i] = 0;
continue;
}
// see README.GIU for explanation of why cli/sti
cli();
*(i < 8 ? VR41XX_GPINTTYPL : VR41XX_GPINTTYPH) |= bits;
#else
#ifdef CONFIG_HAS_VRC4173
if (i >= 32)
break;
#endif
bits = 1 << (i & 15);
if (*(i < 16 ? VR41XX_GIUIOSELL : VR41XX_GIUIOSELH) & bits) {
gpio_btn_map[i] = 0;
continue;
}
// see README.GIU for explanation of why cli/sti
cli();
*(i < 16 ? VR41XX_GIUINTTYPL : VR41XX_GIUINTTYPH) &= ~bits;
*(i < 16 ? VR41XX_GIUINTALSELL : VR41XX_GIUINTALSELH) |= bits;
*(i < 16 ? VR41XX_GIUINTHTSELL : VR41XX_GIUINTHTSELH) |= bits;
#endif
sti();
if (request_irq(i + 40, gpio_btn_interrupt, SA_SAMPLE_RANDOM |
SA_INTERRUPT, "vrbuttons", NULL))
gpio_btn_map[i] = 0;
}
#ifdef CONFIG_HAS_VRC4173
vrc4173_init_buttons();
#endif
}
void close_gpio_buttons(void)
{
int i;
for (i = 0; i < NUM_GPIO_IRQS; i++)
if (gpio_btn_map[i])
free_irq(i + 40, NULL);
gpiob.pending_bits = 0;
del_timer(&gpiob.btn_timer);
gpiob.btn_state = 0;
gpiob.btn_bounce = 0;
#ifdef CONFIG_HAS_VRC4173
vrc4173_close_buttons();
#endif
}
--- NEW FILE: tpanel.c ---
/*
* VR41xx Touch Panel Driver
*
* Copyright (c) 1999,2000 Michael Klar, mf...@po...
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
// This is used to enable the /proc/piuinfo interface to return
// diagnostic info on PIU state and events:
// #define DEBUG_TIMING_PARAMS
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/signal.h>
#include <linux/errno.h>
#include <linux/mm.h>
#include <linux/poll.h>
#include <linux/miscdevice.h>
#include <linux/random.h>
#include <linux/init.h>
#include <linux/pm.h>
#ifdef DEBUG_TIMING_PARAMS
#include <linux/proc_fs.h>
#endif
#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <asm/vr41xx.h>
#include <linux/tpanel.h>
#define TPANEL_VERSION "0.1.0"
// BUFFSIZE can be increased, but it must be a power of 2
#define BUFFSIZE 128
struct tpanel_status {
unsigned int buffer[BUFFSIZE];
unsigned char head;
unsigned char tail;
unsigned char lostflag;
unsigned char lastcontact;
wait_queue_head_t wait;
struct fasync_struct *fasyncptr;
int active;
#ifdef DEBUG_TIMING_PARAMS
unsigned short orig_scanint;
unsigned short orig_settletime;
unsigned int dropped_count;
unsigned int overflow_count;
unsigned int incompletescan_count;
unsigned int dualpagevalid_count;
unsigned int unhandledint_count;
#endif
};
static struct tpanel_status tpanel;
static void tpanel_add_data(unsigned int data1, unsigned int data2)
{
unsigned int errcnt;
tpanel.buffer[tpanel.head++] = data1 | ((unsigned int)tpanel.lostflag << 28);
tpanel.buffer[tpanel.head++] = data2;
tpanel.head &= (BUFFSIZE - 1);
if (tpanel.head == tpanel.tail) {
errcnt = tpanel.buffer[tpanel.tail] & 0xff;
if (!(tpanel.buffer[tpanel.tail] & 0x80000000)) {
errcnt++;
if (!(errcnt & 0xff))
errcnt = 0xff;
}
errcnt |= tpanel.buffer[tpanel.tail] & 0x10000000;
tpanel.tail += 2;
tpanel.tail &= (BUFFSIZE - 1);
tpanel.buffer[tpanel.tail] = (tpanel.buffer[tpanel.tail] & 0xffffff00) |
0x20000000 | errcnt;
#ifdef DEBUG_TIMING_PARAMS
tpanel.dropped_count++;
#endif
}
tpanel.lostflag = 0;
}
static void tpanel_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
unsigned int cschange = 0, data1 = 0, data2 = 0;
unsigned short intreg, pendown;
*VR41XX_PIUCNTREG = 0x0326; // sometimes bits get reset in this reg
barrier(); // so we just reinitialize it
while ((intreg = (*VR41XX_PIUINTREG & 0x807d)) || cschange) {
pendown = *VR41XX_PIUCNTREG & 0x2000;
if (tpanel.lastcontact != (pendown >> 13)) {
cschange = 1;
#ifdef CONFIG_CPU_VR4181
// VR4181 has extra clock mask bits, but they apply to AIU also
// MFK: so add in coordination with AIU...
// these extra bits only have to be on for actual scanning
// not for wait-for-pen-touch
if (pendown) {
*VR41XX_CMUCLKMSK |= VR41XX_CMUCLKMSK_MSKADUPCLK |
VR41XX_CMUCLKMSK_MSKADU18M;
} else {
*VR41XX_CMUCLKMSK &= ~(VR41XX_CMUCLKMSK_MSKADUPCLK |
VR41XX_CMUCLKMSK_MSKADU18M);
}
#endif
}
tpanel.lastcontact = pendown >> 13;
if (intreg & VR41XX_PIUINTREG_PENCHG) {
*VR41XX_PIUINTREG = VR41XX_PIUINTREG_PENCHG;
}
// PADDLOST interrupt: datapoint lost, just report it
// (after processing data and pen-down)
if (((intreg & (VR41XX_PIUINTREG_PADDLOST | VR41XX_PIUINTREG_PADPAGE0 |
VR41XX_PIUINTREG_PADPAGE1)) == VR41XX_PIUINTREG_PADDLOST) &&
!(cschange && pendown)) {
*VR41XX_PIUINTREG = VR41XX_PIUINTREG_PADDLOST;
barrier();
*VR41XX_PIUCNTREG = 0x0022;
barrier();
pendown = *VR41XX_PIUCNTREG & 0x2000;
if (tpanel.lastcontact != (pendown >> 13))
cschange = 1;
tpanel.lastcontact = pendown >> 13;
if (pendown) {
*VR41XX_PIUCNTREG = 0x0062;
barrier();
*VR41XX_PIUCNTREG = 0x0066; // force manual scan
} else {
*VR41XX_PIUCNTREG = 0x0322;
barrier();
*VR41XX_PIUCNTREG = 0x0326; // resume autoscan
}
tpanel.lostflag = 1;
#ifdef DEBUG_TIMING_PARAMS
if ((intreg & (VR41XX_PIUINTREG_PADPAGE1 | VR41XX_PIUINTREG_PADPAGE0))
== (VR41XX_PIUINTREG_PADPAGE1 | VR41XX_PIUINTREG_PADPAGE0))
tpanel.overflow_count++;
else
tpanel.incompletescan_count++;
#endif
}
// Panel contact state change interrupt
// If pen-up, do data ints first
if (cschange && (pendown || !(intreg & (VR41XX_PIUINTREG_PADPAGE0 |
VR41XX_PIUINTREG_PADPAGE1)))) {
data1 = (pendown | 0x4000) << 17;
tpanel_add_data(data1, 0);
cschange = 0;
}
// PADCMD and PADADP shouldn't happen
if (intreg & (VR41XX_PIUINTREG_PADCMD | VR41XX_PIUINTREG_PADADP)) {
*VR41XX_PIUINTREG = VR41XX_PIUINTREG_PADCMD |
VR41XX_PIUINTREG_PADADP;
#ifdef DEBUG_TIMING_PARAMS
tpanel.unhandledint_count++;
#endif
}
// Data buffer interrupt
if (intreg & VR41XX_PIUINTREG_PADPAGE0) {
#ifdef DEBUG_TIMING_PARAMS
if (intreg & VR41XX_PIUINTREG_PADPAGE1)
tpanel.dualpagevalid_count++;
#endif
if ((intreg & (VR41XX_PIUINTREG_PADPAGE1 | VR41XX_PIUINTREG_OVP))
!= (VR41XX_PIUINTREG_PADPAGE1 | VR41XX_PIUINTREG_OVP)) {
data1 = 0x40000000 |
((*VR41XX_PIUPB01REG & 0x3ff) << 18) |
((*VR41XX_PIUPB00REG & 0x3ff) << 8);
data2 = ( *VR41XX_PIUPB03REG << 20) |
((*VR41XX_PIUPB02REG & 0x3ff) << 10) |
( *VR41XX_PIUPB04REG & 0x3ff);
tpanel_add_data(data1, data2);
*VR41XX_PIUINTREG = VR41XX_PIUINTREG_PADPAGE0;
}
}
if (intreg & VR41XX_PIUINTREG_PADPAGE1) {
data1 = 0x40000000 |
((*VR41XX_PIUPB11REG & 0x3ff) << 18) |
((*VR41XX_PIUPB10REG & 0x3ff) << 8);
data2 = ( *VR41XX_PIUPB13REG << 20) |
((*VR41XX_PIUPB12REG & 0x3ff) << 10) |
( *VR41XX_PIUPB14REG & 0x3ff);
tpanel_add_data(data1, data2);
*VR41XX_PIUINTREG = VR41XX_PIUINTREG_PADPAGE1;
}
}
if (data1) {
add_mouse_randomness(data1);
if (data2)
add_mouse_randomness(data2);
wake_up_interruptible(&tpanel.wait);
if (tpanel.fasyncptr)
kill_fasync(&tpanel.fasyncptr, SIGIO, POLL_IN);
}
}
static int fasync_tpanel(int fd, struct file *filp, int on)
{
int retval;
retval = fasync_helper(fd, filp, on, &tpanel.fasyncptr);
if (retval < 0)
return retval;
return 0;
}
static int close_tpanel(struct inode * inode, struct file * file)
{
fasync_tpanel(-1, file, 0);
if (--tpanel.active)
return 0;
// set for standby
*VR41XX_MPIUINTREG = 0;
*VR41XX_PIUCNTREG = 0;
free_irq(VR41XX_IRQ_PIU, NULL);
cli();
*VR41XX_CMUCLKMSK &= ~VR41XX_CMUCLKMSK_MSKPIU;
#ifdef CONFIG_CPU_VR4181
// MFK: coordinate with AIU driver
*VR41XX_CMUCLKMSK &= ~VR41XX_CMUCLKMSK_MSKADUPCLK | VR41XX_CMUCLKMSK_MSKADU18M;
#endif
sti();
MOD_DEC_USE_COUNT;
return 0;
}
static int open_tpanel(struct inode * inode, struct file * file)
{
if (tpanel.active++)
return 0;
cli();
*VR41XX_CMUCLKMSK |= VR41XX_CMUCLKMSK_MSKPIU;
sti();
*VR41XX_MPIUINTREG = 0;
barrier();
tpanel.tail = tpanel.head;
tpanel.lastcontact = 0;
// set up for autoscan
*VR41XX_PIUCNTREG = 0x0322; // autoscan, sequence suspended
*VR41XX_PIUSIVLREG = 333; // set interval to .01 sec default
*VR41XX_PIUSTBLREG = 16;
barrier();
*VR41XX_MPIUINTREG = 0x007d;
*VR41XX_PIUINTREG = 0x007d; // clear any pending ints
barrier();
if (request_irq(VR41XX_IRQ_PIU, tpanel_interrupt, SA_SHIRQ, "vr41xxtpanel", NULL)) {
tpanel.active--;
return -EBUSY;
}
MOD_INC_USE_COUNT;
barrier();
*VR41XX_PIUCNTREG = 0x0326; // autoscan, sequence enabled
return 0;
}
/*
* Read touch panel data.
*
* Data format:
* unsigned short status: bit 15 = xyz data valid (0 means contact state only)
* bit 14 = pen contact state (1 means contact)
* bit 13 = soft data lost flag: if this is 1, this data
* is valid (if bit 15 is 1), but data was lost
* between this point and the previous point
* due to a buffer overrun in the driver
* bit 12 = hard data lost flag: if this is 1, this point
* is valid (if bit 15 is 1), but data was lost
* between this point and the previous point
* due to hardware error
* bits 11-8 = reserved
* bits 7-0 = count of how many data packet lost, if hard
* or soft error is falgged
* unsigned short x+ raw data (if status:15 = 1)
* unsigned short x- raw data (if status:15 = 1)
* unsigned short y+ raw data (if status:15 = 1)
* unsigned short y- raw data (if status:15 = 1)
* unsigned short z (pressure) raw data (if status:15 = 1)
*
* x+, x-, y+, and y- are limited to range 0-1023 for this hardware. Each +/-
* pair is somewhat redundant: the + value can be used as is, but using the
* difference (eg. (x+) - (x-)) will produce a more accurate result. Further
* manipulation and/or statistical analysis may be required for best accuracy.
*
* No calibration is done on the driver side, that is expected to be done on
* the user side.
*/
static ssize_t read_tpanel(struct file * file,
char * buffer, size_t count, loff_t *ppos)
{
unsigned int data1, data2;
size_t retcnt = 0;
if (count < 12)
return -EINVAL;
// We need to access the circular buffer atomic to
// anything else that will read or write it
cli();
while (tpanel.head == tpanel.tail) {
if (file->f_flags & O_NONBLOCK) {
sti();
return -EAGAIN;
}
interruptible_sleep_on(&tpanel.wait);
// sleep_on will sti for us
if (signal_pending(current))
return -ERESTARTSYS;
cli();
}
do {
data1 = tpanel.buffer[tpanel.tail++];
data2 = tpanel.buffer[tpanel.tail++];
tpanel.tail &= BUFFSIZE - 1;
sti();
if (!access_ok(VERIFY_WRITE, buffer + retcnt, 12))
return -EFAULT;
__put_user((((data1 >> 16) & 0xf000) | (data1 & 0x00ff)) ^ 0x8000,
(short*)(buffer + retcnt));
__put_user((data1 >> 18) & 0x03ff, (short*)(buffer + retcnt + 2));
__put_user((data1 >> 8) & 0x03ff, (short*)(buffer + retcnt + 4));
__put_user((data2 >> 20) & 0x03ff, (short*)(buffer + retcnt + 6));
__put_user((data2 >> 10) & 0x03ff, (short*)(buffer + retcnt + 8));
__put_user(data2 & 0x03ff, (short*)(buffer + retcnt + 10));
retcnt += 12;
if (retcnt > count - 12)
return retcnt;
cli();
} while (tpanel.head != tpanel.tail);
sti();
return retcnt;
}
static unsigned int poll_tpanel(struct file *file, poll_table * wait)
{
int comp;
poll_wait(file, &tpanel.wait, wait);
cli();
comp = (tpanel.head != tpanel.tail);
sti();
if (comp)
return POLLIN | POLLRDNORM;
return 0;
}
static int ioctl_tpanel(struct inode * inode, struct file * file,
unsigned int cmd, unsigned long arg)
{
struct scanparam *sparm;
unsigned int i1, i2;
sparm = (struct scanparam *)arg;
switch (cmd) {
case TPGETSCANPARM:
i1 = *VR41XX_PIUSIVLREG * 30; // PIUSIVLREG is in 30us units
if (put_user(i1, &sparm->interval))
return -EFAULT;
i2 = *VR41XX_PIUSTBLREG * 30; // PIUSTBLREG is in 30us units
if (put_user(i2, &sparm->settletime))
return -EFAULT;
return 0;
case TPSETSCANPARM:
if (get_user(i1, &sparm->interval))
return -EFAULT;
i1 = (i1 + 15) / 30;
if (i1 > 0x07ff)
return -EINVAL;
if (get_user(i2, &sparm->settletime))
return -EFAULT;
i2 = (i2 + 15) / 30;
if (i2 > 0x003f)
return -EINVAL;
*VR41XX_PIUSIVLREG = (unsigned short)i1;
*VR41XX_PIUSTBLREG = (unsigned short)i2;
__put_user(i1 * 30, &sparm->interval);
__put_user(i2 * 30, &sparm->settletime);
return 0;
default:
return -EINVAL;
}
}
struct file_operations vr41xx_tpanel_fops = {
read: read_tpanel,
poll: poll_tpanel,
ioctl: ioctl_tpanel,
open: open_tpanel,
release: close_tpanel,
fasync: fasync_tpanel,
};
static struct miscdevice vr41xx_tpanel = {
VR41XX_TPANEL_MINOR, "vr41xxtpanel", &vr41xx_tpanel_fops
};
#ifdef DEBUG_TIMING_PARAMS
static int get_piuinfo(char *page, char **start, off_t off,
int count, int *eof, void *data)
{
int len;
// return lots of nifty diagnostic info
// buffer is PAGE_SIZE long, we're OK for all page sizes VR41xx supports
len = sprintf(page,
"piucntreg: 0x%04hx\n"
"piusivlreg: 0x%04hx\n"
"piustblreg: 0x%04hx\n"
"orig piusivlreg: 0x%04hx\n"
"orig piustblreg: 0x%04hx\n"
"dropped data count: %d\n"
"page overflow count: %d\n"
"bad scan count: %d\n"
"dual page count: %d\n"
"unhandled int count: %d\n",
*VR41XX_PIUCNTREG, *VR41XX_PIUSIVLREG, *VR41XX_PIUSTBLREG,
tpanel.orig_scanint, tpanel.orig_settletime, tpanel.dropped_count,
tpanel.overflow_count, tpanel.incompletescan_count,
tpanel.dualpagevalid_count, tpanel.unhandledint_count);
if (len <= off+count) *eof = 1;
*start = page + off;
len -= off;
if (len > count) len = count;
if (len < 0) len = 0;
return len;
}
#endif
#ifdef CONFIG_PM
static int pm_tpanel_request(struct pm_dev *dev, pm_request_t rqst, void *data)
{
static unsigned short piu_state[4];
switch (rqst) {
case PM_SUSPEND:
piu_state[0] = *VR41XX_PIUCNTREG;
piu_state[1] = *VR41XX_PIUSIVLREG;
piu_state[2] = *VR41XX_PIUSTBLREG;
piu_state[3] = *VR41XX_MPIUINTREG;
break;
case PM_RESUME:
*VR41XX_PIUCNTREG = piu_state[0];
*VR41XX_PIUSIVLREG = piu_state[1];
*VR41XX_PIUSTBLREG = piu_state[2];
*VR41XX_PIUINTREG = ~0;
barrier();
*VR41XX_MPIUINTREG = piu_state[3];
break;
}
return 0;
}
#endif
int __init vr41xx_tpanel_init(void)
{
#ifdef DEBUG_TIMING_PARAMS
*VR41XX_CMUCLKMSK |= VR41XX_CMUCLKMSK_MSKPIU;
barrier();
tpanel.orig_scanint = *VR41XX_PIUSIVLREG;
tpanel.orig_settletime = *VR41XX_PIUSTBLREG;
tpanel.dropped_count = 0;
tpanel.overflow_count = 0;
tpanel.incompletescan_count = 0;
tpanel.dualpagevalid_count = 0;
tpanel.unhandledint_count = 0;
create_proc_read_entry("piuinfo", 0, NULL, get_piuinfo, NULL);
#endif
// power down outputs and reset the PIU
*VR41XX_PIUCNTREG = VR41XX_PIUCNTREG_PIUPWR;
tpanel.active = 0;
tpanel.head = tpanel.tail = 0;
init_waitqueue_head(&tpanel.wait);
tpanel.fasyncptr = NULL;
printk(KERN_INFO "VR41xx touch panel initialized, using IRQ %d version "TPANEL_VERSION"\n",
VR41XX_IRQ_PIU);
misc_register(&vr41xx_tpanel);
#ifdef CONFIG_PM
pm_register(PM_ISA_DEV, PM_SYS_UNKNOWN, pm_tpanel_request);
#endif
// clocks remained masked until the touch panel device is opened
*VR41XX_CMUCLKMSK &= ~VR41XX_CMUCLKMSK_MSKPIU;
#ifdef CONFIG_CPU_VR4181
// MFK: coordinate with AIU
*VR41XX_CMUCLKMSK &= ~VR41XX_CMUCLKMSK_MSKADUPCLK | VR41XX_CMUCLKMSK_MSKADU18M;
#endif
return 0;
}
#ifdef MODULE
int init_module(void)
{
return vr41xx_tpanel_init();
}
void cleanup_module(void)
{
misc_deregister(&vr41xx_tpanel);
}
#endif
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/char/Makefile,v
retrieving revision 1.26
retrieving revision 1.27
diff -u -d -r1.26 -r1.27
--- Makefile 26 Feb 2002 17:46:07 -0000 1.26
+++ Makefile 7 Mar 2002 09:15:16 -0000 1.27
@@ -258,6 +258,10 @@
obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o
obj-$(CONFIG_INDYDOG) += indydog.o
obj-$(CONFIG_VR41XX_WDT) += vr41xxwdt.o
+obj-$(CONFIG_BUTTONS) += buttons.o
+obj-$(CONFIG_VR41XX_GPIO_BUTTONS) += gpiobtns.o
+obj-$(CONFIG_VR41XX_E105_BUTTONS) += e105btns.o
+obj-$(CONFIG_TOUCH_PANEL) += tpanel.o
subdir-$(CONFIG_MWAVE) += mwave
ifeq ($(CONFIG_MWAVE),y)
Index: misc.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/char/misc.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- misc.c 6 Nov 2001 09:10:21 -0000 1.5
+++ misc.c 7 Mar 2002 09:15:16 -0000 1.6
@@ -66,6 +66,8 @@
static unsigned char misc_minors[DYNAMIC_MINORS / 8];
extern int psaux_init(void);
+extern int vr41xx_tpanel_init(void);
+extern int vr41xx_buttons_init(void);
#ifdef CONFIG_SGI_NEWPORT_GFX
extern void gfx_register(void);
#endif
@@ -253,6 +255,16 @@
int __init misc_init(void)
{
create_proc_read_entry("misc", 0, 0, misc_read_proc, NULL);
+#ifdef CONFIG_TOUCH_PANEL
+#if defined(CONFIG_CPU_VR41XX) && !defined(CONFIG_HAS_VRC4173)
+ vr41xx_tpanel_init();
+#endif
+#endif
+#ifdef CONFIG_BUTTONS
+#ifdef CONFIG_CPU_VR41XX
+ vr41xx_buttons_init();
+#endif
+#endif
#ifdef CONFIG_MVME16x
rtc_MK48T08_init();
#endif
|
|
From: Leblanc f. <fle...@us...> - 2002-03-07 09:15:19
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv3157/arch/mips/kernel Modified Files: head.S scall_o32.S Log Message: Adds more VR stuff for Cassiopeia E15 Support. Index: head.S =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/head.S,v retrieving revision 1.13 retrieving revision 1.14 diff -u -d -r1.13 -r1.14 --- head.S 26 Feb 2002 17:34:14 -0000 1.13 +++ head.S 7 Mar 2002 09:15:16 -0000 1.14 @@ -27,6 +27,9 @@ #include <asm/cachectl.h> #include <asm/mipsregs.h> #include <asm/stackframe.h> +#ifdef CONFIG_PM_SUSPEND_WAKEUP +#include <asm/power.h> +#endif __INIT @@ -115,6 +118,92 @@ /* The following two symbols are used for kernel profiling. */ EXPORT(stext) EXPORT(_stext) + +#ifdef CONFIG_PM_SUSPEND_WAKEUP + .set reorder + + // Check if we were hibernating. + lw t0, hibernation_state + la t1, HIB_MAGIC + la t2, RUN_MAGIC + sw t2, hibernation_state + bne t0, t1, end_check_hibernating + + .set noreorder + .set mips3 + + // Appears that we were hibernating, so wake up. + + // Jump to KESG1 here instead of assuming that the bootloader + // already has us there. + la t0, 1f + li t1, 0x1fffffff + and t0, t1 + li t1, 0xa0000000 + or t0, t1 + jr t0 + nop +1: + + // Don't trust the bootloader to invalidate the caches. + + // Invalidate the instruction cache. + mtc0 zero, CP0_TAGLO + li s0, 0x80000000 + li s1, 0x80000000 + (1 << 14) // 16k +1: + cache (2 << 2) | 0, (s0) + add s0, 0x10 + bne s0, s1, 1b + nop + + // Invalidate the data cache. + mtc0 zero, CP0_TAGLO + li s0, 0x80000000 + li s1, 0x80000000 + (1 << 13) // 8k +1: + cache (2 << 2) | 1, (s0) + add s0, 0x10 + bne s0, s1, 1b + nop + + .set reorder + + // Jump to linked segment. + la t0, 1f + jr t0 +1: + + // Restore the stack and do the wakeup sequence. + lw sp, kernelsp + subu sp, PT_SIZE + ori $28, sp, 0x1fff; + xori $28, 0x1fff; + jal do_wakeup + + bnez v0, end_check_hibernating + + j ret_from_hib_wakeup + +end_check_hibernating: + .set noreorder +#endif + +#ifdef CONFIG_XIP_ROM + /* + * For xip from rom, copy initialized data from end of text in rom + * to _fdata though _edata in ram. + */ + la s0, _etext + la s1, _fdata + la s2, _edata +1: + lw t0, (s0) + sw t0, (s1) + addi s1, 4 + bne s1, s2, 1b + addi s0, 4 +#endif /* * Stack for kernel and init, current variable Index: scall_o32.S =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/scall_o32.S,v retrieving revision 1.7 retrieving revision 1.8 diff -u -d -r1.7 -r1.8 --- scall_o32.S 2 Jan 2002 19:53:45 -0000 1.7 +++ scall_o32.S 7 Mar 2002 09:15:16 -0000 1.8 @@ -66,6 +66,16 @@ sw v0, PT_R0(sp) # set flag for syscall restarting 1: sw v0, PT_R2(sp) # result +#ifdef CONFIG_PM_SUSPEND_WAKEUP + lw t0, powerevent_queued + beqz t0, 1f + move a0, sp + SAVE_STATIC + jal do_hibernate +EXPORT(ret_from_hib_wakeup) + RESTORE_STATIC +1: +#endif EXPORT(o32_ret_from_sys_call) mfc0 t0, CP0_STATUS # need_resched and signals atomic test ori t0, t0, 1 |
|
From: Leblanc f. <fle...@us...> - 2002-03-07 09:15:19
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr41xx/common
In directory usw-pr-cvs1:/tmp/cvs-serv3157/arch/mips/vr41xx/common
Modified Files:
Makefile
Added Files:
adif.c giuinfo.c gpiolcd.c led.c power.c
Log Message:
Adds more VR stuff for Cassiopeia E15 Support.
--- NEW FILE: adif.c ---
/*
* linux/arch/mips/vr41xx/adif.c
*
* VR41xx Lvl A/D driver
*
* Parts Copyright (C) 2001 Chris AtLee <ca...@ca...>
* Parts Copyright (C) 2001 Paul Jimenez <pj...@ag...>
* Parts Copyright (C) 2001 Alexandre d'Alton <ale...@ya...>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/miscdevice.h>
#include <linux/fs.h>
#include <linux/major.h>
#include <linux/sched.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <asm/vr41xx.h>
#define VR41XX_ADIF_MINOR 15
static wait_queue_head_t wait;
static void
adif_irq_handler (int irq, void *dev_id, struct pt_regs *regs)
{
wake_up_interruptible (&wait);
}
static int
adif_open (struct inode *inode, struct file *file)
{
/* Readonly, sure they can all be open */
return 0;
}
static int
adif_close (struct inode *inode, struct file *file)
{
return 0;
}
static ssize_t
adif_read (struct file *file, char *buf, size_t count, loff_t * offset)
{
int original_stable;
unsigned short adin[4];
ssize_t retval;
unsigned long flags;
unsigned int j;
if (count < 4 * sizeof (short))
{
printk ("adif: Invalid count(%d) specified (must be at least %d)\n",
count, 4 * sizeof (short));
return 0;
}
/*** get battery readings here */
/** wait til we get into one of Standby, WaitPenTouch, or Interval state per
VR4181.pdf 19.4 */
/* If the pen is down, we can't use the PIU, so we wait. */
cli();
while(*VR41XX_PIUCNTREG & 0x2000){
sti();
j = jiffies + 100;
while(jiffies < j)
schedule();
}
save_and_cli (flags);
/* We need to activate the PIU clocks. */
*VR41XX_CMUCLKMSK |= (VR41XX_CMUCLKMSK_MSKKIU|
VR41XX_CMUCLKMSK_MSKSIU);
barrier ();
/* All these step are probably not needed, but they were for debugging */
*VR41XX_PIUCNTREG = 1;
*VR41XX_PIUCNTREG = 0x2; /* Power up the PIU */
#define PIU_IN_STANDBY ((*VR41XX_PIUCNTREG & 0x1c00) == 0x0400)
while (!PIU_IN_STANDBY)
*VR41XX_PIUCNTREG &= ~0x2; /* Go in standby state */
barrier ();
*VR41XX_PIUAMSKREG = 0xFF0F; /* Mask ADIN[0-2] & MIC pins */
barrier ();
restore_flags (flags);
/* set irq */
/* When we share IRQ we have to differentiate between two handlers
for the same IRQ, that's why we put the address ow the wait queue
as last argument to request_irq. */
if (retval = request_irq (VR41XX_IRQ_PIU, adif_irq_handler, SA_SHIRQ,
"vr41xx_battery_level", &wait))
{
/* restore PIUSTBLREG */
// *VR41XX_PIUSTBLREG = original_stable;
printk ("adif: unable to request_irq (%d)\n", retval);
return -retval;
}
barrier ();
save_and_cli (flags);
/* start the process */
*VR41XX_PIUASCNREG = 0x1;
barrier ();
*VR41XX_PIUCNTREG |= 0x0004;
barrier ();
restore_flags (flags);
/* sleep until the value is ready */
interruptible_sleep_on (&wait);
save_and_cli (flags);
*VR41XX_PIUAMSKREG = 0xFFF0;
*VR41XX_PIUASCNREG = 0x2;
barrier ();
/* read values */
adin[0] = *VR41XX_PIUAB0REG;
adin[1] = *VR41XX_PIUAB1REG;
adin[2] = *VR41XX_PIUAB2REG;
adin[3] = *VR41XX_PIUAB3REG;
/* Reset the PIU Controler in its default state */
*VR41XX_PIUCNTREG = 1;
barrier();
*VR41XX_PIUCNTREG = 0x2; /* Power up the PIU */
barrier();
while (!PIU_IN_STANDBY)
*VR41XX_PIUCNTREG &= ~0x2; /* Go in standby state */
*VR41XX_PIUCNTREG = 0x0322;
barrier ();
*VR41XX_PIUSIVLREG = 333; // set interval to .01 sec default
*VR41XX_PIUSTBLREG = 0x10;
barrier ();
*VR41XX_MPIUINTREG = 0x007d;
barrier ();
*VR41XX_PIUCNTREG = 0x0326; // resume autoscan
barrier ();
/* Shut down the clocks. */
*VR41XX_CMUCLKMSK &= ~(VR41XX_CMUCLKMSK_MSKKIU |
VR41XX_CMUCLKMSK_MSKSIU);
restore_flags (flags);
free_irq (VR41XX_IRQ_PIU, &wait);
// printk ("adif: returning %d, %d, %d, %d\n", adin[0], adin[1], adin[2],
// adin[3]);
if (!access_ok(VERIFY_WRITE, buf, 8))
return -EFAULT;
__put_user (adin[0], (short *) (buf));
__put_user (adin[1], (short *) (buf + 2));
__put_user (adin[2], (short *) (buf + 4));
__put_user (adin[3], (short *) (buf + 6));
return 4 * sizeof (short);
}
static struct file_operations adif_fops;
static struct miscdevice adif_device;
static int
adif_init (void)
{
int retval;
init_waitqueue_head (&wait);
/* NULL out the data structure before filling it */
memset (&adif_fops, 0, sizeof (struct file_operations));
adif_fops.read = adif_read;
adif_fops.open = adif_open;
adif_fops.release = adif_close;
/* NULL out the data structure before filling it */
memset (&adif_device, 0, sizeof (struct miscdevice));
adif_device.minor = VR41XX_ADIF_MINOR;
adif_device.name = "adif";
adif_device.fops = &adif_fops;
/* register it */
retval = misc_register (&adif_device);
if (retval < 0)
{
printk ("Failed to register A/D interface driver\n");
return retval;
}
printk ("A/D interface driver registered on %i,%i\n", MISC_MAJOR,
VR41XX_ADIF_MINOR);
return 0;
}
static void
adif_exit (void)
{
if (0 > misc_deregister (&adif_device))
printk ("Error unregistering A/D interface driver\n");
}
module_init (adif_init);
module_exit (adif_exit);
--- NEW FILE: giuinfo.c ---
/*
* linux/arch/mips/vr41xx/giuinfo.c
*
* Shows General Purpose I/O status in /proc/giuinfo
*
* Copyright (C) 1999 Bradley D. LaRonde
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <linux/kernel.h>
#include <linux/proc_fs.h>
#include <linux/init.h>
#include <asm/vr41xx.h>
static int get_giuinfo(char *page, char **start, off_t off,
int count, int *eof, void *data)
{
int len;
// return the giu register info
// buffer is PAGE_SIZE long, we're OK for all page sizes VR41xx supports
#ifdef CONFIG_CPU_VR4181
len = sprintf(page,
"GPMD0REG: 0x%04hx\n"
"GPMD1REG: 0x%04hx\n"
"GPMD2REG: 0x%04hx\n"
"GPMD3REG: 0x%04hx\n"
"GPDATHREG: 0x%04hx\n"
"GPDATLREG: 0x%04hx\n"
"GPINTEN: 0x%04hx\n"
"GPINTMSK: 0x%04hx\n"
"GPINTTYPH: 0x%04hx\n"
"GPINTTYPL: 0x%04hx\n"
"GPINTSTAT: 0x%04hx\n"
"GPHIBSTH: 0x%04hx\n"
"GPHIBSTL: 0x%04hx\n"
"GPSICTL: 0x%04hx\n"
"KEYEN: 0x%04hx\n"
"PCS0STRA: 0x%04hx\n"
"PCS0STPA: 0x%04hx\n"
"PCS0HIA: 0x%04hx\n"
"PCS1STRA: 0x%04hx\n"
"PCS1STPA: 0x%04hx\n"
"PCS1HIA: 0x%04hx\n"
"PCSMODE: 0x%04hx\n"
"LCDGPMODE: 0x%04hx\n"
"MISCREG0: 0x%04hx\n"
"MISCREG1: 0x%04hx\n"
"MISCREG2: 0x%04hx\n"
"MISCREG3: 0x%04hx\n"
"MISCREG4: 0x%04hx\n"
"MISCREG5: 0x%04hx\n"
"MISCREG6: 0x%04hx\n"
"MISCREG7: 0x%04hx\n"
"MISCREG8: 0x%04hx\n"
"MISCREG9: 0x%04hx\n"
"MISCREG10: 0x%04hx\n"
"MISCREG11: 0x%04hx\n"
"MISCREG12: 0x%04hx\n"
"MISCREG13: 0x%04hx\n"
"MISCREG14: 0x%04hx\n"
"MISCREG15: 0x%04hx\n",
*VR41XX_GPMD0REG, *VR41XX_GPMD1REG, *VR41XX_GPMD2REG, *VR41XX_GPMD3REG,
*VR41XX_GPDATHREG, *VR41XX_GPDATLREG, *VR41XX_GPINTEN, *VR41XX_GPINTMSK,
*VR41XX_GPINTTYPH, *VR41XX_GPINTTYPL, *VR41XX_GPINTSTAT, *VR41XX_GPHIBSTH,
*VR41XX_GPHIBSTL, *VR41XX_GPSICTL, *VR41XX_KEYEN, *VR41XX_PCS0STRA,
*VR41XX_PCS0STPA, *VR41XX_PCS0HIA, *VR41XX_PCS1STRA, *VR41XX_PCS1STPA,
*VR41XX_PCS1HIA, *VR41XX_PCSMODE, *VR41XX_LCDGPMODE, *VR41XX_MISCREG0,
*VR41XX_MISCREG1, *VR41XX_MISCREG2, *VR41XX_MISCREG3, *VR41XX_MISCREG4,
*VR41XX_MISCREG5, *VR41XX_MISCREG6, *VR41XX_MISCREG7, *VR41XX_MISCREG8,
*VR41XX_MISCREG9, *VR41XX_MISCREG10, *VR41XX_MISCREG11, *VR41XX_MISCREG12,
*VR41XX_MISCREG13, *VR41XX_MISCREG14, *VR41XX_MISCREG15);
#else
len = sprintf(page,
"giuiosell: 0x%04hx\n"
"giuioselh: 0x%04hx\n"
"giupiodl: 0x%04hx\n"
"giupiodh: 0x%04hx\n"
"giupodatl: 0x%04hx\n",
*VR41XX_GIUIOSELL, *VR41XX_GIUIOSELH, *VR41XX_GIUPIODL,
*VR41XX_GIUPIODH, *VR41XX_GIUPODATL);
#endif
if (len <= off+count) *eof = 1;
*start = page + off;
len -= off;
if (len > count) len = count;
if (len < 0) len = 0;
return len;
}
static int __init giuinfo_init(void)
{
create_proc_read_entry("giuinfo", 0, NULL, get_giuinfo, NULL);
return 0;
}
__initcall(giuinfo_init);
--- NEW FILE: gpiolcd.c ---
/*
* linux/arch/mips/vr41xx/gpiolcd.c
*
* Platform support for the machine which LCD control by GPIO.
*
* Copyright (C) 2000 SATO Kazumi
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <asm/io.h>
#include <asm/system.h>
#include <asm/vr41xx.h>
#ifdef CONFIG_NEC_MOBILEGEAR2_R300
#define LCDON VR41XX_GIUPIODL_GPIO10 /* GPIO[10] 0100 0000 0000 */
#define LCDON_PORT VR41XX_GIUPIODL
#define LIGHTON VR41XX_GIUPODATL_GPIO45 /* GPIO[45] 10 0000 0000 0000 */
#define LIGHTON_PORT VR41XX_GIUPODATL
#define MAXCONTRAST 6 /* XXX temporary */
#elif defined(CONFIG_NEC_MOBILEGEAR2_R310)
#define LCDON VR41XX_GIUPIODL_GPIO10 /* GPIO[10] 0100 0000 0000 */
#define LCDON_PORT VR41XX_GIUPIODL
#define LIGHTON VR41XX_GIUPODATL_GPIO45 /* GPIO[45] 10 0000 0000 0000 */
#define LIGHTON_PORT VR41XX_GIUPODATL
#define MAXCONTRAST 6 /* XXX temporary */
#elif defined(CONFIG_CASIO_E15)
#define LCDON VR41XX_GIUPIODH_GPIO24 /* GPIO[24] 0000 0001 0000 0000 */
#define LCDON_PORT VR41XX_GIUPIODH
#define LIGHTON VR41XX_GIUPIODH_GPIO26 /* GPIO[26] 0000 0100 0000 0000 */
#define LIGHTON_PORT VR41XX_GIUPIODH
#define MAXCONTRAST 6 /* XXX temporary */
#else
#error no LCD GPIO Infomation....
#endif
static int backlight, contrast, lcdpower;
void gpiolcd_init_backlight(void)
{
#ifdef STANDALONE
backlight = 1;
#else /* STANDALONE */
/* save boot time status (maybe set by Windows CE) */
if (*LIGHTON_PORT&LIGHTON)
backlight = 1;
else
backlight = 0;
#endif /* STANDALONE */
}
int get_gpiolcd_backlight(void)
{
return backlight;
}
int gpiolcd_backlight(int n)
{
int flags;
if(n == 0) {
backlight = 0;
save_and_cli(flags);
*LIGHTON_PORT &= ~LIGHTON;
restore_flags(flags);
// Turn the backlight off.
} else {
backlight = 1;
save_and_cli(flags);
*LIGHTON_PORT |= LIGHTON;
restore_flags(flags);
}
return 0;
}
void gpiolcd_init_contrast(void)
{
#ifdef STANDALONE
contrast = MAXCONTRAST;
#else /* STANDALONE */
/* save boot time status (maybe set by Windows CE) */
/* but we don't know current value methods, so set constant */
contrast = MAXCONTRAST;
#endif /* STANDALONE */
}
int get_gpiolcd_contrast(void)
{
return contrast;
}
int gpiolcd_contrast(int n)
{
if (n > MAXCONTRAST)
contrast = MAXCONTRAST;
else
contrast = n;
// Turn the lcd on and some contrast.
return 0;
}
int get_gpiolcd_lcdpower(void)
{
return lcdpower;
}
int gpiolcd_lcdpower(int n)
{
int flags;
lcdpower = n;
if(n == 0) {
save_and_cli(flags);
*LCDON_PORT &= ~LCDON;
restore_flags(flags);
} else {
save_and_cli(flags);
*LCDON_PORT |= LCDON;
restore_flags(flags);
}
return 0;
}
void gpiolcd_setup(void)
{
lcdpower = 1; /* boot time always on */
/* backlight & contrast inherit by WinCE */
gpiolcd_init_backlight();
gpiolcd_init_contrast();
gpiolcd_lcdpower(lcdpower);
gpiolcd_contrast(contrast);
gpiolcd_backlight(backlight);
}
--- NEW FILE: led.c ---
/*
* linux/arch/mips/vr41xx/led.c
*
* VR41xx LED control unit (LCU) driver
*
* Copyright (C) 1999 Hiroshi Kawashima (kaw...@in...)
* Copyright (C) 2001 François Leblanc <fra...@ce...>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/kernel.h>
#include <asm/vr41xx.h>
void vr41xx_xblink_led(unsigned int times, unsigned int time_on, unsigned int time_off)
{
time_on &= 0x007f; // only lower 7 bit is used
if (time_on == 0)
return; // Illegal value
time_off &= 0x007f; // only lower 7 bit is used
if (time_off == 0)
return; // Illegal value
if (*VR41XX_LEDCNTREG & 0x0001)
return; // Now blinking, so ignore this request
*VR41XX_LEDHTSREG = time_on; // LED on time (1 = 0.0625 sec)
*VR41XX_LEDLTSREG = time_off; // LED off time (1 = 0.0625 sec)
*VR41XX_LEDASTCREG = times; // How many times blink
*VR41XX_LEDCNTREG = 0x0002; // Enable auto stop
*VR41XX_LEDCNTREG |= 0x0001; // Start blinking
// Wait for LEDINT
while ((*VR41XX_LEDINTREG & 0x0001) == 0)
;
// Clear LEDINT
*VR41XX_LEDINTREG = 0x0001;
}
void vr41xx_blink_led(unsigned int times, unsigned int length)
{
/* keep compatible */
vr41xx_xblink_led(times, length, 1);
}
--- NEW FILE: power.c ---
/*
* VR41xx reset and power management interface
* PM User interface loosely based on Andrew Henroid's i386 ACPI driver
*
* Copyright (C) 2000 Michael Klar
* Copyright (C) 2002 François Leblanc <fra...@ce...>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/config.h>
#include <linux/delay.h>
#include <linux/mm.h>
#include <linux/sysctl.h>
#include <linux/pm.h>
#include <linux/acpi.h>
#include <linux/irq.h> /* for disable_irq, enable_irq, to be removed */
#include <linux/reboot.h>
#include <asm/vr41xx.h>
#include <asm/cacheops.h>
#include <asm/mipsregs.h>
#include <asm/pgalloc.h>
#include <asm/power.h>
/*
* vr41xx_dma_sem is needed because we cannot suspend while a DMA transfer
* is in progress, otherwise the CPU will be left in an undefined state.
*/
extern struct semaphore vr41xx_dma_sem;
#ifdef CONFIG_PM_SUSPEND_WAKEUP
//
// On VR41xx CPUs, the hibernate instruction will cut power to most of
// the device. On a wakeup event (usually power button), the CPU
// restarts at the reset vector in ROM, so the bootloader has to run
// again in order to pass control back to the kernel. As a result,
// the bootloader (and/or some level of code in the ROM) must not
// disturb the contents of RAM before passing control to the kernel
// when waking from hibernate.
//
// This code uses the power management kernel interface to the
// peripheral drivers. It is not real ACPI support, which would require
// some rather impractical (for this class of devices) hardware and
// firmware extensions. Also, for now, the SUSPEND and RESUME functions
// in the peripheral drivers just need to do any necessary hardware
// state saving and restoring. Power, IRQ mask, clock mask, and GPIO
// state are handled globally. This will probably change in the future
// to allow for power-state control of individual peripheral units.
//
// Right now, the data arg passed to the pm_request callback for SUSPEND
// and RESUME means:
// 0: restore state and return to powered-on
// 1: save state and prepare for hibernate, no need to power off because
// power will be removed globally
// 2: save state and prepare for suspend, global power will remain, so
// the peripheral driver may want to power down its local power
// 3: prepare for suspend, peripherals should appear to user to be
// running, most interrupts can wake from this state
// The numbers above should get replaced with an enum evetually, and
// the requirements for each mode will probably change, since the above
// doesn't really make sense (eg, no need to save state for 2, except
// that we need something to restore to for 0). The pm_request callbacks
// currently ignore the data value anyway....
//
// This may seem like a bad idea to put the state information into the
// data segment where the bootloader may overwrite it, but if the
// bootloader rewrites data (and/or bss), it won't support wake from
// hibernate, anyway.
//
unsigned int powerevent_queued;
unsigned int hibernation_state = LOAD_MAGIC;
static unsigned short clkmsk_state;
//extern void do_pm_irq_request(pm_request_t rqst);
#ifndef VR41XX_IRQ_MAX
#define VR41XX_IRQ_MAX ((VR41XX_NUM_CPU_IRQ)+(VR41XX_NUM_SYS_IRQ)+(VR41XX_NUM_GPIO_IRQ))
#endif
//
//
// Unlike the real pm_request callbacks, this one doesn't get registered
// with PM, and only gets called from do_hibernate and do_wakeup, because
// it has to happen in a certain order. It also assumes ints disabled.
//
static void do_pm_irq_request(pm_request_t rqst)
{
static unsigned short irq_mask[(VR41XX_IRQ_MAX + 9)/16];
unsigned int status;
switch (rqst) {
case PM_RESUME:
status = read_32bit_cp0_register(CP0_STATUS) & 0xffff00ff;
write_32bit_cp0_register(CP0_STATUS, status | irq_mask[0]);
*VR41XX_MSYSINT1REG = irq_mask[1];
*VR41XX_MSYSINT2REG = irq_mask[2];
#ifdef CONFIG_CPU_VR4181
*VR41XX_GPINTMSK = irq_mask[3];
#else
*VR41XX_MGIUINTLREG = irq_mask[3];
*VR41XX_MGIUINTHREG = irq_mask[4];
#endif
break;
case PM_SUSPEND:
irq_mask[0] = read_32bit_cp0_register(CP0_STATUS) & 0xff00;
irq_mask[1] = *VR41XX_MSYSINT1REG;
irq_mask[2] = *VR41XX_MSYSINT2REG;
#ifdef CONFIG_CPU_VR4181
irq_mask[3] = *VR41XX_GPINTMSK;
#else
irq_mask[3] = *VR41XX_MGIUINTLREG;
irq_mask[4] = *VR41XX_MGIUINTHREG;
#endif
break;
}
}
#ifdef CONFIG_CPU_VR4181
#define MIN_GPIOREG VR41XX_GPMD0REG
#define MAX_GPIOREG VR41XX_LCDGPMODE
#else
#define MIN_GPIOREG VR41XX_GIUIOSELL
#define MAX_GPIOREG VR41XX_GIUINTHTSELH
#endif
#define NR_GPIOREGS (((long)MAX_GPIOREG - (long)MIN_GPIOREG) / sizeof(short) + 1)
unsigned short gpio_state[NR_GPIOREGS];
asmlinkage void do_hibernate(void *sp)
{
int i;
cli();
powerevent_queued = 0;
if (pm_send_all(PM_SUSPEND, (void *)1)) {
sti();
up(&vr41xx_dma_sem);
return;
}
do_pm_irq_request(PM_SUSPEND);
for (i = 0; i < NR_GPIOREGS; i++)
gpio_state[i] = *(MIN_GPIOREG + i);
clkmsk_state = *VR41XX_CMUCLKMSK;
// we may want to put in some checksum or CRC on all of RAM, too
hibernation_state = HIB_MAGIC;
//flush_cache_all();
//vr41xx_hibernate();
machine_halt ();
// never reached...
}
//asmlinkage int do_wakeup(void)
asmlinkage void do_wakeup(char *command)
{
int i, retval;
// start out with something reasonable in CP0_STATUS, this will get
// replaced when context is restored. ints disbaled at this point
write_32bit_cp0_register(CP0_STATUS, ST0_CU0);
// Do what loadmmu would have done if cold init
//set_cp0_config(CONF_CM_CMASK, CONF_CM_CACHABLE_NONCOHERENT);
change_cp0_config(CONF_CM_CMASK, CONF_CM_CACHABLE_NONCOHERENT);
flush_cache_all();
write_32bit_cp0_register(CP0_WIRED, 0);
set_pagemask(PM_4K);
//write_32bit_cp0_register(CP0_PAGEMASK, PM_4K);
flush_tlb_all();
// this is about the point where we would check CRC if we did one
*VR41XX_CMUCLKMSK = clkmsk_state;
for (i = 0; i < NR_GPIOREGS; i++)
*(MIN_GPIOREG + i) = gpio_state[i];
do_pm_irq_request(PM_RESUME);
retval = pm_send_all(PM_RESUME, (void *)0);
if (!retval) {
sti();
up(&vr41xx_dma_sem);
}
//return retval;
}
/*
* Enter system sleep state (hibernate, really soft-off)
*
* Actually, all this does is to set a flag, so the tail end of the syscall
* handler jumps to do_hibernate above, rather than executing
* o32_ret_from_sys_call. That just makes for a convenient place to restore
* context from, since context is already saved on the stack at that point,
* and bottom-half processing already done. The wakeup part is done in
* kernel_entry, since waking up from hibernate will restart at reset vector.
*/
static int pm_do_sleep(ctl_table *ctl,
int write,
struct file *file,
void *buffer,
size_t *len)
{
if (!write) {
if (file->f_pos) {
*len = 0;
return 0;
}
} else {
if (file->f_flags & O_NONBLOCK) {
if (down_trylock(&vr41xx_dma_sem))
return -EAGAIN;
} else {
if (down_interruptible(&vr41xx_dma_sem))
return -ERESTARTSYS;
}
powerevent_queued = 1;
}
file->f_pos += *len;
return 0;
}
#endif // CONFIG_PM_SUSPEND_WAKEUP
#ifdef CONFIG_PM_POWERED_SUSPEND
/*
* Enter system "suspend" state, CPU remains powered but most/all clocks off
*/
static int pm_do_suspend(ctl_table *ctl,
int write,
struct file *file,
void *buffer,
size_t *len)
{
if (!write) {
if (file->f_pos) {
*len = 0;
return 0;
}
} else {
int retval;
// Must not suspend while DMA in progress
if (file->f_flags & O_NONBLOCK) {
if (down_trylock(&vr41xx_dma_sem))
return -EAGAIN;
} else {
if (down_interruptible(&vr41xx_dma_sem))
return -ERESTARTSYS;
}
retval = pm_send_all(PM_SUSPEND, (void *)2);
if (retval) {
up(&vr41xx_dma_sem);
return retval;
}
//vr41xx_suspend();
machine_power_off ();
retval = pm_send_all(PM_RESUME, (void *)0);
up(&vr41xx_dma_sem);
if (retval)
return retval;
}
file->f_pos += *len;
return 0;
}
#endif // CONFIG_PM_POWERED_SUSPEND
#ifdef CONFIG_PM_STANDBY
/*
* Enter system "standby" state, CPU remains powered, clocks on
*/
static int pm_do_standby(ctl_table *ctl,
int write,
struct file *file,
void *buffer,
size_t *len)
{
if (!write) {
if (file->f_pos) {
*len = 0;
return 0;
}
} else {
// MFK: replace with send PM_SUSPEND request to pm_time_request:
disable_irq(VR41XX_IRQ_INT1);
//vr41xx_standby();
machine_power_off ();
// MFK: replace with send PM_RESUME request to pm_time_request:
enable_irq(VR41XX_IRQ_INT1);
}
file->f_pos += *len;
return 0;
}
#endif // CONFIG_PM_STANDBY
/*
* NOTE1: We're hijacking the ACPI binary ctl_name's for now. Don't expect
* this to necessarily behave as ACPI does, some are blatently wrong.
* NOTE2: Don't get used to the text names, either, they are subject to change
* if we ever come up with a real naming convention....
* NOTE3: For that matter, don't get used to this being done via sysctl,
* that's subject to change, too.
*/
static struct ctl_table pm_table[] =
{
#ifdef CONFIG_PM_SUSPEND_WAKEUP
{ACPI_SLEEP, "sleep", NULL, 0, 0600, NULL, &pm_do_sleep},
#endif
#ifdef CONFIG_PM_POWERED_SUSPEND
{ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, &pm_do_suspend},
#endif
#ifdef CONFIG_PM_STANDBY
{ACPI_S0_SLP_TYP, "standby", NULL, 0, 0600, NULL, &pm_do_standby},
#endif
{0}
};
static struct ctl_table pm_dir_table[] =
{
{CTL_ACPI, "pm", NULL, 0, 0555, pm_table},
{0}
};
/*
* Initialize the power management user interface
*/
static int __init pm_init(void)
{
register_sysctl_table(pm_dir_table, 1);
return 0;
}
__initcall(pm_init);
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr41xx/common/Makefile,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- Makefile 7 Mar 2002 03:16:53 -0000 1.5
+++ Makefile 7 Mar 2002 09:15:16 -0000 1.6
@@ -19,4 +19,12 @@
obj-$(CONFIG_VR41XX_TIME_C) += time.o
+obj-$(CONFIG_ADIF) += adif.o
+obj-$(CONFIG_VR41XX_LED) += led.o
+obj-$(CONFIG_PROC_GIUINFO) += giuinfo.o
+obj-$(CONFIG_PM) += power.o
+obj-$(CONFIG_GPIO_LCD) += gpiolcd.o
+
+#obj-$(CONFIG_BLK_DEV_IDE) += ide-vr41xx.o
+
include $(TOPDIR)/Rules.make
|
|
From: Leblanc f. <fle...@us...> - 2002-03-07 09:15:19
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr4111/casio
In directory usw-pr-cvs1:/tmp/cvs-serv3157/arch/mips/vr4111/casio
Modified Files:
setup.c
Log Message:
Adds more VR stuff for Cassiopeia E15 Support.
Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr4111/casio/setup.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- setup.c 2 Jan 2002 19:12:17 -0000 1.2
+++ setup.c 7 Mar 2002 09:15:16 -0000 1.3
@@ -19,32 +19,45 @@
#include <linux/config.h>
#include <linux/console.h>
+#ifdef CONFIG_IDE
#include <linux/ide.h>
+#endif
#include <linux/init.h>
#include <linux/delay.h>
#include <asm/time.h>
#include <asm/reboot.h>
#include <asm/vr41xx.h>
#include <asm/io.h>
+#ifdef CONFIG_PM_SUSPEND_WAKEUP
+#include <asm/power.h>
+#endif
extern void vr41xx_restart(char *c);
+extern void vr4111_standby(void);
+extern void vr4111_suspend(void);
extern void vr4111_hibernate(void);
extern void vr4111_wait(void);
extern void vr4111_time_init(void);
extern void vr4111_timer_setup(void);
extern void vr4111_init_serial(void);
+extern void vr41xx_xblink_led(unsigned int times, unsigned int time_on, unsigned int time_off);
#ifdef CONFIG_BLK_DEV_IDE
extern struct ide_ops std_ide_ops;
+//extern struct ide_ops vr41xx_ide_ops;
#endif
+struct semaphore vr41xx_dma_sem;
+
+#ifdef CONFIG_PCMCIA
void __init put_cf_reg(unsigned char reg, unsigned char val)
{
/* PCMCIA controller (VG469) is mapped here */
outb(reg, 0x3e0);
outb(val, 0x3e1);
}
+#endif
void __init bus_error_init(void)
{
@@ -52,32 +65,46 @@
void __init casio_e15_setup(void)
{
- unsigned short val;
-
- mips_io_port_base = VR41XX_PORT_BASE;
+
+ set_io_port_base(VR41XX_PORT_BASE);
isa_slot_offset = VR41XX_ISAMEM_BASE;
board_time_init = vr4111_time_init;
board_timer_setup = vr4111_timer_setup;
+#ifdef CONFIG_PM_SUSPEND_WAKEUP
+ _machine_restart = do_wakeup;
+#else
_machine_restart = vr41xx_restart;
+#endif
_machine_halt = vr4111_hibernate;
- _machine_power_off = vr4111_hibernate;
+ _machine_power_off = vr4111_suspend;
cpu_wait = vr4111_wait;
-
+
#ifdef CONFIG_BLK_DEV_IDE
ide_ops = &std_ide_ops;
+ //ide_ops = &vr41xx_ide_ops;
#endif
#ifdef CONFIG_FB
conswitchp = &dummy_con;
#endif
+#ifdef CONFIG_PCMCIA
/* Reset the PCMCIA and CF and power them off */
put_cf_reg(0x03, 0x20); /* Socket 0 */
put_cf_reg(0x43, 0x20); /* Socket 1 */
put_cf_reg(0x02, 0x00); /* Socket 0 */
put_cf_reg(0x42, 0x00); /* Socket 1 */
+#endif
vr4111_init_serial();
+
+ // Insure that vr41xx_dma_sem is initialized as unlocked, even
+ // in the case of a failed hibernate/wakeup:
+ init_MUTEX(&vr41xx_dma_sem);
+
+#ifdef CONFIG_VR41XX_LED
+ vr41xx_xblink_led(4, 16, 4);
+#endif
}
|
|
From: Leblanc f. <fle...@us...> - 2002-03-07 09:15:19
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr4111/common
In directory usw-pr-cvs1:/tmp/cvs-serv3157/arch/mips/vr4111/common
Modified Files:
power.c serial.c
Log Message:
Adds more VR stuff for Cassiopeia E15 Support.
Index: power.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr4111/common/power.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- power.c 27 Nov 2001 01:16:41 -0000 1.2
+++ power.c 7 Mar 2002 09:15:16 -0000 1.3
@@ -57,7 +57,8 @@
);
}
-static inline void vr4111_suspend(void)
+/*static inline*/
+void vr4111_suspend(void)
{
asm volatile (
" .set noreorder\n"
@@ -70,7 +71,7 @@
);
}
-static inline void vr4111_standby(void)
+void vr4111_standby(void)
{
asm volatile (
" .set noreorder\n"
Index: serial.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr4111/common/serial.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- serial.c 30 Nov 2001 18:34:09 -0000 1.3
+++ serial.c 7 Mar 2002 09:15:16 -0000 1.4
@@ -28,6 +28,9 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/serial.h>
+#ifdef CONFIG_REMOTE_DEBUG
+#include <linux/serial_reg.h>
+#endif
#include <asm/string.h>
#include <asm/io.h>
#include <asm/vr41xx.h>
@@ -57,4 +60,95 @@
panic("vr4111_init_serial() failed!");
}
}
+
+#ifdef CONFIG_REMOTE_DEBUG
+
+/*
+ * This is the interface to the remote debugger stub.
+ * I've put that here to be able to control the serial
+ * device more directly.
+ *
+ * We're a little paranoid with the barrier()s, just in
+ * case the compiler tries to be too cute.
+ */
+
+static int initialized = 0;
+
+void DbgInitSerial(void)
+{
+ unsigned char dummy;
+
+ /* Ensure that serial is set to RS-232C (not IrDA) */
+ *VR41XX_SIUIRSEL &= ~VR41XX_SIUIRSEL_SIRSEL;
+
+ /* Supply clocks to all serial units */
+ vr41xx_clock_supply(VR41XX_CMUCLKMSK_MSKSIU);
+ vr41xx_clock_supply(VR41XX_CMUCLKMSK_MSKDSIU);
+ vr41xx_clock_supply(VR41XX_CMUCLKMSK_MSKSSIU);
+
+#if 0
+ /* turn on the clocks to the serial port */
+ serial_power_on(0);
+#endif
+
+ *VR41XX_SIULC = UART_LCR_DLAB; /* prepare to set baud rate */
+ barrier();
+
+ *VR41XX_SIUDLL = 120;
+ *VR41XX_SIUDLM = 0; /* hardcoded: set to 9600 */
+ barrier();
+
+ *VR41XX_SIULC = UART_LCR_WLEN8; /* clear DLAB, set up for 8N1 */
+ barrier();
+
+ *VR41XX_SIUIE = 0; /* disable interrupts */
+
+ *VR41XX_SIUFC = UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT;
+#ifdef CONFIG_PM
+ //fcr_shadow[0] = 0;
+#endif
+ *VR41XX_SIUMC = UART_MCR_RTS | UART_MCR_DTR; /* set RTS and DTR */
+
+ dummy = *VR41XX_SIURB; /* clear any pending ints */
+ dummy = *VR41XX_SIUMS;
+ dummy = *VR41XX_SIUIID;
+ barrier();
+
+ /* clear the receive buffer (and finish clearing ints) */
+ while ( *VR41XX_SIULS & UART_LSR_DR )
+ dummy = *VR41XX_SIURB;
+}
+
+
+int putDebugChar(unsigned char c)
+{
+ if (!initialized) { /* need to init device first */
+ DbgInitSerial();
+ initialized = 1;
+ }
+
+ while ( !(*VR41XX_SIULS & UART_LSR_THRE) ) ;
+ barrier();
+
+ *VR41XX_SIUTH = c;
+
+ return 1;
+}
+
+
+char getDebugChar(void)
+{
+ if (!initialized) { /* need to init device first */
+ DbgInitSerial();
+ initialized = 1;
+ }
+
+ while ( !(*VR41XX_SIULS & UART_LSR_DR) ) ;
+ barrier();
+
+ return(*VR41XX_SIURB);
+}
+
+#endif /* CONFIG_REMOTE_DEBUG */
+
|
|
From: Leblanc f. <fle...@us...> - 2002-03-07 09:15:19
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv3157/arch/mips/configs Added Files: defconfig-casio-e15 Log Message: Adds more VR stuff for Cassiopeia E15 Support. --- NEW FILE: defconfig-casio-e15 --- # # Automatically generated by make menuconfig: don't edit # CONFIG_MIPS=y # # Code maturity level options # CONFIG_EXPERIMENTAL=y # # Machine selection # # CONFIG_ACER_PICA_61 is not set # CONFIG_ALGOR_P4032 is not set # CONFIG_BAGET_MIPS is not set # CONFIG_COBALT_MICRO_SERVER is not set # CONFIG_DECSTATION is not set # CONFIG_DDB5074 is not set # CONFIG_NEC_EAGLE is not set # CONFIG_MIPS_EV96100 is not set # CONFIG_MIPS_EV64120 is not set # CONFIG_MIPS_ATLAS is not set # CONFIG_MIPS_MALTA is not set # CONFIG_NINO is not set # CONFIG_SIBYTE_SB1250 is not set # CONFIG_PS2 is not set # CONFIG_CASIO_BE300 is not set CONFIG_CASIO_E15=y # CONFIG_VADEM_CLIO_1000 is not set # CONFIG_NEC_MOBILEPRO_780 is not set # CONFIG_MIPS_MAGNUM_4000 is not set # CONFIG_MOMENCO_OCELOT is not set # CONFIG_DDB5476 is not set # CONFIG_DDB5477 is not set # CONFIG_NEC_OSPREY is not set # CONFIG_OLIVETTI_M700 is not set # CONFIG_SGI_IP22 is not set # CONFIG_SNI_RM200_PCI is not set # CONFIG_MIPS_ITE8172 is not set # CONFIG_MIPS_IVR is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_HP_LASERJET is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set # CONFIG_MCA is not set # CONFIG_SBUS is not set CONFIG_CPU_VR41XX=y CONFIG_VR4111=y CONFIG_SERIAL=y CONFIG_SERIAL_MANY_PORTS=y CONFIG_NEW_IRQ=y CONFIG_IRQ_CPU=y CONFIG_NEW_TIME_C=y CONFIG_ISA=y CONFIG_NONCOHERENT_IO=y CONFIG_DUMMY_KEYB=y CONFIG_TOUCH_PANEL=y CONFIG_BUTTONS=y CONFIG_VR41XX_GPIO_BUTTONS=y CONFIG_VR41XX_E105_BUTTONS=y # CONFIG_BUTTONS_DIRECT_POWEROFF is not set CONFIG_VR41XX_LED=y CONFIG_ADIF=y CONFIG_GPIO_LCD=y CONFIG_EISA=y # CONFIG_PCI is not set # CONFIG_I8259 is not set # # Loadable module support # # CONFIG_MODULES is not set # # CPU selection # # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_R6000 is not set CONFIG_CPU_VR41XX=y # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set # CONFIG_CPU_TX49XX is not set # CONFIG_CPU_R5000 is not set # CONFIG_CPU_R5432 is not set # CONFIG_CPU_R5900 is not set # CONFIG_CPU_RM7000 is not set # CONFIG_CPU_NEVADA is not set # CONFIG_CPU_R10000 is not set # CONFIG_CPU_SB1 is not set # CONFIG_CPU_MIPS32 is not set # CONFIG_CPU_MIPS64 is not set # CONFIG_CPU_ADVANCED is not set # CONFIG_CPU_HAS_LLSC is not set # CONFIG_CPU_HAS_LLDSCD is not set # CONFIG_CPU_HAS_WB is not set # # General setup # CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_KCORE_ELF=y CONFIG_ELF_KERNEL=y # CONFIG_BINFMT_AOUT is not set CONFIG_BINFMT_ELF=y CONFIG_BINFMT_MISC=y CONFIG_PM=y CONFIG_PM_SUSPEND_WAKEUP=y CONFIG_PM_POWERED_SUSPEND=y # CONFIG_PM_STANDBY is not set CONFIG_PROC_GIUINFO=y CONFIG_NET=y CONFIG_HOTPLUG=y # # PCMCIA/CardBus support # # CONFIG_PCMCIA is not set # # PCI Hotplug Support # # CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI_COMPAQ is not set # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y # # Plug and Play configuration # # CONFIG_PNP is not set # CONFIG_ISAPNP is not set # # Memory Technology Devices (MTD) # # CONFIG_MTD is not set # # Parallel port support # # CONFIG_PARPORT is not set # # Block devices # # CONFIG_BLK_DEV_FD is not set # CONFIG_BLK_DEV_XD is not set # CONFIG_PARIDE is not set # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_NBD=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_BLK_DEV_INITRD=y CONFIG_EMBEDDED_RAMDISK=y # # Multi-device support (RAID and LVM) # # CONFIG_MD is not set # CONFIG_BLK_DEV_MD is not set # CONFIG_MD_LINEAR is not set # CONFIG_MD_RAID0 is not set # CONFIG_MD_RAID1 is not set # CONFIG_MD_RAID5 is not set # CONFIG_MD_MULTIPATH is not set # CONFIG_BLK_DEV_LVM is not set # # Networking options # CONFIG_PACKET=y CONFIG_PACKET_MMAP=y CONFIG_NETLINK=y CONFIG_RTNETLINK=y CONFIG_NETLINK_DEV=y # CONFIG_NETFILTER is not set # CONFIG_FILTER is not set CONFIG_UNIX=y CONFIG_INET=y CONFIG_IP_MULTICAST=y # CONFIG_IP_ADVANCED_ROUTER is not set CONFIG_IP_PNP=y # CONFIG_IP_PNP_DHCP is not set CONFIG_IP_PNP_BOOTP=y # CONFIG_IP_PNP_RARP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set # CONFIG_IP_MROUTE is not set # CONFIG_ARPD is not set # CONFIG_INET_ECN is not set # CONFIG_SYN_COOKIES is not set # CONFIG_IPV6 is not set # CONFIG_KHTTPD is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set # CONFIG_IPX is not set # CONFIG_ATALK is not set # CONFIG_DECNET is not set # CONFIG_BRIDGE is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set # CONFIG_LLC is not set # CONFIG_NET_DIVERT is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set # CONFIG_NET_FASTROUTE is not set # CONFIG_NET_HW_FLOWCONTROL is not set # # QoS and/or fair queueing # # CONFIG_NET_SCHED is not set # # Telephony Support # # CONFIG_PHONE is not set # CONFIG_PHONE_IXJ is not set # CONFIG_PHONE_IXJ_PCMCIA is not set # # ATA/IDE/MFM/RLL support # CONFIG_IDE=y # # IDE, ATA and ATAPI Block devices # CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_BLK_DEV_IDEDISK_VENDOR is not set # CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set # CONFIG_BLK_DEV_IDEDISK_IBM is not set # CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set # CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set # CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set # CONFIG_BLK_DEV_IDEDISK_WD is not set # CONFIG_BLK_DEV_COMMERIAL is not set # CONFIG_BLK_DEV_TIVO is not set # CONFIG_BLK_DEV_IDECS is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set # CONFIG_BLK_DEV_IDESCSI is not set # CONFIG_BLK_DEV_CMD640 is not set # CONFIG_BLK_DEV_CMD640_ENHANCED is not set # CONFIG_BLK_DEV_ISAPNP is not set # CONFIG_IDE_CHIPSETS is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_DMA_NONPCI is not set # CONFIG_BLK_DEV_IDE_MODES is not set # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set # # SCSI support # # CONFIG_SCSI is not set # # I2O device support # # CONFIG_I2O is not set # CONFIG_I2O_BLOCK is not set # CONFIG_I2O_LAN is not set # CONFIG_I2O_SCSI is not set # CONFIG_I2O_PROC is not set # # Network device support # CONFIG_NETDEVICES=y # # ARCnet devices # # CONFIG_ARCNET is not set CONFIG_DUMMY=y # CONFIG_BONDING is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set # CONFIG_ETHERTAP is not set # # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y # CONFIG_SUNLANCE is not set # CONFIG_SUNBMAC is not set # CONFIG_SUNQE is not set # CONFIG_SUNLANCE is not set # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_AT1700 is not set # CONFIG_DEPCA is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set # CONFIG_NET_PCI is not set # CONFIG_NET_POCKET is not set # # Ethernet (1000 Mbit) # # CONFIG_ACENIC is not set # CONFIG_DL2K is not set # CONFIG_MYRI_SBUS is not set # CONFIG_NS83820 is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set # CONFIG_SK98LIN is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set # CONFIG_PLIP is not set CONFIG_PPP=y CONFIG_PPP_MULTILINK=y # CONFIG_PPP_FILTER is not set CONFIG_PPP_ASYNC=y CONFIG_PPP_SYNC_TTY=y CONFIG_PPP_DEFLATE=y CONFIG_PPP_BSDCOMP=y CONFIG_PPPOE=y # CONFIG_SLIP is not set # # Wireless LAN (non-hamradio) # # CONFIG_NET_RADIO is not set # # Token Ring devices # # CONFIG_TR is not set # CONFIG_NET_FC is not set # CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # # Wan interfaces # # CONFIG_WAN is not set # # Amateur Radio support # # CONFIG_HAMRADIO is not set # # IrDA (infrared) support # CONFIG_IRDA=y CONFIG_IRLAN=y CONFIG_IRNET=y CONFIG_IRCOMM=y # CONFIG_IRDA_ULTRA is not set # CONFIG_IRDA_OPTIONS is not set # # Infrared-port device drivers # CONFIG_IRTTY_SIR=y CONFIG_IRPORT_SIR=y # CONFIG_DONGLE is not set # CONFIG_USB_IRDA is not set # CONFIG_NSC_FIR is not set # CONFIG_WINBOND_FIR is not set # CONFIG_TOSHIBA_FIR is not set # CONFIG_AU1000_FIR is not set # CONFIG_SMC_IRCC_FIR is not set # CONFIG_ALI_FIR is not set # CONFIG_VLSI_FIR is not set # # ISDN subsystem # # CONFIG_ISDN is not set # # Old CD-ROM drivers (not SCSI, not IDE) # # CONFIG_CD_NO_IDESCSI is not set # # Character devices # CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_SERIAL=y CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 # # I2C support # # CONFIG_I2C is not set # # Mice # # CONFIG_BUSMOUSE is not set CONFIG_MOUSE=y CONFIG_PSMOUSE=y # CONFIG_82C710_MOUSE is not set # CONFIG_PC110_PAD is not set # # Joysticks # # CONFIG_INPUT_GAMEPORT is not set # CONFIG_QIC02_TAPE is not set # # Watchdog Cards # # CONFIG_WATCHDOG is not set # CONFIG_INTEL_RNG is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set # CONFIG_MIPS_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # # Ftape, the floppy tape device driver # # CONFIG_FTAPE is not set # CONFIG_AGP is not set # CONFIG_DRM is not set # # Multimedia devices # # CONFIG_VIDEO_DEV is not set # # File systems # # CONFIG_QUOTA is not set CONFIG_AUTOFS_FS=y CONFIG_AUTOFS4_FS=y # CONFIG_REISERFS_FS is not set # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set # CONFIG_ADFS_FS is not set # CONFIG_ADFS_FS_RW is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EXT3_FS is not set # CONFIG_JBD is not set # CONFIG_JBD_DEBUG is not set CONFIG_FAT_FS=y CONFIG_MSDOS_FS=y # CONFIG_UMSDOS_FS is not set CONFIG_VFAT_FS=y # CONFIG_EFS_FS is not set # CONFIG_JFFS_FS is not set # CONFIG_JFFS2_FS is not set # CONFIG_CRAMFS is not set # CONFIG_TMPFS is not set # CONFIG_RAMFS is not set # CONFIG_ISO9660_FS is not set # CONFIG_JOLIET is not set # CONFIG_ZISOFS is not set # CONFIG_MINIX_FS is not set # CONFIG_VXFS_FS is not set # CONFIG_NTFS_FS is not set # CONFIG_NTFS_RW is not set # CONFIG_HPFS_FS is not set CONFIG_PROC_FS=y # CONFIG_DEVFS_FS is not set # CONFIG_DEVFS_MOUNT is not set # CONFIG_DEVFS_DEBUG is not set CONFIG_DEVPTS_FS=y # CONFIG_QNX4FS_FS is not set # CONFIG_QNX4FS_RW is not set # CONFIG_ROMFS_FS is not set CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set # CONFIG_UFS_FS is not set # CONFIG_UFS_FS_WRITE is not set # # Network File Systems # # CONFIG_CODA_FS is not set # CONFIG_INTERMEZZO_FS is not set CONFIG_NFS_FS=y # CONFIG_NFS_V3 is not set CONFIG_ROOT_NFS=y CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set # CONFIG_NCP_FS is not set # CONFIG_NCPFS_PACKET_SIGNING is not set # CONFIG_NCPFS_IOCTL_LOCKING is not set # CONFIG_NCPFS_STRONG is not set # CONFIG_NCPFS_NFS_NS is not set # CONFIG_NCPFS_OS2_NS is not set # CONFIG_NCPFS_SMALLDOS is not set # CONFIG_NCPFS_NLS is not set # CONFIG_NCPFS_EXTRAS is not set # CONFIG_ZISOFS_FS is not set # CONFIG_ZLIB_FS_INFLATE is not set # # Partition Types # CONFIG_PARTITION_ADVANCED=y # CONFIG_ACORN_PARTITION is not set # CONFIG_OSF_PARTITION is not set # CONFIG_AMIGA_PARTITION is not set # CONFIG_ATARI_PARTITION is not set # CONFIG_MAC_PARTITION is not set CONFIG_MSDOS_PARTITION=y # CONFIG_BSD_DISKLABEL is not set # CONFIG_MINIX_SUBPARTITION is not set # CONFIG_SOLARIS_X86_PARTITION is not set # CONFIG_UNIXWARE_DISKLABEL is not set # CONFIG_LDM_PARTITION is not set # CONFIG_SGI_PARTITION is not set # CONFIG_ULTRIX_PARTITION is not set # CONFIG_SUN_PARTITION is not set # CONFIG_SMB_NLS is not set CONFIG_NLS=y # # Native Language Support # CONFIG_NLS_DEFAULT="iso8859-1" # CONFIG_NLS_CODEPAGE_437 is not set # CONFIG_NLS_CODEPAGE_737 is not set # CONFIG_NLS_CODEPAGE_775 is not set # CONFIG_NLS_CODEPAGE_850 is not set # CONFIG_NLS_CODEPAGE_852 is not set # CONFIG_NLS_CODEPAGE_855 is not set # CONFIG_NLS_CODEPAGE_857 is not set # CONFIG_NLS_CODEPAGE_860 is not set # CONFIG_NLS_CODEPAGE_861 is not set # CONFIG_NLS_CODEPAGE_862 is not set # CONFIG_NLS_CODEPAGE_863 is not set # CONFIG_NLS_CODEPAGE_864 is not set # CONFIG_NLS_CODEPAGE_865 is not set # CONFIG_NLS_CODEPAGE_866 is not set # CONFIG_NLS_CODEPAGE_869 is not set # CONFIG_NLS_CODEPAGE_936 is not set # CONFIG_NLS_CODEPAGE_950 is not set # CONFIG_NLS_CODEPAGE_932 is not set # CONFIG_NLS_CODEPAGE_949 is not set # CONFIG_NLS_CODEPAGE_874 is not set # CONFIG_NLS_ISO8859_8 is not set # CONFIG_NLS_CODEPAGE_1251 is not set # CONFIG_NLS_ISO8859_1 is not set # CONFIG_NLS_ISO8859_2 is not set # CONFIG_NLS_ISO8859_3 is not set # CONFIG_NLS_ISO8859_4 is not set # CONFIG_NLS_ISO8859_5 is not set # CONFIG_NLS_ISO8859_6 is not set # CONFIG_NLS_ISO8859_7 is not set # CONFIG_NLS_ISO8859_9 is not set # CONFIG_NLS_ISO8859_13 is not set # CONFIG_NLS_ISO8859_14 is not set # CONFIG_NLS_ISO8859_15 is not set # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set # CONFIG_NLS_UTF8 is not set # # Console drivers # # CONFIG_VGA_CONSOLE is not set # CONFIG_MDA_CONSOLE is not set # # Frame-buffer support # CONFIG_FB=y CONFIG_DUMMY_CONSOLE=y # CONFIG_FB_CYBER2000 is not set # CONFIG_FB_E1355 is not set # CONFIG_FB_MQ200 is not set # CONFIG_FB_SIMPLE is not set CONFIG_FB_HPCSFB=y # CONFIG_FB_SED1354 is not set # CONFIG_FB_VR4181 is not set # CONFIG_FB_R3912 is not set # CONFIG_FB_VRC4171 is not set # CONFIG_FB_VIRTUAL is not set CONFIG_FBCON_ADVANCED=y # CONFIG_FBCON_MFB is not set # CONFIG_FBCON_CFB2 is not set CONFIG_FBCON_CFB4=y # CONFIG_FBCON_CFB8 is not set # CONFIG_FBCON_CFB16 is not set # CONFIG_FBCON_CFB24 is not set # CONFIG_FBCON_CFB32 is not set # CONFIG_FBCON_AFB is not set # CONFIG_FBCON_ILBM is not set # CONFIG_FBCON_IPLAN2P2 is not set # CONFIG_FBCON_IPLAN2P4 is not set # CONFIG_FBCON_IPLAN2P8 is not set # CONFIG_FBCON_MAC is not set # CONFIG_FBCON_VGA_PLANES is not set # CONFIG_FBCON_VGA is not set # CONFIG_FBCON_HGA is not set CONFIG_FBCON_FONTWIDTH8_ONLY=y CONFIG_FBCON_FONTS=y CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y # CONFIG_FONT_SUN8x16 is not set # CONFIG_FONT_PEARL_8x8 is not set # CONFIG_FONT_ACORN_8x8 is not set # # Sound # CONFIG_SOUND=y # CONFIG_SOUND_BT878 is not set # CONFIG_SOUND_CMPCI is not set # CONFIG_SOUND_EMU10K1 is not set # CONFIG_MIDI_EMU10K1 is not set # CONFIG_SOUND_FUSION is not set # CONFIG_SOUND_CS4281 is not set # CONFIG_SOUND_ES1370 is not set # CONFIG_SOUND_ES1371 is not set # CONFIG_SOUND_ESSSOLO1 is not set # CONFIG_SOUND_MAESTRO is not set # CONFIG_SOUND_MAESTRO3 is not set # CONFIG_SOUND_ICH is not set # CONFIG_SOUND_RME96XX is not set # CONFIG_SOUND_SONICVIBES is not set # CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set # CONFIG_SOUND_VIA82CXXX is not set # CONFIG_MIDI_VIA82CXXX is not set CONFIG_SOUND_VR41XX=y # CONFIG_SOUND_OSS is not set # CONFIG_SOUND_TVMIXER is not set # # USB support # # CONFIG_USB is not set # CONFIG_USB_UHCI is not set # CONFIG_USB_UHCI_ALT is not set # CONFIG_USB_OHCI is not set # CONFIG_USB_AUDIO is not set # CONFIG_USB_BLUETOOTH is not set # CONFIG_USB_STORAGE is not set # CONFIG_USB_STORAGE_DEBUG is not set # CONFIG_USB_STORAGE_DATAFAB is not set # CONFIG_USB_STORAGE_FREECOM is not set # CONFIG_USB_STORAGE_ISD200 is not set # CONFIG_USB_STORAGE_DPCM is not set # CONFIG_USB_STORAGE_HP8200e is not set # CONFIG_USB_STORAGE_SDDR09 is not set # CONFIG_USB_STORAGE_JUMPSHOT is not set # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set # CONFIG_USB_DC2XX is not set # CONFIG_USB_MDC800 is not set # CONFIG_USB_SCANNER is not set # CONFIG_USB_MICROTEK is not set # CONFIG_USB_HPUSBSCSI is not set # CONFIG_USB_PEGASUS is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set # CONFIG_USB_USS720 is not set # # USB Serial Converter support # # CONFIG_USB_SERIAL is not set # CONFIG_USB_SERIAL_GENERIC is not set # CONFIG_USB_SERIAL_BELKIN is not set # CONFIG_USB_SERIAL_WHITEHEAT is not set # CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set # CONFIG_USB_SERIAL_EMPEG is not set # CONFIG_USB_SERIAL_FTDI_SIO is not set # CONFIG_USB_SERIAL_VISOR is not set # CONFIG_USB_SERIAL_IR is not set # CONFIG_USB_SERIAL_EDGEPORT is not set # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set # CONFIG_USB_SERIAL_KEYSPAN is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set # CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set # CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set # CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set # CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set # CONFIG_USB_SERIAL_MCT_U232 is not set # CONFIG_USB_SERIAL_PL2303 is not set # CONFIG_USB_SERIAL_CYBERJACK is not set # CONFIG_USB_SERIAL_XIRCOM is not set # CONFIG_USB_SERIAL_OMNINET is not set # CONFIG_USB_RIO500 is not set # # Input core support # # CONFIG_INPUT is not set # CONFIG_INPUT_KEYBDEV is not set # CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set # CONFIG_INPUT_EVDEV is not set # # Kernel hacking # CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set # CONFIG_GDB_CONSOLE is not set # CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set |
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