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From: Paul M. <le...@us...> - 2002-03-10 10:23:44
|
Update of /cvsroot/linux-mips/linux/drivers/char
In directory usw-pr-cvs1:/tmp/cvs-serv18924/drivers/char
Modified Files:
vrc4173-ps2u.c
Log Message:
Don't try and read from the Vrc4173 if one doesn't exist, bail out sanely
instead.
Index: vrc4173-ps2u.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/char/vrc4173-ps2u.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- vrc4173-ps2u.c 18 Jan 2002 21:22:23 -0000 1.1
+++ vrc4173-ps2u.c 10 Mar 2002 10:23:42 -0000 1.2
@@ -348,6 +348,15 @@
unsigned short val;
int retval;
+ /*
+ * Don't continue on unless a valid Vrc4173 exists. Otherwise the next
+ * read will Oops..
+ */
+ if (!vrc4173_pci_dev) {
+ printk(KERN_ERR "%s(): Couldn't find a NEC Vrc4173\n", __FUNCTION__);
+ return -ENODEV;
+ }
+
val = vrc4173_inw(VRC4173_SELECTREG);
val |= VRC4173_SELECTREG_SEL2;
vrc4173_outw(val, VRC4173_SELECTREG);
|
|
From: Paul M. <le...@us...> - 2002-03-10 10:22:49
|
Update of /cvsroot/linux-mips/linux/drivers/char
In directory usw-pr-cvs1:/tmp/cvs-serv18822/drivers/char
Modified Files:
serial.c
Log Message:
Cosmetic fixup. Remove trailing x.
Index: serial.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/char/serial.c,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -d -r1.9 -r1.10
--- serial.c 2 Jan 2002 20:42:11 -0000 1.9
+++ serial.c 10 Mar 2002 10:22:45 -0000 1.10
@@ -5514,7 +5514,7 @@
&& (state->port != 0 || state->iomem_base != 0))
state->irq = detect_uart_irq(state);
if (state->io_type == SERIAL_IO_MEM) {
- printk(KERN_INFO"ttyS%02d%s at 0x%px (irq = %d) is a %s\n",
+ printk(KERN_INFO "ttyS%02d%s at 0x%p (irq = %d) is a %s\n",
state->line + SERIAL_DEV_OFFSET,
(state->flags & ASYNC_FOURPORT) ? " FourPort" : "",
state->iomem_base, state->irq,
|
|
From: Paul M. <le...@us...> - 2002-03-10 08:26:39
|
Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv1115/arch/mips/mm
Modified Files:
pg-vr4131.c
Log Message:
Implemented r4k_copy_page_d32() and r4k_clear_page_d32(). Not all
implementations of the Vr4131 have a 16byte d-cache linesize..
Index: pg-vr4131.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/pg-vr4131.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- pg-vr4131.c 18 Jan 2002 21:22:17 -0000 1.1
+++ pg-vr4131.c 10 Mar 2002 08:26:36 -0000 1.2
@@ -16,18 +16,6 @@
#include <asm/cacheops.h>
-/*
- * Zero an entire page on Vr4131 processor. Basically a simple unrolled loop
- * should do the job but we want more performance by saving memory bus
- * bandwidth. We have five flavours of the routine available for:
- *
- * - 16byte cachelines and no second level cache
- * - 32byte cachelines second level cache
- * - a version which handles the buggy R4600 v1.x
- * - a version which handles the buggy R4600 v2.0
- * - Finally a last version without fancy cache games for the SC and MC
- * versions of R4000 and R4400.
- */
void r4k_clear_page_d16(void *page)
{
unsigned long reg1;
@@ -78,7 +66,6 @@
:"$1", "memory");
}
-
void r4k_copy_page_d16(void *to, void *from)
{
unsigned long dummy1, dummy2;
@@ -140,6 +127,107 @@
void r4k_clear_page_d32(void *page)
{
+ unsigned long reg1;
+
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ ".set\tmips3\n\t"
+ "mfc0 %1,$16\n\t"
+ "nop\n\t"
+ "mtc0\t$0,$28\n\t"
+ "mtc0\t$0,$29\n\t"
+ "nop\n\t"
+ "daddiu\t$1,%0,%3\n"
+ "1:\tcache\t0x09,(%0)\n\t"
+ "cache\t%4,(%0)\n\t"
+ "sd\t$0,(%0)\n\t"
+ "sd\t$0,8(%0)\n\t"
+ "cache\t0x09,(%0)\n\t"
+ "cache\t0x09,16(%0)\n\t"
+ "sd\t$0,16(%0)\n\t"
+ "sd\t$0,24(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "cache\t0x09,16(%0)\n\t"
+ "cache\t0x09,-32(%0)\n\t"
+ "cache\t%4,-32(%0)\n\t"
+ "sd\t$0,-32(%0)\n\t"
+ "sd\t$0,-24(%0)\n\t"
+ "cache\t0x09,-32(%0)\n\t"
+ "cache\t0x09,-16(%0)\n\t"
+ "sd\t$0,-16(%0)\n\t"
+ "sd\t$0,-8(%0)\n\t"
+ "cache\t0x09,-16(%0)\n\t"
+ "nop\n\t"
+ "bne\t$1,%0,1b\n\t"
+ "nop\n\t"
+ "mtc0 %1,$16\n\t"
+ "nop\n\t"
+ ".set\tmips0\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ :"=r" (page), "=&r" (reg1)
+ :"0" (page),
+ "I" (PAGE_SIZE),
+ "i" (Index_Writeback_Inv_D)
+ :"$1", "memory");
+}
+
+void r4k_copy_page_d32(void *to, void *from)
+{
+ unsigned long dummy1, dummy2;
+ unsigned long reg1, reg2, reg3, reg4;
+
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ ".set\tmips3\n\t"
+ "daddiu\t$1,%0,%8\n"
+ "1:\tcache\t%9,(%0)\n\t"
+ "lw\t%2,(%1)\n\t"
+ "lw\t%3,4(%1)\n\t"
+ "lw\t%4,8(%1)\n\t"
+ "lw\t%5,12(%1)\n\t"
+ "sw\t%2,(%0)\n\t"
+ "sw\t%3,4(%0)\n\t"
+ "sw\t%4,8(%0)\n\t"
+ "sw\t%5,12(%0)\n\t"
+ "lw\t%2,16(%1)\n\t"
+ "lw\t%3,20(%1)\n\t"
+ "lw\t%4,24(%1)\n\t"
+ "lw\t%5,28(%1)\n\t"
+ "sw\t%2,16(%0)\n\t"
+ "sw\t%3,20(%0)\n\t"
+ "sw\t%4,24(%0)\n\t"
+ "sw\t%5,28(%0)\n\t"
+ "cache\t%9,32(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "daddiu\t%1,64\n\t"
+ "lw\t%2,-32(%1)\n\t"
+ "lw\t%3,-28(%1)\n\t"
+ "lw\t%4,-24(%1)\n\t"
+ "lw\t%5,-20(%1)\n\t"
+ "sw\t%2,-32(%0)\n\t"
+ "sw\t%3,-28(%0)\n\t"
+ "sw\t%4,-24(%0)\n\t"
+ "sw\t%5,-20(%0)\n\t"
+ "lw\t%2,-16(%1)\n\t"
+ "lw\t%3,-12(%1)\n\t"
+ "lw\t%4,-8(%1)\n\t"
+ "lw\t%5,-4(%1)\n\t"
+ "sw\t%2,-16(%0)\n\t"
+ "sw\t%3,-12(%0)\n\t"
+ "sw\t%4,-8(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ "sw\t%5,-4(%0)\n\t"
+ ".set\tmips0\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ :"=r" (dummy1), "=r" (dummy2),
+ "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
+ :"0" (to), "1" (from),
+ "I" (PAGE_SIZE),
+ "i" (Index_Writeback_Inv_D));
}
void r4k_clear_page_r4600_v1(void *page)
@@ -163,10 +251,6 @@
}
void r4k_clear_page_s128(void *page)
-{
-}
-
-void r4k_copy_page_d32(void *to, void *from)
{
}
|
|
From: Paul M. <le...@us...> - 2002-03-10 08:17:44
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4122/common
In directory usw-pr-cvs1:/tmp/cvs-serv32523/arch/mips/vr41xx/vr4122/common
Modified Files:
bcu.c
Log Message:
Implement workaround to calculate mips_counter_frequency properly on revs 2.0
and 2.1 of the Vr4131.
Index: bcu.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4122/common/bcu.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- bcu.c 7 Mar 2002 03:16:54 -0000 1.1
+++ bcu.c 10 Mar 2002 08:17:40 -0000 1.2
@@ -32,6 +32,9 @@
*/
/*
* Changes:
+ * Paul Mundt <le...@ch...>
+ * - Calculate mips_counter_frequency properly on VR4131.
+ *
* MontaVista Software Inc. <yy...@mv...> or <so...@mv...>
* - New creation, NEC VR4122 and VR4131 are supported.
*/
@@ -76,5 +79,26 @@
tclock = calc_tclock(clksp, vr41xx_vtclock);
printk(KERN_INFO "TClock: %ldHz\n", tclock);
- mips_counter_frequency = tclock / 4;
+ /*
+ * The base clock divisor varies depending on which revision of the
+ * Vr4131 we happen to be dealing with ..
+ */
+#ifdef CONFIG_VR4131
+ {
+ int prid = read_32bit_cp0_register(CP0_PRID);
+
+ /*
+ * Revisions 2.0 and 2.1 use a value of (tclock / 2).
+ */
+ if (prid == 0x0c81 || prid == 0x0c82)
+ mips_counter_frequency = tclock / 2;
+ }
+#endif
+
+ /*
+ * All other revisions of the Vr4131, as well as the Vr4122 use a
+ * value of (tclock / 4).
+ */
+ if (!mips_counter_frequency)
+ mips_counter_frequency = tclock / 4;
}
|
|
From: Paul M. <le...@us...> - 2002-03-09 08:03:55
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv31925/arch/mips/configs Modified Files: defconfig-casio-be300 Log Message: Update BE-300 defconfig. Index: defconfig-casio-be300 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-casio-be300,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- defconfig-casio-be300 12 Feb 2002 18:21:25 -0000 1.2 +++ defconfig-casio-be300 9 Mar 2002 08:03:53 -0000 1.3 @@ -32,6 +32,9 @@ # CONFIG_NEC_MOBILEPRO is not set # CONFIG_IDT_79S334 is not set # CONFIG_IDT_79EB355 is not set +# CONFIG_IBM_WORKPAD is not set +# CONFIG_CASIO_E55 is not set +# CONFIG_VICTOR_MPC303 is not set # CONFIG_MIPS_MAGNUM_4000 is not set # CONFIG_MOMENCO_OCELOT is not set # CONFIG_DDB5476 is not set @@ -55,13 +58,15 @@ CONFIG_VR4122=y CONFIG_VR4131=y CONFIG_NEW_IRQ=y +CONFIG_IRQ_CPU=y CONFIG_NEW_TIME_C=y -CONFIG_VR4122_TIME_C=y +CONFIG_VR41XX_TIME_C=y CONFIG_NONCOHERENT_IO=y CONFIG_DUMMY_KEYB=y CONFIG_PCI=y CONFIG_NEW_PCI=y CONFIG_PCI_AUTO=y +CONFIG_SERIAL=y # CONFIG_ISA is not set # CONFIG_EISA is not set @@ -102,6 +107,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y # CONFIG_CPU_R5900_CONTEXT is not set CONFIG_VR4131_CACHE_FIX=y +# CONFIG_VR4122_CLKSPEEDREG_FIX is not set CONFIG_KCORE_ELF=y CONFIG_ELF_KERNEL=y # CONFIG_BINFMT_AOUT is not set @@ -200,7 +206,8 @@ # CONFIG_VT=y CONFIG_VT_CONSOLE=y -# CONFIG_SERIAL is not set +CONFIG_SERIAL=y +# CONFIG_SERIAL_CONSOLE is not set # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set CONFIG_VRC4173=y @@ -369,6 +376,10 @@ # # CONFIG_USB_AUDIO is not set # CONFIG_USB_BLUETOOTH is not set + +# +# SCSI support is needed for USB Storage +# # CONFIG_USB_STORAGE is not set # CONFIG_USB_STORAGE_DEBUG is not set # CONFIG_USB_STORAGE_DATAFAB is not set @@ -430,6 +441,7 @@ # CONFIG_USB_SERIAL_EMPEG is not set # CONFIG_USB_SERIAL_FTDI_SIO is not set # CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set # CONFIG_USB_SERIAL_IR is not set # CONFIG_USB_SERIAL_EDGEPORT is not set # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set @@ -443,6 +455,7 @@ # CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set # CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set # CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_KLSI is not set # CONFIG_USB_SERIAL_PL2303 is not set # CONFIG_USB_SERIAL_CYBERJACK is not set # CONFIG_USB_SERIAL_XIRCOM is not set |
|
From: Paul M. <le...@us...> - 2002-03-09 07:47:22
|
Update of /cvsroot/linux-mips/linux/arch/mips
In directory usw-pr-cvs1:/tmp/cvs-serv29195/arch/mips
Modified Files:
Makefile config.in
Log Message:
Make BE-300 support build again.
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/Makefile,v
retrieving revision 1.40
retrieving revision 1.41
diff -u -d -r1.40 -r1.41
--- Makefile 7 Mar 2002 03:16:52 -0000 1.40
+++ Makefile 9 Mar 2002 07:47:19 -0000 1.41
@@ -491,12 +491,12 @@
# Casio Cassiopeia BE-300 (Vr4131)
#
ifdef CONFIG_CASIO_BE300
-SUBDIRS += arch/mips/vr4122/common \
- arch/mips/vr4131/common \
- arch/mips/vr4131/casio-be300
-LIBS += arch/mips/vr4122/common/vr4122.o \
- arch/mips/vr4131/common/vr4131.o \
- arch/mips/vr4131/casio-be300/casio-be300.o
+SUBDIRS += arch/mips/vr41xx/common \
+ arch/mips/vr41xx/vr4122/common \
+ arch/mips/vr41xx/vr4131/casio-be300
+LIBS += arch/mips/vr41xx/common/vr41xx.o \
+ arch/mips/vr41xx/vr4122/common/vr4122.o \
+ arch/mips/vr41xx/vr4131/casio-be300/casio-be300.o
LOADADDR += 0x80001000
endif
Index: config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/config.in,v
retrieving revision 1.87
retrieving revision 1.88
diff -u -d -r1.87 -r1.88
--- config.in 7 Mar 2002 09:15:15 -0000 1.87
+++ config.in 9 Mar 2002 07:47:19 -0000 1.88
@@ -448,13 +448,15 @@
define_bool CONFIG_VR4122 y
define_bool CONFIG_VR4131 y
define_bool CONFIG_NEW_IRQ y
+ define_bool CONFIG_IRQ_CPU y
define_bool CONFIG_NEW_TIME_C y
- define_bool CONFIG_VR4122_TIME_C y
+ define_bool CONFIG_VR41XX_TIME_C y
define_bool CONFIG_NONCOHERENT_IO y
define_bool CONFIG_DUMMY_KEYB y
define_bool CONFIG_PCI y
define_bool CONFIG_NEW_PCI y
define_bool CONFIG_PCI_AUTO y
+ define_bool CONFIG_SERIAL y
fi
if [ "$CONFIG_CASIO_E15" = "y" ]; then
define_bool CONFIG_CPU_VR41XX y
|
|
From: Paul M. <le...@us...> - 2002-03-09 07:47:22
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4131/casio-be300
In directory usw-pr-cvs1:/tmp/cvs-serv29195/arch/mips/vr41xx/vr4131/casio-be300
Modified Files:
Makefile
Added Files:
irq.c
Log Message:
Make BE-300 support build again.
--- NEW FILE: irq.c ---
/*
* arch/mips/vr41xx/vr4131/casio-be300/irq.c
*
* Interrupt routines for the Casio Cassiopeia BE-300
*
* Copyright (C) 2002 Paul Mundt <le...@ch...>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 2 of the License, or (at your option)
* any later version.
*/
#include <linux/init.h>
void __init vr41xx_board_irq_init(void)
{
}
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4131/casio-be300/Makefile,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- Makefile 9 Mar 2002 01:23:32 -0000 1.1
+++ Makefile 9 Mar 2002 07:47:19 -0000 1.2
@@ -13,7 +13,7 @@
O_TARGET := casio-be300.o
-obj-y := prom.o setup.o
+obj-y := prom.o setup.o irq.o
obj-$(CONFIG_PCI) += pci_fixup.o
|
|
From: Pete P. <pp...@us...> - 2002-03-09 07:39:52
|
Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv28201/arch/mips/mm
Added Files:
tlbex-mips32.S
Log Message:
New files, part of the 36 bit support.
--- NEW FILE: tlbex-mips32.S ---
/*
* TLB exception handling code for MIPS32 CPUs.
*
* Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse
*
* Multi-cpu abstraction and reworking:
* Copyright (C) 1996 David S. Miller (dm...@en...)
*
* Carsten Langgaard, car...@mi...
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*
* Pete Popov, pp...@pa...
* Added 36 bit phys address support.
* Copyright (C) 2002 MontaVista Software, Inc.
*/
#include <linux/init.h>
#include <asm/asm.h>
#include <asm/current.h>
#include <asm/offset.h>
#include <asm/cachectl.h>
#include <asm/fpregdef.h>
#include <asm/mipsregs.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
#define TLB_OPTIMIZE /* If you are paranoid, disable this. */
#ifdef CONFIG_64BIT_PHYS_ADDR
/* We really only support 36 bit physical addresses on MIPS32 */
#define PTE_L lw
#define PTE_S sw
#define PTE_SRL srl
#define P_MTC0 mtc0
#define PTE_HALF 4 /* pte_high contains pre-shifted, ready to go entry */
#define PTE_SIZE 8
#define PTEP_INDX_MSK 0xff0
#define PTE_INDX_MSK 0xff8
#define PTE_INDX_SHIFT 9
#define CONVERT_PTE(pte)
#define PTE_MAKEWRITE_HIGH(pte, ptr) \
lw pte, 4(ptr); \
ori pte, (_PAGE_VALID | _PAGE_DIRTY)>>6; \
sw pte, 4(ptr); \
lw pte, 0(ptr);
#define PTE_MAKEVALID_HIGH(pte, ptr) \
lw pte, 4(ptr); \
ori pte, pte, _PAGE_VALID>>6; \
sw pte, 4(ptr); \
lw pte, 0(ptr);
#else
#define PTE_L lw
#define PTE_S sw
#define PTE_SRL srl
#define P_MTC0 mtc0
#define PTE_HALF 0
#define PTE_SIZE 4
#define PTEP_INDX_MSK 0xff8
#define PTE_INDX_MSK 0xffc
#define PTE_INDX_SHIFT 10
#define CONVERT_PTE(pte) srl pte, pte, 6
#define PTE_MAKEWRITE_HIGH(pte, ptr)
#define PTE_MAKEVALID_HIGH(pte, ptr)
#endif /* CONFIG_64BIT_PHYS_ADDR */
__INIT
#ifdef CONFIG_64BIT_PHYS_ADDR
#define GET_PTE_OFF(reg)
#else
#define GET_PTE_OFF(reg) srl reg, reg, 1
#endif
/*
* These handlers much be written in a relocatable manner
* because based upon the cpu type an arbitrary one of the
* following pieces of code will be copied to the KSEG0
* vector location.
*/
/* TLB refill, EXL == 0, MIPS32 version */
.set noreorder
.set noat
LEAF(except_vec0_r4000)
.set mips3
#ifdef CONFIG_SMP
mfc0 k1, CP0_CONTEXT
la k0, pgd_current
srl k1, 23
sll k1, 2 # log2(sizeof(pgd_t)
addu k1, k0, k1
lw k1, (k1)
#else
lw k1, pgd_current # get pgd pointer
#endif
nop
mfc0 k0, CP0_BADVADDR # Get faulting address
srl k0, k0, PGDIR_SHIFT # get pgd only bits
sll k0, k0, 2
addu k1, k1, k0 # add in pgd offset
mfc0 k0, CP0_CONTEXT # get context reg
lw k1, (k1)
GET_PTE_OFF(k0) # get pte offset
and k0, k0, PTEP_INDX_MSK
addu k1, k1, k0 # add in offset
PTE_L k0, PTE_HALF(k1) # get even pte
CONVERT_PTE(k0)
P_MTC0 k0, CP0_ENTRYLO0 # load it
PTE_L k1, (PTE_HALF+PTE_SIZE)(k1) # get odd pte
CONVERT_PTE(k1)
P_MTC0 k1, CP0_ENTRYLO1 # load it
b 1f
tlbwr # write random tlb entry
1:
nop
eret # return from trap
END(except_vec0_r4000)
/*
* These are here to avoid putting ifdefs in tlb-r4k.c
*/
.set noreorder
.set noat
LEAF(except_vec0_nevada)
.set mips3
PANIC("Nevada Exception Vec 0 called")
END(except_vec0_nevada)
.set noreorder
.set noat
LEAF(except_vec0_r4600)
.set mips3
PANIC("R4600 Exception Vec 0 called")
END(except_vec0_r4600)
__FINIT
/*
* ABUSE of CPP macros 101.
*
* After this macro runs, the pte faulted on is
* in register PTE, a ptr into the table in which
* the pte belongs is in PTR.
*/
#ifdef CONFIG_SMP
#define GET_PGD(scratch, ptr) \
mfc0 ptr, CP0_CONTEXT; \
la scratch, pgd_current;\
srl ptr, 23; \
sll ptr, 2; \
addu ptr, scratch, ptr; \
lw ptr, (ptr);
#else
#define GET_PGD(scratch, ptr) \
lw ptr, pgd_current;
#endif
#define LOAD_PTE(pte, ptr) \
GET_PGD(pte, ptr) \
mfc0 pte, CP0_BADVADDR; \
srl pte, pte, PGDIR_SHIFT; \
sll pte, pte, 2; \
addu ptr, ptr, pte; \
mfc0 pte, CP0_BADVADDR; \
lw ptr, (ptr); \
srl pte, pte, PTE_INDX_SHIFT; \
and pte, pte, PTE_INDX_MSK; \
addu ptr, ptr, pte; \
PTE_L pte, (ptr);
/* This places the even/odd pte pair in the page
* table at PTR into ENTRYLO0 and ENTRYLO1 using
* TMP as a scratch register.
*/
#define PTE_RELOAD(ptr, tmp) \
ori ptr, ptr, PTE_SIZE; \
xori ptr, ptr, PTE_SIZE; \
PTE_L tmp, (PTE_HALF+PTE_SIZE)(ptr); \
CONVERT_PTE(tmp); \
P_MTC0 tmp, CP0_ENTRYLO1; \
PTE_L ptr, PTE_HALF(ptr); \
CONVERT_PTE(ptr); \
P_MTC0 ptr, CP0_ENTRYLO0;
#define DO_FAULT(write) \
.set noat; \
SAVE_ALL; \
mfc0 a2, CP0_BADVADDR; \
STI; \
.set at; \
move a0, sp; \
jal do_page_fault; \
li a1, write; \
j ret_from_exception; \
nop; \
.set noat;
/* Check is PTE is present, if not then jump to LABEL.
* PTR points to the page table where this PTE is located,
* when the macro is done executing PTE will be restored
* with it's original value.
*/
#define PTE_PRESENT(pte, ptr, label) \
andi pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
xori pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
bnez pte, label; \
PTE_L pte, (ptr);
/* Make PTE valid, store result in PTR. */
#define PTE_MAKEVALID(pte, ptr) \
ori pte, pte, (_PAGE_VALID | _PAGE_ACCESSED); \
PTE_S pte, (ptr);
/* Check if PTE can be written to, if not branch to LABEL.
* Regardless restore PTE with value from PTR when done.
*/
#define PTE_WRITABLE(pte, ptr, label) \
andi pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
xori pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
bnez pte, label; \
PTE_L pte, (ptr);
/* Make PTE writable, update software status bits as well,
* then store at PTR.
*/
#define PTE_MAKEWRITE(pte, ptr) \
ori pte, pte, (_PAGE_ACCESSED | _PAGE_MODIFIED | \
_PAGE_VALID | _PAGE_DIRTY); \
PTE_S pte, (ptr);
.set noreorder
#define R5K_HAZARD nop
.align 5
NESTED(handle_tlbl, PT_SIZE, sp)
.set noat
invalid_tlbl:
#ifdef TLB_OPTIMIZE
/* Test present bit in entry. */
LOAD_PTE(k0, k1)
R5K_HAZARD
tlbp
PTE_PRESENT(k0, k1, nopage_tlbl)
PTE_MAKEVALID_HIGH(k0, k1)
PTE_MAKEVALID(k0, k1)
PTE_RELOAD(k1, k0)
nop
b 1f
tlbwi
1:
nop
.set mips3
eret
.set mips0
#endif
nopage_tlbl:
DO_FAULT(0)
END(handle_tlbl)
.align 5
NESTED(handle_tlbs, PT_SIZE, sp)
.set noat
#ifdef TLB_OPTIMIZE
.set mips3
li k0,0
LOAD_PTE(k0, k1)
R5K_HAZARD
tlbp # find faulting entry
PTE_WRITABLE(k0, k1, nopage_tlbs)
PTE_MAKEWRITE(k0, k1)
PTE_MAKEWRITE_HIGH(k0, k1)
PTE_RELOAD(k1, k0)
nop
b 1f
tlbwi
1:
nop
.set mips3
eret
.set mips0
#endif
nopage_tlbs:
DO_FAULT(1)
END(handle_tlbs)
.align 5
NESTED(handle_mod, PT_SIZE, sp)
.set noat
#ifdef TLB_OPTIMIZE
.set mips3
LOAD_PTE(k0, k1)
R5K_HAZARD
tlbp # find faulting entry
andi k0, k0, _PAGE_WRITE
beqz k0, nowrite_mod
PTE_L k0, (k1)
/* Present and writable bits set, set accessed and dirty bits. */
PTE_MAKEWRITE(k0, k1)
PTE_MAKEWRITE_HIGH(k0, k1)
/* Now reload the entry into the tlb. */
PTE_RELOAD(k1, k0)
nop
b 1f
tlbwi
1:
nop
.set mips3
eret
.set mips0
#endif
nowrite_mod:
DO_FAULT(1)
END(handle_mod)
|
|
From: Pete P. <pp...@us...> - 2002-03-09 07:39:52
|
Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv28201/include/asm-mips
Added Files:
pgtable-2level.h pgtable-3level.h
Log Message:
New files, part of the 36 bit support.
--- NEW FILE: pgtable-2level.h ---
#ifndef _MIPS_PGTABLE_2LEVEL_H
#define _MIPS_PGTABLE_2LEVEL_H
/*
* traditional mips two-level paging structure:
*/
#if defined(CONFIG_64BIT_PHYS_ADDR)
#define PMD_SHIFT 21
#define PTRS_PER_PTE 512
#define PTRS_PER_PMD 1
#define PTRS_PER_PGD 2048
#define PGD_ORDER 1
#else
#define PMD_SHIFT 22
#define PTRS_PER_PTE 1024
#define PTRS_PER_PMD 1
#define PTRS_PER_PGD 1024
#define PGD_ORDER 0
#endif
#if !defined (_LANGUAGE_ASSEMBLY)
#define pte_ERROR(e) \
printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte_low)
#define pmd_ERROR(e) \
printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
#define pgd_ERROR(e) \
printk("%s:%d: bad pgd %p(%016Lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
/* Certain architectures need to do special things when pte's
* within a page table are directly modified. Thus, the following
* hook is made available.
*/
static inline void set_pte(pte_t *ptep, pte_t pteval)
{
*ptep = pteval;
}
static inline int pte_none(pte_t pte) { return !(pte.pte_low); }
#ifdef CONFIG_CPU_VR41XX
#define pte_page(x) (mem_map+((unsigned long)(((x).pte_low >> (PAGE_SHIFT+2)))))
#define __mk_pte(page_nr,pgprot) __pte(((page_nr) << (PAGE_SHIFT+2)) | pgprot_val(pgprot))
#else
#define pte_page(x) (mem_map+((unsigned long)(((x).pte_low >> PAGE_SHIFT))))
#define __mk_pte(page_nr,pgprot) __pte(((page_nr) << PAGE_SHIFT) | pgprot_val(pgprot))
#endif
#endif
#endif /* _MIPS_PGTABLE_2LEVEL_H */
--- NEW FILE: pgtable-3level.h ---
#ifndef _MIPS_PGTABLE_3LEVEL_H
#define _MIPS_PGTABLE_3LEVEL_H
/*
* Not really a 3 level page table but we follow most of the x86 PAE code.
*/
#define PMD_SHIFT 21
#define PTRS_PER_PTE 512
#define PTRS_PER_PMD 1
#define PTRS_PER_PGD 2048
#define PGD_ORDER 1
#if !defined (_LANGUAGE_ASSEMBLY)
#define pte_ERROR(e) \
printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, &(e), (e).pte_high, (e).pte_low)
#define pmd_ERROR(e) \
printk("%s:%d: bad pmd %p(%016Lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
#define pgd_ERROR(e) \
printk("%s:%d: bad pgd %p(%016Lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
/*
* MIPS32 Note
* pte_low contains the 12 low bits only. This includes the 6 lsb bits
* which contain software control bits, and the next 6 attribute bits
* which are actually written in the entrylo[0,1] registers (G,V,D,Cache Mask).
* pte_high contains the 36 bit physical address and the 6 hardware
* attribute bits (G,V,D, Cache Mask). The entry is already fully setup
* so in the tlb refill handler we do not need to shift right 6.
*/
/* Rules for using set_pte: the pte being assigned *must* be
* either not present or in a state where the hardware will
* not attempt to update the pte. In places where this is
* not possible, use pte_get_and_clear to obtain the old pte
* value and then use set_pte to update it. -ben
*/
static inline void set_pte(pte_t *ptep, pte_t pte)
{
ptep->pte_high = (pte.pte_high & ~0x3f) | ((pte.pte_low>>6) & 0x3f);
ptep->pte_low = pte.pte_low;
}
static inline int pte_same(pte_t a, pte_t b)
{
return a.pte_low == b.pte_low && a.pte_high == b.pte_high;
}
#define pte_page(x) (mem_map+(((x).pte_high >> 6)))
#define pte_none(x) (!(x).pte_low && !(x).pte_high)
static inline pte_t
__mk_pte(unsigned long page_nr, pgprot_t pgprot)
{
pte_t pte;
pte.pte_high = (page_nr << 6) | (pgprot_val(pgprot) >> 6);
pte.pte_low = pgprot_val(pgprot);
return pte;
}
#endif
#endif /* _MIPS_PGTABLE_3LEVEL_H */
|
|
From: Paul M. <le...@us...> - 2002-03-09 02:14:42
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4131/casio-be300
In directory usw-pr-cvs1:/tmp/cvs-serv7883
Modified Files:
setup.c
Log Message:
More cleanups. Play with new API better.
Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4131/casio-be300/setup.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- setup.c 9 Mar 2002 01:28:02 -0000 1.2
+++ setup.c 9 Mar 2002 02:14:39 -0000 1.3
@@ -14,17 +14,17 @@
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/console.h>
+#include <linux/ide.h>
+#include <linux/ioport.h>
#include <asm/vr41xx.h>
#include <asm/reboot.h>
#include <asm/time.h>
-extern void vr4122_restart(char *command);
-extern void vr4122_halt(void);
-extern void vr4122_power_off(void);
-
-extern void vr4122_time_init(void);
-extern void vr4122_timer_setup(struct irqaction *irq);
+#ifdef CONFIG_BLK_DEV_INITRD
+extern unsigned long initrd_start, initrd_end;
+extern void *__rd_start, *__rd_end;
+#endif
void __init bus_error_init(void)
{
@@ -32,15 +32,33 @@
void __init nec_vr41xx_setup(void)
{
- _machine_restart = vr4122_restart;
- _machine_halt = vr4122_halt;
- _machine_power_off = vr4122_power_off;
+ _machine_restart = vr41xx_restart;
+ _machine_halt = vr41xx_halt;
+ _machine_power_off = vr41xx_power_off;
- board_time_init = vr4122_time_init;
- board_timer_setup = vr4122_timer_setup;
+ board_time_init = vr41xx_time_init;
+ board_timer_setup = vr41xx_timer_setup;
+
+#ifdef CONFIG_BLK_DEV_INITRD
+ ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
+ initrd_start = (unsigned long)&__rd_start;
+ initrd_end = (unsigned long)&__rd_end;
+#endif
+
+#ifdef CONFIG_BLK_DEV_IDE
+ ide_ops = &std_ide_ops;
+#endif
#ifdef CONFIG_FB
conswitchp = &dummy_con;
+#endif
+
+ vr41xx_bcu_init();
+
+ vr41xx_siu_init(1, SIU_RS232C, 0);
+
+#ifdef CONFIG_PCI
+ vr41xx_pciu_init();
#endif
}
|
|
From: Pete P. <pp...@us...> - 2002-03-09 02:07:13
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv6689/arch/mips/configs Modified Files: defconfig-pb1500 Log Message: Updated the pb1500 defconfig file. Index: defconfig-pb1500 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-pb1500,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- defconfig-pb1500 15 Feb 2002 19:47:26 -0000 1.3 +++ defconfig-pb1500 9 Mar 2002 02:07:10 -0000 1.4 @@ -1,5 +1,5 @@ # -# Automatically generated make config: don't edit +# Automatically generated by make menuconfig: don't edit # CONFIG_MIPS=y @@ -32,6 +32,9 @@ # CONFIG_NEC_MOBILEPRO is not set # CONFIG_IDT_79S334 is not set # CONFIG_IDT_79EB355 is not set +# CONFIG_IBM_WORKPAD is not set +# CONFIG_CASIO_E55 is not set +# CONFIG_VICTOR_MPC303 is not set # CONFIG_MIPS_MAGNUM_4000 is not set # CONFIG_MOMENCO_OCELOT is not set # CONFIG_DDB5476 is not set @@ -90,7 +93,7 @@ # CONFIG_CPU_MIPS64 is not set # CONFIG_CPU_RC32300 is not set CONFIG_CPU_HAS_PREFETCH=y -# CONFIG_64BIT_PHYS_ADDR is not set +CONFIG_64BIT_PHYS_ADDR=y CONFIG_CPU_ADVANCED=y CONFIG_CPU_HAS_LLSC=y # CONFIG_CPU_HAS_LLDSCD is not set @@ -102,6 +105,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y # CONFIG_CPU_R5900_CONTEXT is not set # CONFIG_VR4131_CACHE_FIX is not set +# CONFIG_VR4122_CLKSPEEDREG_FIX is not set CONFIG_KCORE_ELF=y CONFIG_ELF_KERNEL=y # CONFIG_BINFMT_AOUT is not set @@ -111,25 +115,9 @@ # CONFIG_CPU_FREQ is not set CONFIG_NET=y CONFIG_PCI_NAMES=y -CONFIG_HOTPLUG=y - -# -# PCMCIA/CardBus support -# -CONFIG_PCMCIA=m -# CONFIG_CARDBUS is not set -# CONFIG_I82092 is not set -# CONFIG_I82365 is not set -# CONFIG_PCMCIA_IRQ_REMAP is not set -# CONFIG_TCIC is not set -# CONFIG_PCMCIA_AU1000 is not set - -# -# PCI Hotplug Support -# +# CONFIG_HOTPLUG is not set +# CONFIG_PCMCIA is not set # CONFIG_HOTPLUG_PCI is not set -# CONFIG_HOTPLUG_PCI_COMPAQ is not set -# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -141,10 +129,6 @@ # CONFIG_MTD_DEBUG is not set CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_REDBOOT_PARTS is not set - -# -# User Modules And Translation Layers -# CONFIG_MTD_CHAR=y CONFIG_MTD_BLOCK=y # CONFIG_FTL is not set @@ -185,10 +169,6 @@ # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_MTDRAM is not set # CONFIG_MTD_BLKMTD is not set - -# -# Disk-On-Chip Device Drivers -# # CONFIG_MTD_DOC1000 is not set # CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2001 is not set @@ -266,10 +246,6 @@ # CONFIG_KHTTPD is not set # CONFIG_ATM is not set # CONFIG_VLAN_8021Q is not set - -# -# -# # CONFIG_IPX is not set # CONFIG_ATALK is not set # CONFIG_DECNET is not set @@ -304,10 +280,6 @@ # IDE, ATA and ATAPI Block devices # CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set CONFIG_BLK_DEV_IDEDISK=y @@ -321,15 +293,11 @@ # CONFIG_BLK_DEV_IDEDISK_WD is not set # CONFIG_BLK_DEV_COMMERIAL is not set # CONFIG_BLK_DEV_TIVO is not set -CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_IDECS is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set # CONFIG_BLK_DEV_IDESCSI is not set - -# -# IDE chipset support/bugfixes -# # CONFIG_BLK_DEV_CMD640 is not set # CONFIG_BLK_DEV_CMD640_ENHANCED is not set # CONFIG_BLK_DEV_ISAPNP is not set @@ -402,6 +370,7 @@ # CONFIG_BONDING is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set +# CONFIG_ETHERTAP is not set # # Ethernet (10 or 100Mbit) @@ -412,7 +381,6 @@ # CONFIG_HAPPYMEAL is not set # CONFIG_SUNBMAC is not set # CONFIG_SUNQE is not set -# CONFIG_SUNLANCE is not set # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set @@ -425,10 +393,10 @@ # CONFIG_ADAPTEC_STARFIRE is not set # CONFIG_APRICOT is not set # CONFIG_CS89x0 is not set +# CONFIG_TC35815 is not set # CONFIG_TULIP is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set -# CONFIG_TC35815 is not set # CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set # CONFIG_LNE390 is not set @@ -442,6 +410,7 @@ CONFIG_8139TOO_PIO=y # CONFIG_8139TOO_TUNE_TWISTER is not set # CONFIG_8139TOO_8129 is not set +# CONFIG_8139_NEW_RX_RESET is not set # CONFIG_SIS900 is not set # CONFIG_EPIC100 is not set # CONFIG_SUNDANCE is not set @@ -494,22 +463,6 @@ # CONFIG_WAN is not set # -# PCMCIA network device support -# -CONFIG_NET_PCMCIA=y -CONFIG_PCMCIA_3C589=m -# CONFIG_PCMCIA_3C574 is not set -# CONFIG_PCMCIA_FMVJ18X is not set -# CONFIG_PCMCIA_PCNET is not set -# CONFIG_PCMCIA_AXNET is not set -# CONFIG_PCMCIA_NMCLAN is not set -# CONFIG_PCMCIA_SMC91C92 is not set -# CONFIG_PCMCIA_XIRC2PS is not set -# CONFIG_ARCNET_COM20020_CS is not set -# CONFIG_PCMCIA_IBMTR is not set -# CONFIG_NET_PCMCIA_RADIO is not set - -# # Amateur Radio support # # CONFIG_HAMRADIO is not set @@ -576,36 +529,6 @@ # Joysticks # # CONFIG_INPUT_GAMEPORT is not set -# CONFIG_INPUT_NS558 is not set -# CONFIG_INPUT_LIGHTNING is not set -# CONFIG_INPUT_PCIGAME is not set -# CONFIG_INPUT_CS461X is not set -# CONFIG_INPUT_EMU10K1 is not set -# CONFIG_INPUT_SERIO is not set -# CONFIG_INPUT_SERPORT is not set - -# -# Joysticks -# -# CONFIG_INPUT_ANALOG is not set -# CONFIG_INPUT_A3D is not set -# CONFIG_INPUT_ADI is not set -# CONFIG_INPUT_COBRA is not set -# CONFIG_INPUT_GF2K is not set -# CONFIG_INPUT_GRIP is not set -# CONFIG_INPUT_INTERACT is not set -# CONFIG_INPUT_TMDC is not set -# CONFIG_INPUT_SIDEWINDER is not set -# CONFIG_INPUT_IFORCE_USB is not set -# CONFIG_INPUT_IFORCE_232 is not set -# CONFIG_INPUT_WARRIOR is not set -# CONFIG_INPUT_MAGELLAN is not set -# CONFIG_INPUT_SPACEORB is not set -# CONFIG_INPUT_SPACEBALL is not set -# CONFIG_INPUT_STINGER is not set -# CONFIG_INPUT_DB9 is not set -# CONFIG_INPUT_GAMECON is not set -# CONFIG_INPUT_TURBOGRAFX is not set # CONFIG_QIC02_TAPE is not set # @@ -625,11 +548,6 @@ # CONFIG_FTAPE is not set # CONFIG_AGP is not set # CONFIG_DRM is not set - -# -# PCMCIA character devices -# -# CONFIG_PCMCIA_SERIAL_CS is not set # CONFIG_AU1000_GPIO is not set # CONFIG_TS_AU1000_ADS7846 is not set @@ -750,6 +668,7 @@ # CONFIG_NLS_CODEPAGE_949 is not set # CONFIG_NLS_CODEPAGE_874 is not set # CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set # CONFIG_NLS_CODEPAGE_1251 is not set # CONFIG_NLS_ISO8859_1 is not set # CONFIG_NLS_ISO8859_2 is not set @@ -790,9 +709,10 @@ # CONFIG_FB_SIS is not set # CONFIG_FB_3DFX is not set # CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_TRIDENT is not set # CONFIG_FB_E1356 is not set -# CONFIG_FB_IT8181 is not set # CONFIG_FB_SIMPLE is not set +# CONFIG_FB_HPCSFB is not set # CONFIG_FB_VIRTUAL is not set CONFIG_FBCON_ADVANCED=y # CONFIG_FBCON_MFB is not set @@ -847,26 +767,10 @@ # # USB support # -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_BANDWIDTH is not set -# CONFIG_USB_LONG_TIMEOUT is not set - -# -# USB Controllers -# +# CONFIG_USB is not set # CONFIG_USB_UHCI is not set # CONFIG_USB_UHCI_ALT is not set -CONFIG_USB_OHCI=y - -# -# USB Device Class drivers -# +# CONFIG_USB_OHCI is not set # CONFIG_USB_AUDIO is not set # CONFIG_USB_BLUETOOTH is not set # CONFIG_USB_STORAGE is not set @@ -880,43 +784,16 @@ # CONFIG_USB_STORAGE_JUMPSHOT is not set # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set - -# -# USB Human Interface Devices (HID) -# -CONFIG_USB_HID=y -# CONFIG_USB_HIDDEV is not set -# CONFIG_USB_WACOM is not set - -# -# USB Imaging devices -# # CONFIG_USB_DC2XX is not set # CONFIG_USB_MDC800 is not set # CONFIG_USB_SCANNER is not set # CONFIG_USB_MICROTEK is not set # CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# # CONFIG_USB_PEGASUS is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set - -# -# USB port drivers -# # CONFIG_USB_USS720 is not set # @@ -930,6 +807,7 @@ # CONFIG_USB_SERIAL_EMPEG is not set # CONFIG_USB_SERIAL_FTDI_SIO is not set # CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set # CONFIG_USB_SERIAL_IR is not set # CONFIG_USB_SERIAL_EDGEPORT is not set # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set @@ -943,26 +821,21 @@ # CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set # CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set # CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_KLSI is not set # CONFIG_USB_SERIAL_PL2303 is not set # CONFIG_USB_SERIAL_CYBERJACK is not set # CONFIG_USB_SERIAL_XIRCOM is not set # CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# # CONFIG_USB_RIO500 is not set # # Input core support # -CONFIG_INPUT=y -CONFIG_INPUT_KEYBDEV=y -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT is not set +# CONFIG_INPUT_KEYBDEV is not set +# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVDEV is not set # # Kernel hacking |
|
From: Paul M. <le...@us...> - 2002-03-09 01:50:50
|
Update of /cvsroot/linux-mips/linux/include/asm-mips/vr41xx In directory usw-pr-cvs1:/tmp/cvs-serv3808 Modified Files: e55.h eagle.h mp-c303.h workpad.h Log Message: asm/vr41xx/vr41xx.h -> asm/vr41xx.h Index: e55.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/vr41xx/e55.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- e55.h 7 Mar 2002 03:16:55 -0000 1.1 +++ e55.h 9 Mar 2002 01:50:46 -0000 1.2 @@ -17,7 +17,7 @@ #define __CASIO_E55_H #include <asm/addrspace.h> -#include <asm/vr41xx/vr41xx.h> +#include <asm/vr41xx.h> /* * Board specific address mapping Index: eagle.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/vr41xx/eagle.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- eagle.h 7 Mar 2002 03:16:55 -0000 1.1 +++ eagle.h 9 Mar 2002 01:50:46 -0000 1.2 @@ -34,7 +34,7 @@ #define __NEC_EAGLE_H #include <asm/addrspace.h> -#include <asm/vr41xx/vr41xx.h> +#include <asm/vr41xx.h> /* * Board specific address mapping Index: mp-c303.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/vr41xx/mp-c303.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- mp-c303.h 7 Mar 2002 03:16:55 -0000 1.1 +++ mp-c303.h 9 Mar 2002 01:50:46 -0000 1.2 @@ -17,7 +17,7 @@ #define __VICTOR_MPC303_H #include <asm/addrspace.h> -#include <asm/vr41xx/vr41xx.h> +#include <asm/vr41xx.h> /* * Board specific address mapping Index: workpad.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/vr41xx/workpad.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- workpad.h 7 Mar 2002 03:16:55 -0000 1.1 +++ workpad.h 9 Mar 2002 01:50:46 -0000 1.2 @@ -17,7 +17,7 @@ #define __IBM_WORKPAD_H #include <asm/addrspace.h> -#include <asm/vr41xx/vr41xx.h> +#include <asm/vr41xx.h> /* * Board specific address mapping |
|
From: Pete P. <pp...@us...> - 2002-03-09 01:41:27
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv1948/include/asm-mips Modified Files: au1000_pcmcia.h Log Message: Pb1000/Pb1500 pcmcia now uses the new 36 bit support. Index: au1000_pcmcia.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/au1000_pcmcia.h,v retrieving revision 1.4 retrieving revision 1.5 diff -u -d -r1.4 -r1.5 --- au1000_pcmcia.h 15 Feb 2002 19:47:28 -0000 1.4 +++ au1000_pcmcia.h 9 Mar 2002 01:41:24 -0000 1.5 @@ -68,7 +68,8 @@ void *handler_info; pccard_io_map io_map[MAX_IO_WIN]; pccard_mem_map mem_map[MAX_WIN]; - u32 virt_io, phys_attr, phys_mem; + u32 virt_io; + memaddr_t phys_attr, phys_mem; unsigned short speed_io, speed_attr, speed_mem; }; |
|
From: Pete P. <pp...@us...> - 2002-03-09 01:41:27
|
Update of /cvsroot/linux-mips/linux/drivers/pcmcia
In directory usw-pr-cvs1:/tmp/cvs-serv1948/drivers/pcmcia
Modified Files:
au1000_generic.c
Log Message:
Pb1000/Pb1500 pcmcia now uses the new 36 bit support.
Index: au1000_generic.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/pcmcia/au1000_generic.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- au1000_generic.c 15 Feb 2002 19:47:27 -0000 1.6
+++ au1000_generic.c 9 Mar 2002 01:41:24 -0000 1.7
@@ -141,6 +141,11 @@
printk("\nAu1x00 PCMCIA (CS release %s)\n", CS_RELEASE);
+#ifndef CONFIG_64BIT_PHYS_ADDR
+ printk(KERN_ERR "Au1x00 PCMCIA 36 bit IO support not enabled\n");
+ return -1;
+#endif
+
CardServices(GetCardServicesInfo, &info);
if(info.Revision!=CS_RELEASE_CODE){
@@ -189,10 +194,12 @@
pcmcia_socket[i].cs_state.csc_mask=SS_DETECT;
if (i == 0) {
+ printk("sizeof(ioaddr_t) %d\n", sizeof(ioaddr_t));
pcmcia_socket[i].virt_io =
- (u32)ioremap(0xC0000000, 0x1000);
- pcmcia_socket[i].phys_attr = 0xC4000000;
- pcmcia_socket[i].phys_mem = 0xC8000000;
+ (u32)ioremap((ioaddr_t)0xF00000000, 0x1000);
+ printk("pcmcia virt io %x\n", pcmcia_socket[i].virt_io);
+ pcmcia_socket[i].phys_attr = (memaddr_t)0xF40000000;
+ pcmcia_socket[i].phys_mem = (memaddr_t)0xF80000000;
}
else {
printk(KERN_ERR "au1000: socket 1 not supported\n");
|
|
From: Pete P. <pp...@us...> - 2002-03-09 01:40:57
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv1790/include/asm-mips Modified Files: au1000.h Log Message: Pb1500 PCI support now uses new 36 bit code. Index: au1000.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/au1000.h,v retrieving revision 1.13 retrieving revision 1.14 diff -u -d -r1.13 -r1.14 --- au1000.h 15 Feb 2002 19:47:28 -0000 1.13 +++ au1000.h 9 Mar 2002 01:40:52 -0000 1.14 @@ -768,11 +768,18 @@ #define Au1500_PCI_HDR 0xB4005100 // virtual, kseg0 addr - /* these are all pseudo physical addresses */ -#define Au1500_EXT_CFG 0x20000000 -#define Au1500_PCI_IO_START 0x70000000 -#define Au1500_PCI_IO_END 0x700FFFFF -#define Au1500_PCI_MEM_START 0x80000000 -#define Au1500_PCI_MEM_END 0x83FFFFFF +/* All of our structures, like pci resource, have 32 bit members. + * Drivers are expected to do an ioremap on the PCI MEM resource, but it's + * hard to store 0x4 0000 0000 in a 32 bit type. We require a small patch + * to __ioremap to check for addresses between (u32)Au1500_PCI_MEM_START and + * (u32)Au1500_PCI_MEM_END and change those to the full 36 bit PCI MEM + * addresses. For PCI IO, it's simpler because we get to do the ioremap + * ourselves and then adjust the device's resources. + */ +#define Au1500_EXT_CFG 0x600000000 +#define Au1500_PCI_IO_START 0x550000000 +#define Au1500_PCI_IO_END 0x5500FFFFF +#define Au1500_PCI_MEM_START 0x440000000 +#define Au1500_PCI_MEM_END 0x443FFFFFF #endif |
|
From: Pete P. <pp...@us...> - 2002-03-09 01:40:57
|
Update of /cvsroot/linux-mips/linux/arch/mips/au1000/pb1500
In directory usw-pr-cvs1:/tmp/cvs-serv1790/arch/mips/au1000/pb1500
Modified Files:
pci_fixup.c
Log Message:
Pb1500 PCI support now uses new 36 bit code.
Index: pci_fixup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/pb1500/pci_fixup.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- pci_fixup.c 15 Feb 2002 19:47:26 -0000 1.2
+++ pci_fixup.c 9 Mar 2002 01:40:52 -0000 1.3
@@ -110,10 +110,9 @@
if (dev->resource[r_num].flags & IORESOURCE_IO) {
start = dev->resource[r_num].start;
size = dev->resource[r_num].end - start;
- new_start = virt_io_addr + (start - Au1500_PCI_IO_START);
+ new_start = virt_io_addr + (start - (u32)Au1500_PCI_IO_START);
dev->resource[r_num].start = new_start;
dev->resource[r_num].end = new_start + size;
}
}
-
#endif
|
|
From: Pete P. <pp...@us...> - 2002-03-09 01:40:55
|
Update of /cvsroot/linux-mips/linux/arch/mips/au1000/common
In directory usw-pr-cvs1:/tmp/cvs-serv1790/arch/mips/au1000/common
Modified Files:
irq.c
Log Message:
Pb1500 PCI support now uses new 36 bit code.
Index: irq.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/irq.c,v
retrieving revision 1.14
retrieving revision 1.15
diff -u -d -r1.14 -r1.15
--- irq.c 15 Feb 2002 19:47:24 -0000 1.14
+++ irq.c 9 Mar 2002 01:40:52 -0000 1.15
@@ -390,10 +390,6 @@
init_generic_irq();
- /* override the generic vec0 handler */
- memcpy((void *)KSEG0, &except_vec0_au1000, 0x80);
- flush_icache_range(KSEG0, KSEG0 + 0x200);
-
for (i = 0; i <= AU1000_MAX_INTR; i++) {
switch (i) {
case AU1000_UART0_INT:
|
|
From: Pete P. <pp...@us...> - 2002-03-09 01:40:09
|
Update of /cvsroot/linux-mips/linux/arch/mips/au1000/pb1500
In directory usw-pr-cvs1:/tmp/cvs-serv1543/arch/mips/au1000/pb1500
Modified Files:
setup.c
Log Message:
Added a Pb1500 specific __ioremap_fixup function.
Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/pb1500/setup.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- setup.c 15 Feb 2002 19:47:26 -0000 1.2
+++ setup.c 9 Mar 2002 01:40:06 -0000 1.3
@@ -79,6 +79,8 @@
extern struct resource ioport_resource;
extern struct resource iomem_resource;
+extern phys_t (*__ioremap_fixup)(phys_t phys_addr, phys_t size);
+static phys_t pb1500_ioremap_fixup(phys_t phys_addr, phys_t size);
void au1500_wbflush(void)
{
@@ -114,6 +116,7 @@
_machine_restart = au1000_restart;
_machine_halt = au1000_halt;
_machine_power_off = au1000_power_off;
+ __ioremap_fixup = pb1500_ioremap_fixup;
// IO/MEM resources.
set_io_port_base(0);
@@ -253,4 +256,20 @@
au_sync();
}
#endif
+}
+
+static phys_t pb1500_ioremap_fixup(phys_t phys_addr, phys_t size)
+{
+ u32 pci_start = (u32)Au1500_PCI_MEM_START;
+ u32 pci_end = (u32)Au1500_PCI_MEM_END;
+
+ /* Don't fixup 36 bit addresses */
+ if ((phys_addr >> 32) != 0) return phys_addr;
+
+ /* check for pci memory window */
+ if ((phys_addr >= pci_start) && ((phys_addr + size) < pci_end)) {
+ return (phys_t)((phys_addr - pci_start) + Au1500_PCI_MEM_START);
+ }
+ else
+ return phys_addr;
}
|
|
From: Pete P. <pp...@us...> - 2002-03-09 01:39:36
|
Update of /cvsroot/linux-mips/linux/arch/mips/mm In directory usw-pr-cvs1:/tmp/cvs-serv1399/arch/mips/mm Modified Files: tlbex-r4k.S Log Message: Removed the AU1000 36 bit pseudo-address code since that's no longer needed. Index: tlbex-r4k.S =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/tlbex-r4k.S,v retrieving revision 1.6 retrieving revision 1.7 diff -u -d -r1.6 -r1.7 --- tlbex-r4k.S 15 Feb 2002 19:47:27 -0000 1.6 +++ tlbex-r4k.S 9 Mar 2002 01:39:31 -0000 1.7 @@ -294,31 +294,6 @@ END(except_vec0_r4k_MP250MHZhwbug) #endif -#ifdef CONFIG_MIPS_AU1000 - /* TLB refill, EXL == 0, Au1000 version */ - /* we'll worry about smp later */ - .set noreorder - .set noat - LEAF(except_vec0_au1000) - .set mips3 - mfc0 k0, CP0_BADVADDR # Get faulting address - srl k0, k0, PGDIR_SHIFT # get pgd only bits - lw k1, pgd_current # get pgd pointer - sll k0, k0, 2 # log2(sizeof(pgd_t) - addu k1, k1, k0 # add in pgd offset - mfc0 k0, CP0_CONTEXT # get context reg - lw k1, (k1) -#ifndef CONFIG_64BIT_PHYS_ADDR - srl k0, k0, 1 # get pte offset -#endif - and k0, k0, PTEP_INDX_MSK - addu k1, k1, k0 # add in offset - j translate_pte - nop - END(except_vec0_au1000) -#endif - - __FINIT /* @@ -525,185 +500,3 @@ nowrite_mod: DO_FAULT(1) END(handle_mod) - -#ifdef CONFIG_MIPS_AU1000 - -#ifdef CONFIG_MIPS_PB1500 -#define PSEUDO_ADDR_BASE 0x20000000 -#endif - -#ifdef CONFIG_MIPS_PB1000 -#define PSEUDO_ADDR_BASE 0xC0000000 -#endif - -/* - * On entry k0 contains the pte with the pseudo address. - * On exit, k0 contains the "real" address, which is a - * 36 bit physicall address. - * This function is called only after it has been - * determined that the pte is a pseudo physical address. - * - * Destroys k0, k1, and at. It's assumed that the calling - * function will preserve those. - */ -LEAF(get_real_pte) - .set mips3 - .set at - - li k1, 0xe0000000 # check lcd - bltu k0, k1, check_pcmcia_socket_1 - nop - # lcd pseudo access - li k1, 0x0fffffff - and k0, k0, k1 # get offset -#ifdef CONFIG_MIPS_PB1500 - lui k1, 0x1b00 - addu k0, k0, k1 -#endif - srl k0, k0, 6 - lui k1, 0xe000>>2 - or k0, k0, k1 - j ra - nop -check_pcmcia_socket_1: - li k1, 0xD0000000 - bltu k0, k1, pcmcia_socket_0 - nop - # famous last words, should not happen ... -1: - b 1b # fixme -- to something a little more useful - # pcmcia socket 1 pseudo access - -pcmcia_socket_0: - # check mem access - li k1, 0xC8000000 - bltu k0, k1, check_attr - # handle pseudo memory access - li k1, 0x00ffffff - and k1, k0, k1 # get access offset - lui k0, 0x8000 - or k0, k0, k1 - # now we have the correct even pte ... bits 31:0 - srl k0, k0, 6 - lui k1, 0xf000>>2 - or k0, k0, k1 - j ra # done - nop -check_attr: - li k1, 0xC4000000 - bltu k0, k1, io_access - # handle pseudo attribute access - li k1, 0x00ffffff - and k1, k0, k1 # get access offset - lui k0, 0x4000 - or k0, k0, k1 - # now we have the correct even pte ... bits 31:0 - srl k0, k0, 6 - lui k1, 0xf000>>2 - or k0, k0, k1 - j ra # done - nop -io_access: -#ifdef CONFIG_MIPS_PB1500 - li k1, 0xC0000000 - bltu k0, k1, pci_access -#endif - # handle pseudo io access - li k1, 0x00ffffff - and k0, k0, k1 # get access offset - # now we have the correct even pte ... bits 31:0 - srl k0, k0, 6 - lui k1, 0xf000>>2 - or k0, k0, k1 - j ra # done - nop -#ifdef CONFIG_MIPS_PB1500 -pci_access: - li k1, 0x80000000 - bltu k0, k1, pci_io_access - lui k1, 0x4000>>2 - # handle pseudo pci mem access - srl k0, k0, 6 - or k0, k0, k1 - j ra # done - nop -pci_io_access: - li k1, 0x70000000 - bltu k0, k1, pci_cfg_access - lui k1, 0x5000>>2 - # handle pseudo pci io access - srl k0, k0, 6 - or k0, k0, k1 - j ra # done - nop -pci_cfg_access: - # handle pseudo pci ext cfg access - li k1, 0x0fffffff - and k0, k0, k1 # get access offset - srl k0, k0, 6 - lui k1, 0x6000>>2 - or k0, k0, k1 - j ra # done - nop -#endif - .set noat -END(get_real_pte) - -/* - * On entry k1 contains pte pointer. Clobbers only k0 and k1. - */ - LEAF(translate_pte) - .set mips3 - lui k0, %hi(__saved_at) - .set noat - sw $at, %lo(__saved_at)(k0) # save at - .set at - sw k1, %lo(__saved_pte)(k0) # save pte pointer - sw ra, %lo(__saved_ra)(k0) # save ra - lw k0, 0(k1) # get even pte - - li k1, PSEUDO_ADDR_BASE # check pseudo addr - bltu k0, k1, 1f - nop - bal get_real_pte - nop - b 2f - nop -1: - srl k0, k0, 6 -2: - mtc0 k0, CP0_ENTRYLO0 # load it - - lui k1, %hi(__saved_pte) - lw k1, %lo(__saved_pte)(k1) # recover pte pointer - lw k0, 4(k1) # get odd pte - - li k1, PSEUDO_ADDR_BASE # check pseudo addr - bltu k0, k1, 1f - nop - bal get_real_pte - nop - b 2f - nop - -1: - srl k0, k0, 6 # convert to entrylo0 -2: - mtc0 k0, CP0_ENTRYLO1 # load it - nop - b 1f - tlbwr # write random tlb entry -1: - lui k0, %hi(__saved_at) - .set noat - lw $at, %lo(__saved_at)(k0) # restore at - .set at - lw ra, %lo(__saved_ra)(k0) # restore ra - eret # return from trap - .set noat - END(translate_pte) - -__saved_at: PTR 0 -__saved_pte: PTR 0 -__saved_ra: PTR 0 -#endif |
|
From: Pete P. <pp...@us...> - 2002-03-09 01:38:44
|
Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv1203/arch/mips/mm
Modified Files:
ioremap.c
Log Message:
Added an __ioremap_fixup function to help some 36 bit platforms.
Index: ioremap.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/ioremap.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- ioremap.c 9 Mar 2002 01:37:31 -0000 1.5
+++ ioremap.c 9 Mar 2002 01:38:39 -0000 1.6
@@ -94,6 +94,17 @@
}
/*
+ * Allow physical addresses to be fixed up to help 36 bit
+ * peripherals.
+ */
+static phys_t def_ioremap_fixup(phys_t phys_addr, phys_t size)
+{
+ return phys_addr;
+}
+
+phys_t (*__ioremap_fixup)(phys_t phys_addr, phys_t size) = def_ioremap_fixup;
+
+/*
* Generic mapping function (not visible outside):
*/
@@ -115,6 +126,8 @@
unsigned long offset;
phys_t last_addr;
void * addr;
+
+ phys_addr = __ioremap_fixup(phys_addr, size);
/* Don't allow wraparound or zero size */
last_addr = phys_addr + size - 1;
|
|
From: Pete P. <pp...@us...> - 2002-03-09 01:37:35
|
Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv1053/arch/mips/mm
Modified Files:
ioremap.c
Log Message:
Fixed IS_LOW512 to work with greater than 32 bit addresses.
Index: ioremap.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/ioremap.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- ioremap.c 14 Feb 2002 20:40:30 -0000 1.4
+++ ioremap.c 9 Mar 2002 01:37:31 -0000 1.5
@@ -107,7 +107,7 @@
* caller shouldn't need to know that small detail.
*/
-#define IS_LOW512(addr) (!((phys_t)(addr) & ~0x1fffffffUL))
+#define IS_LOW512(addr) (!((phys_t)(addr) & ~0x1fffffffUL) && !((phys_t)addr & 0xFFFFFFFF00000000))
void * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
{
|
|
From: Pete P. <pp...@us...> - 2002-03-09 01:36:23
|
Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv757/include/asm-mips
Modified Files:
page.h pgtable.h
Log Message:
36 bit support for MIPS32 CPUs.
Index: page.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/page.h,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- page.h 28 Jan 2002 18:48:10 -0000 1.6
+++ page.h 9 Mar 2002 01:36:19 -0000 1.7
@@ -69,15 +69,22 @@
* These are used to make use of C type-checking..
*/
#ifdef CONFIG_64BIT_PHYS_ADDR
-typedef struct { unsigned long long pte; } pte_t;
+ #ifdef CONFIG_CPU_MIPS32
+ typedef struct { unsigned long pte_low, pte_high; } pte_t;
+ #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32))
+ #else
+ typedef struct { unsigned long long pte_low; } pte_t;
+ #define pte_val(x) ((x).pte_low)
+ #endif
#else
-typedef struct { unsigned long pte; } pte_t;
+typedef struct { unsigned long pte_low; } pte_t;
+#define pte_val(x) ((x).pte_low)
#endif
+
typedef struct { unsigned long pmd; } pmd_t;
typedef struct { unsigned long pgd; } pgd_t;
typedef struct { unsigned long pgprot; } pgprot_t;
-#define pte_val(x) ((x).pte)
#define pmd_val(x) ((x).pmd)
#define pgd_val(x) ((x).pgd)
#define pgprot_val(x) ((x).pgprot)
Index: pgtable.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/pgtable.h,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -d -r1.13 -r1.14
--- pgtable.h 12 Feb 2002 18:14:20 -0000 1.13
+++ pgtable.h 9 Mar 2002 01:36:19 -0000 1.14
@@ -19,6 +19,7 @@
#include <asm/cachectl.h>
#include <asm/fixmap.h>
+
/* Cache flushing:
*
* - flush_cache_all() flushes entire cache
@@ -91,11 +92,6 @@
#endif /* !defined (_LANGUAGE_ASSEMBLY) */
/* PMD_SHIFT determines the size of the area a second-level page table can map */
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define PMD_SHIFT 21
-#else
-#define PMD_SHIFT 22
-#endif
#define PMD_SIZE (1UL << PMD_SHIFT)
#define PMD_MASK (~(PMD_SIZE-1))
@@ -108,17 +104,6 @@
* Entries per page directory level: we use two-level, so
* we don't really have any PMD directory physically.
*/
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define PTRS_PER_PTE 512
-#define PTRS_PER_PMD 1
-#define PTRS_PER_PGD 2048
-#define PGD_ORDER 1
-#else
-#define PTRS_PER_PTE 1024
-#define PTRS_PER_PMD 1
-#define PTRS_PER_PGD 1024
-#define PGD_ORDER 0
-#endif
#define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE)
#define FIRST_USER_PGD_NR 0
@@ -251,19 +236,13 @@
#define __S110 PAGE_SHARED
#define __S111 PAGE_SHARED
-#if !defined (_LANGUAGE_ASSEMBLY)
-
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define pte_ERROR(e) \
- printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e))
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+#include <asm/pgtable-3level.h>
#else
-#define pte_ERROR(e) \
- printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
+#include <asm/pgtable-2level.h>
#endif
-#define pmd_ERROR(e) \
- printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
-#define pgd_ERROR(e) \
- printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
+
+#if !defined (_LANGUAGE_ASSEMBLY)
extern unsigned long empty_zero_page;
extern unsigned long zero_page_mask;
@@ -289,29 +268,7 @@
pmd_val(*pmdp) = (((unsigned long) ptep) & PAGE_MASK);
}
-static inline int pte_none(pte_t pte) { return !pte_val(pte); }
-static inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_PRESENT; }
-/* Certain architectures need to do special things when pte's
- * within a page table are directly modified. Thus, the following
- * hook is made available.
- */
-static inline void set_pte(pte_t *ptep, pte_t pteval)
-{
- *ptep = pteval;
-}
-
-static inline void pte_clear(pte_t *ptep)
-{
- set_pte(ptep, __pte(0));
-}
-
-/*
- * (pmds are folded into pgds so this doesnt get actually called,
- * but the define is needed for a generic inline function.)
- */
-#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
-#define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval)
/*
* Empty pgd/pmd entries point to the invalid_pte_table.
@@ -338,6 +295,12 @@
}
/*
+ * Permanent address of a page. Obviously must never be called on a highmem
+ * page.
+ */
+#define page_address(page) ((page)->virtual)
+
+/*
* The "pgd_xxx()" functions here are trivial for a folded two-level
* setup: the pgd is never bad, and a pmd always exists (as it's folded
* into the pgd entry)
@@ -348,70 +311,69 @@
static inline void pgd_clear(pgd_t *pgdp) { }
/*
- * Permanent address of a page. Obviously must never be called on a highmem
- * page.
- */
-#define page_address(page) ((page)->virtual)
-#ifdef CONFIG_CPU_VR41XX
-#define pte_page(x) (mem_map+(unsigned long)((pte_val(x) >> (PAGE_SHIFT + 2))))
-#else
-#define pte_page(x) (mem_map+(unsigned long)((pte_val(x) >> PAGE_SHIFT)))
-#endif
-
-/*
* The following only work if pte_present() is true.
* Undefined behaviour if not..
*/
-static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_READ; }
-static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
-static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
-static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
+static inline int pte_present(pte_t pte) { return (pte.pte_low) & _PAGE_PRESENT; }
+
+static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; }
+static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; }
+static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; }
+static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; }
+
+static inline void pte_clear(pte_t *ptep)
+{
+ set_pte(ptep, __pte(0));
+}
static inline pte_t pte_wrprotect(pte_t pte)
{
- pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
+ (pte).pte_low &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
return pte;
}
static inline pte_t pte_rdprotect(pte_t pte)
{
- pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ);
+ (pte).pte_low &= ~(_PAGE_READ | _PAGE_SILENT_READ);
return pte;
}
static inline pte_t pte_mkclean(pte_t pte)
{
- pte_val(pte) &= ~(_PAGE_MODIFIED|_PAGE_SILENT_WRITE);
+ (pte).pte_low &= ~(_PAGE_MODIFIED|_PAGE_SILENT_WRITE);
return pte;
}
static inline pte_t pte_mkold(pte_t pte)
{
- pte_val(pte) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
+ (pte).pte_low &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
return pte;
}
static inline pte_t pte_mkwrite(pte_t pte)
{
- pte_val(pte) |= _PAGE_WRITE;
- if (pte_val(pte) & _PAGE_MODIFIED)
- pte_val(pte) |= _PAGE_SILENT_WRITE;
+ (pte).pte_low |= _PAGE_WRITE;
+ if ((pte).pte_low & _PAGE_MODIFIED) {
+ (pte).pte_low |= _PAGE_SILENT_WRITE;
+ }
return pte;
}
static inline pte_t pte_mkread(pte_t pte)
{
- pte_val(pte) |= _PAGE_READ;
- if (pte_val(pte) & _PAGE_ACCESSED)
- pte_val(pte) |= _PAGE_SILENT_READ;
+ (pte).pte_low |= _PAGE_READ;
+ if ((pte).pte_low & _PAGE_ACCESSED) {
+ (pte).pte_low |= _PAGE_SILENT_READ;
+ }
return pte;
}
static inline pte_t pte_mkdirty(pte_t pte)
{
- pte_val(pte) |= _PAGE_MODIFIED;
- if (pte_val(pte) & _PAGE_WRITE)
- pte_val(pte) |= _PAGE_SILENT_WRITE;
+ (pte).pte_low |= _PAGE_MODIFIED;
+ if ((pte).pte_low & _PAGE_WRITE) {
+ (pte).pte_low |= _PAGE_SILENT_WRITE;
+ }
return pte;
}
@@ -434,9 +396,9 @@
static inline pte_t pte_mkyoung(pte_t pte)
{
- pte_val(pte) |= _PAGE_ACCESSED;
- if (pte_val(pte) & _PAGE_READ)
- pte_val(pte) |= _PAGE_SILENT_READ;
+ (pte).pte_low |= _PAGE_ACCESSED;
+ if ((pte).pte_low & _PAGE_READ)
+ (pte).pte_low |= _PAGE_SILENT_READ;
return pte;
}
@@ -445,42 +407,21 @@
* and a page entry and page directory to the page they refer to.
*/
-#ifdef CONFIG_CPU_VR41XX
-#define mk_pte(page, pgprot) \
-({ \
- pte_t __pte; \
- \
- pte_val(__pte) = ((phys_t)(page - mem_map) << (PAGE_SHIFT + 2)) | \
- pgprot_val(pgprot); \
- \
- __pte; \
-})
-#else
-#define mk_pte(page, pgprot) \
-({ \
- pte_t __pte; \
- \
- pte_val(__pte) = ((phys_t)(page - mem_map) << PAGE_SHIFT) | \
- pgprot_val(pgprot); \
- \
- __pte; \
-})
-#endif
-
-static inline pte_t mk_pte_phys(phys_t physpage, pgprot_t pgprot)
-{
-#ifdef CONFIG_CPU_VR41XX
- return __pte((physpage << 2) | pgprot_val(pgprot));
-#else
- return __pte(physpage | pgprot_val(pgprot));
-#endif
-}
+#define mk_pte(page, pgprot) __mk_pte((page) - mem_map, (pgprot))
+#define mk_pte_phys(physpage, pgprot) __mk_pte((physpage) >> PAGE_SHIFT, pgprot)
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
- return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
+ return __pte(((pte).pte_low & _PAGE_CHG_MASK) | pgprot_val(newprot));
}
+/*
+ * (pmds are folded into pgds so this doesnt get actually called,
+ * but the define is needed for a generic inline function.)
+ */
+#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
+#define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval)
+
#define page_pte(page) page_pte_prot(page, __pgprot(0))
#define __pgd_offset(address) pgd_index(address)
@@ -522,7 +463,7 @@
#define SWP_TYPE(x) (((x).val >> 1) & 0x3f)
#define SWP_OFFSET(x) ((x).val >> 8)
#define SWP_ENTRY(type,offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
-#define pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
+#define pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_low })
#define swp_entry_to_pte(x) ((pte_t) { (x).val })
|
|
From: Pete P. <pp...@us...> - 2002-03-09 01:36:22
|
Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv757/arch/mips/mm
Modified Files:
Makefile tlb-r4k.c
Log Message:
36 bit support for MIPS32 CPUs.
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/Makefile,v
retrieving revision 1.14
retrieving revision 1.15
diff -u -d -r1.14 -r1.15
--- Makefile 19 Jan 2002 21:17:35 -0000 1.14
+++ Makefile 9 Mar 2002 01:36:19 -0000 1.15
@@ -28,7 +28,7 @@
obj-$(CONFIG_CPU_R5432) += pg-r5432.o c-r5432.o tlb-r4k.o tlbex-r4k.o
obj-$(CONFIG_CPU_RM7000) += pg-rm7k.o c-rm7k.o tlb-r4k.o tlbex-r4k.o
obj-$(CONFIG_CPU_R10000) += pg-andes.o c-andes.o tlb-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_MIPS32) += pg-mips32.o c-mips32.o tlb-r4k.o tlbex-r4k.o
+obj-$(CONFIG_CPU_MIPS32) += pg-mips32.o c-mips32.o tlb-r4k.o tlbex-mips32.o
obj-$(CONFIG_CPU_MIPS64) += pg-mips32.o c-mips32.o tlb-r4k.o tlbex-r4k.o
obj-$(CONFIG_CPU_SR7100) += pg-mips32.o c-sr7100.o tlb-r4k.o tlbex-r4k.o
obj-$(CONFIG_CPU_SB1) += pg-sb1.o c-sb1.o tlb-sb1.o tlbex-r4k.o
Index: tlb-r4k.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/tlb-r4k.c,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -d -r1.10 -r1.11
--- tlb-r4k.c 28 Jan 2002 23:15:25 -0000 1.10
+++ tlb-r4k.c 9 Mar 2002 01:36:19 -0000 1.11
@@ -211,8 +211,14 @@
idx = get_index();
ptep = pte_offset(pmdp, address);
BARRIER;
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+ set_entrylo0(ptep->pte_high);
+ ptep++;
+ set_entrylo1(ptep->pte_high);
+#else
set_entrylo0(pte_val(*ptep++) >> 6);
set_entrylo1(pte_val(*ptep) >> 6);
+#endif
set_entryhi(address | (pid));
BARRIER;
if (idx < 0) {
|
|
From: Paul M. <le...@us...> - 2002-03-09 01:28:07
|
Update of /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4131/casio-be300
In directory usw-pr-cvs1:/tmp/cvs-serv31524/vr41xx/vr4131/casio-be300
Modified Files:
setup.c
Log Message:
Cleanup setup routines, use nec_vr41xx_setup().
Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4131/casio-be300/setup.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- setup.c 9 Mar 2002 01:23:32 -0000 1.1
+++ setup.c 9 Mar 2002 01:28:02 -0000 1.2
@@ -30,7 +30,7 @@
{
}
-void __init casio_be300_setup(void)
+void __init nec_vr41xx_setup(void)
{
_machine_restart = vr4122_restart;
_machine_halt = vr4122_halt;
|
|
From: Paul M. <le...@us...> - 2002-03-09 01:28:07
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv31524/kernel Modified Files: setup.c Log Message: Cleanup setup routines, use nec_vr41xx_setup(). Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/setup.c,v retrieving revision 1.51 retrieving revision 1.52 diff -u -d -r1.51 -r1.52 --- setup.c 7 Mar 2002 03:16:53 -0000 1.51 +++ setup.c 9 Mar 2002 01:28:02 -0000 1.52 @@ -723,7 +723,6 @@ void swarm_setup(void); void hp_setup(void); void idt_setup(void); - void casio_be300_setup(void); void nec_vr41xx_setup(void); unsigned long bootmap_size; @@ -834,11 +833,6 @@ #ifdef CONFIG_NEC_MOBILEPRO_780 case MACH_GROUP_NEC_VR41XX: nec_mobilepro_setup(); - break; -#endif -#ifdef CONFIG_CASIO_BE300 - case MACH_GROUP_NEC_VR41XX: - casio_be300_setup(); break; #endif #ifdef CONFIG_CPU_VR41XX |
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