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From: Steve L. <slo...@us...> - 2002-04-29 23:05:14
|
Update of /cvsroot/linux-mips/linux/arch/mips
In directory usw-pr-cvs1:/tmp/cvs-serv16874/arch/mips
Modified Files:
Makefile config.in
Log Message:
Initial IDT 79EB355 support.
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/Makefile,v
retrieving revision 1.45
retrieving revision 1.46
diff -u -d -r1.45 -r1.46
--- Makefile 12 Apr 2002 20:45:06 -0000 1.45
+++ Makefile 29 Apr 2002 23:05:11 -0000 1.46
@@ -16,9 +16,11 @@
# Select the object file format to substitute into the linker script.
#
ifdef CONFIG_CPU_LITTLE_ENDIAN
-tool-prefix = mipsel-linux-
+#tool-prefix = mipsel-linux-
+tool-prefix = mips_fp_le-
else
-tool-prefix = mips-linux-
+#tool-prefix = mips-linux-
+tool-prefix = mips_fp_be-
endif
ifdef CONFIG_CROSSCOMPILE
@@ -400,7 +402,7 @@
# IDT 79EB355 evaluation board.
#
ifdef CONFIG_IDT_79EB355
-LIBS += arch/mips/rc32300/79EB355/idt-79EB355.o
+LIBS += arch/mips/rc32300/79EB355/idt-79EB355.o \
arch/mips/rc32300/common/rc32300.o
SUBDIRS += arch/mips/rc32300/79EB355 arch/mips/rc32300/common
LOADADDR += 0x80200000
Index: config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/config.in,v
retrieving revision 1.95
retrieving revision 1.96
diff -u -d -r1.95 -r1.96
--- config.in 23 Apr 2002 13:14:28 -0000 1.95
+++ config.in 29 Apr 2002 23:05:11 -0000 1.96
@@ -401,7 +401,7 @@
define_bool CONFIG_PC_KEYB y
fi
if [ "$CONFIG_IDT_79S334" = "y" ]; then
- define_bool CONFIG_CPU_RC32334 y
+ define_bool CONFIG_MIPS_RC32334 y
define_bool CONFIG_NEW_IRQ y
define_bool CONFIG_NEW_TIME_C y
define_bool CONFIG_PCI y
@@ -414,17 +414,12 @@
fi
fi
if [ "$CONFIG_IDT_79EB355" = "y" ]; then
- define_bool CONFIG_CPU_RC32355 y
+ define_bool CONFIG_MIPS_RC32355 y
define_bool CONFIG_NEW_IRQ y
define_bool CONFIG_NEW_TIME_C y
- define_bool CONFIG_PCI y
- define_bool CONFIG_NEW_PCI y
- define_bool CONFIG_PCI_AUTO y
+ define_bool CONFIG_PCI n
define_bool CONFIG_NONCOHERENT_IO y
- define_bool CONFIG_SWAP_IO_SPACE y
- if [ "$CONFIG_VT" = "y" ]; then
- define_bool CONFIG_PC_KEYB y
- fi
+ define_bool CONFIG_SWAP_IO_SPACE n
fi
if [ "$CONFIG_VADEM_CLIO_1000" = "y" ]; then
define_bool CONFIG_CPU_VR41XX y
|
|
From: Steve L. <slo...@us...> - 2002-04-29 23:05:14
|
Update of /cvsroot/linux-mips/linux/arch/mips/rc32300/79EB355
In directory usw-pr-cvs1:/tmp/cvs-serv16874/arch/mips/rc32300/79EB355
Added Files:
Makefile irq.c lcd.c rtc-ds1501.c setup.c
Log Message:
Initial IDT 79EB355 support.
--- NEW FILE: Makefile ---
#
# Copyright 2001 MontaVista Software Inc.
# Author: MontaVista Software, Inc.
# st...@mv... or so...@mv...
#
# Makefile for the IDT 79EB355 board specific parts of the kernel
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
.S.s:
$(CPP) $(CFLAGS) $< -o $*.s
.S.o:
$(CC) $(CFLAGS) -c $< -o $*.o
O_TARGET := idt-79EB355.o
obj-y := irq.o lcd.o setup.o
obj-$(CONFIG_MIPS_RTC) += rtc-ds1501.o
include $(TOPDIR)/Rules.make
--- NEW FILE: irq.c ---
/*
* BRIEF MODULE DESCRIPTION
* RC32355 interrupt routines.
*
* Copyright 2002 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* st...@mv... or so...@mv...
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/delay.h>
#include <asm/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/rc32300/rc32300.h>
#undef DEBUG_IRQ
#ifdef DEBUG_IRQ
/* note: prints function name for you */
#define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ## args)
#else
#define DPRINTK(fmt, args...)
#endif
#ifdef CONFIG_REMOTE_DEBUG
extern void breakpoint(void);
#endif
extern asmlinkage void rc32300_IRQ(void);
extern void set_debug_traps(void);
extern irq_cpustat_t irq_stat [NR_CPUS];
unsigned int local_bh_count[NR_CPUS];
unsigned int local_irq_count[NR_CPUS];
static unsigned int startup_irq(unsigned int irq);
static void end_irq(unsigned int irq_nr);
static void mask_and_ack_irq(unsigned int irq_nr);
static void rc32355_enable_irq(unsigned int irq_nr);
static void rc32355_disable_irq(unsigned int irq_nr);
extern unsigned int do_IRQ(int irq, struct pt_regs *regs);
extern void __init init_generic_irq(void);
#ifdef CONFIG_PM
extern void counter0_irq(int irq, void *dev_id, struct pt_regs *regs);
#endif
typedef struct {
int irq_base; /* Base IRQ # of this interrupt group */
int num_irqs; /* Number of IRQs in this group */
u32 mask; /* mask of valid bits in pending/mask registers */
} intr_group_t;
static const intr_group_t intr_group[NUM_INTR_GROUPS] = {
{ GROUP0_IRQ_BASE, 6, 0x0000003f },
{ GROUP1_IRQ_BASE, 16, 0x0000ffff },
{ GROUP2_IRQ_BASE, 10, 0x000003ff },
{ GROUP3_IRQ_BASE, 24, 0x00ffffff },
{ GROUP4_IRQ_BASE, 32, 0xffffffff }
};
#define READ_PEND(g) \
rc32300_readl(IC_GROUP0_PEND + (g)*IC_GROUP_OFFSET)
#define READ_MASK(g) \
rc32300_readl(IC_GROUP0_MASK + (g)*IC_GROUP_OFFSET)
#define WRITE_MASK(g,val) \
rc32300_writel((val), IC_GROUP0_MASK + (g)*IC_GROUP_OFFSET)
static inline int irq_to_group(unsigned int irq_nr)
{
int i;
for (i=NUM_INTR_GROUPS-1; i >= 0; i--) {
if (irq_nr >= intr_group[i].irq_base)
break;
}
return i;
}
static inline int ip_to_irq(int ipnum)
{
if (ipnum <= 6 && ipnum >= 2)
return intr_group[ipnum-2].irq_base;
else
return ipnum;
}
static inline int irq_to_ip(int irq)
{
if (irq < GROUP0_IRQ_BASE) {
return irq;
} else {
return irq_to_group(irq) + 2;
}
}
static inline int group_to_ip(int group)
{
return group + 2;
}
static inline int ip_to_group(int ipnum)
{
return ipnum - 2;
}
static inline void enable_local_irq(unsigned int irq_nr)
{
int ipnum = irq_to_ip(irq_nr);
clear_cp0_cause(1 << (ipnum + 8));
set_cp0_status(1 << (ipnum + 8));
}
static inline void disable_local_irq(unsigned int irq_nr)
{
int ipnum = irq_to_ip(irq_nr);
clear_cp0_status(1 << (ipnum + 8));
}
static inline void ack_local_irq(unsigned int irq_nr)
{
int ipnum = irq_to_ip(irq_nr);
clear_cp0_cause(1 << (ipnum + 8));
}
static void enable_exp_irq(unsigned int irq_nr, int group)
{
const intr_group_t* g = &intr_group[group];
u32 mask, intr_bit;
// calc interrupt bit within group
intr_bit = (1 << (irq_nr - g->irq_base)) & g->mask;
if (!intr_bit)
return;
DPRINTK("irq%d (group %d, mask %d)\n",
irq_nr, group, intr_bit);
// first enable the IP mapped to this IRQ
enable_local_irq(irq_nr);
// unmask intr within group
mask = READ_MASK(group) & g->mask;
WRITE_MASK(group, mask & ~intr_bit);
}
static void disable_exp_irq(unsigned int irq_nr, int group)
{
const intr_group_t* g = &intr_group[group];
u32 mask, intr_bit;
// calc interrupt bit within group
intr_bit = (1 << (irq_nr - g->irq_base)) & g->mask;
if (!intr_bit)
return;
DPRINTK("irq%d (group %d, mask %d)\n",
irq_nr, group, intr_bit);
// mask intr within group
mask = READ_MASK(group) & g->mask;
mask |= intr_bit;
WRITE_MASK(group, mask);
/*
if there are no more interrupts enabled in this
group, disable corresponding IP
*/
if (mask == g->mask)
disable_local_irq(irq_nr);
}
static void rc32355_enable_irq(unsigned int irq_nr)
{
unsigned long flags;
save_and_cli(flags);
if (irq_nr < GROUP0_IRQ_BASE)
enable_local_irq(irq_nr);
else {
int group = irq_to_group(irq_nr);
enable_exp_irq(irq_nr, group);
}
restore_flags(flags);
}
static void rc32355_disable_irq(unsigned int irq_nr)
{
unsigned long flags;
save_and_cli(flags);
if (irq_nr < GROUP0_IRQ_BASE)
disable_local_irq(irq_nr);
else {
int group = irq_to_group(irq_nr);
disable_exp_irq(irq_nr, group);
}
restore_flags(flags);
}
void rc32355_ack_irq(unsigned int irq_nr)
{
ack_local_irq(irq_nr);
}
static unsigned int startup_irq(unsigned int irq_nr)
{
rc32355_enable_irq(irq_nr);
return 0;
}
static void shutdown_irq(unsigned int irq_nr)
{
rc32355_disable_irq(irq_nr);
return;
}
static void mask_and_ack_irq(unsigned int irq_nr)
{
rc32355_disable_irq(irq_nr);
ack_local_irq(irq_nr);
}
static void end_irq(unsigned int irq_nr)
{
if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
if (irq_nr < GROUP0_IRQ_BASE) {
ack_local_irq(irq_nr);
enable_local_irq(irq_nr);
} else {
int group = irq_to_group(irq_nr);
enable_exp_irq(irq_nr, group);
}
} else {
printk("warning: end_irq %d did not enable (%x)\n",
irq_nr, irq_desc[irq_nr].status);
}
}
static struct hw_interrupt_type rc32355_irq_type = {
"RC32355",
startup_irq,
shutdown_irq,
rc32355_enable_irq,
rc32355_disable_irq,
mask_and_ack_irq,
end_irq,
NULL
};
void __init init_IRQ(void)
{
int i;
unsigned long cp0_status;
cp0_status = read_32bit_cp0_register(CP0_STATUS);
memset(irq_desc, 0, sizeof(irq_desc));
set_except_vector(0, rc32300_IRQ);
init_generic_irq();
for (i = 0; i < RC32355_NR_IRQS; i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
irq_desc[i].handler = &rc32355_irq_type;
}
#ifdef CONFIG_REMOTE_DEBUG
/* If local serial I/O used for debug port, enter kgdb at once */
puts("Waiting for kgdb to connect...");
set_debug_traps();
breakpoint();
#endif
}
/*
* Interrupts are nested. Even if an interrupt handler is registered
* as "fast", we might get another interrupt before we return from
* *_dispatch().
*/
/* Dispatch to expanded interrupts */
static void int01234_dispatch(struct pt_regs *regs, int ipnum)
{
int group, intr;
const intr_group_t* g;
u32 pend;
group = ip_to_group(ipnum);
g = &intr_group[group];
pend = READ_PEND(group) & g->mask;
pend &= ~READ_MASK(group); // only unmasked interrupts
if (!pend)
return; // no interrupts pending in this group
intr = 31 - rc32300_clz(pend);
#ifdef DEBUG_IRQ
idtprintf("%02d%02d", group, intr);
#endif
do_IRQ(g->irq_base + intr, regs);
}
static void mips_spurious_interrupt(struct pt_regs *regs)
{
#if 1
return;
#else
unsigned long status, cause;
printk("got spurious interrupt\n");
status = read_32bit_cp0_register(CP0_STATUS);
cause = read_32bit_cp0_register(CP0_CAUSE);
printk("status %x cause %x\n", status, cause);
printk("epc %x badvaddr %x \n", regs->cp0_epc, regs->cp0_badvaddr);
// while(1);
#endif
}
/* Main Interrupt dispatcher */
void rc32300_irqdispatch(unsigned long cp0_cause, struct pt_regs *regs)
{
unsigned long ip;
int ipnum;
ip = (cp0_cause >> 8) & 0xff;
if (!ip) {
mips_spurious_interrupt(regs);
return;
}
ipnum = 31 - rc32300_clz(ip);
if (ipnum >= 2 && ipnum <= 6) {
int01234_dispatch(regs, ipnum);
} else {
int irq = ip_to_irq(ipnum);
do_IRQ(irq, regs);
}
}
--- NEW FILE: lcd.c ---
/*
* BRIEF MODULE DESCRIPTION
* IDT 79EB355 lcd support.
*
* Copyright 2002 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* st...@mv... or so...@mv...
*
* Modified slightly from version by IDT:
*
* Copyright a 2000 by Integrated Device Technology, Inc.
* This software is the property of the Integrated Device
* Technology, Inc. (IDT).
* IDT MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
* WITH REGARD TO THIS SOFTWARE. IN NO EVENT SHALL IDT
* BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL DAMAGES IN
* CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE,
* OR USE OF THIS SOFTWARE.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/ioport.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/rc32300/rc32300.h>
#define LCD_FUNC_SET 0x38
#define LCD_ENT_MODE 0x06
#define LCD_DISP_ON_CURS_OFF 0x0C
#define LCD_DISP_ON_CURS_ON 0x0E
#define LCD_DISP_CLEAR 0x01
#define LCD_DDRAM_ADR_SET_0 0x80
#define LCD_DDRAM_ADR_SET_1 0xC0
#define LCD_MAX_CHAR_PER_LINE 16
#define LCD_MAX_LINES 2
static void delay_lcd_long(void)
{
int ii ;
for (ii = 0 ; ii < 0x5FF ; ii++)
;
}
static void delay_lcd_short(void)
{
int ii ;
for (ii = 0 ; ii < 0x1FF ; ii++)
;
}
int init_lcd(void)
{
u8* chLcdBase = (u8*)KSEG1ADDR(LCD_BASE);
/*-------------- Reset LCD ---------------------------*/
delay_lcd_long() ;
/* send function select 4 times */
writeb(LCD_FUNC_SET, chLcdBase);
delay_lcd_long() ;
writeb(LCD_FUNC_SET, chLcdBase);
delay_lcd_long() ;
writeb(LCD_FUNC_SET, chLcdBase);
delay_lcd_long() ;
writeb(LCD_FUNC_SET, chLcdBase);
delay_lcd_long() ;
writeb(LCD_ENT_MODE, chLcdBase);
delay_lcd_long() ;
writeb(LCD_DISP_ON_CURS_OFF, chLcdBase);
delay_lcd_long() ;
writeb(LCD_DISP_CLEAR, chLcdBase);
delay_lcd_long() ;
/* set it to row-0, column-0 */
writeb(LCD_DDRAM_ADR_SET_0, chLcdBase);
delay_lcd_long() ;
return 0;
}
int idtprintf(const char *fmt, ...)
{
va_list args;
u8* chLcdData = (u8*)KSEG1ADDR((LCD_BASE+1));
u8* chLcdBase = (u8*)KSEG1ADDR(LCD_BASE);
char str[LCD_MAX_CHAR_PER_LINE * LCD_MAX_LINES];
int iNumChars, iCharsSent;
va_start(args, fmt);
vsprintf(str, fmt, args);
va_end(args);
iNumChars = strlen(str);
/* Can't have more characters than what will fit on the display */
if (iNumChars > (LCD_MAX_CHAR_PER_LINE * LCD_MAX_LINES))
iNumChars = (LCD_MAX_CHAR_PER_LINE * LCD_MAX_LINES) ;
/* first blank out the whole display */
writeb(LCD_DISP_CLEAR, chLcdBase);
delay_lcd_long() ;
/* set it to row-0, column-0 */
writeb(LCD_DDRAM_ADR_SET_0, chLcdBase);
delay_lcd_long() ;
/* Now display characters one by one*/
for(iCharsSent = 0 ; iCharsSent < iNumChars ; iCharsSent++) {
if (iCharsSent == LCD_MAX_CHAR_PER_LINE) {
/* move over to the next line */
writeb(LCD_DDRAM_ADR_SET_1, chLcdBase);
delay_lcd_long() ;
}
writeb(str[iCharsSent], chLcdData);
delay_lcd_short() ;
}
return iNumChars;
}
--- NEW FILE: rtc-ds1501.c ---
/*
* BRIEF MODULE DESCRIPTION
* DS1501 (Dallas Semiconductor) Real Time Clock Support
*
* Copyright 2002 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* st...@mv... or so...@mv...
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/types.h>
#include <linux/time.h>
#include <asm/time.h>
#include <asm/addrspace.h>
#include <asm/debug.h>
#include <asm/rc32300/rc32300.h>
#undef BCD_TO_BIN
#define BCD_TO_BIN(val) (((val)&15) + ((val)>>4)*10)
#undef BIN_TO_BCD
#define BIN_TO_BCD(val) ((((val)/10)<<4) + (val)%10)
#define EPOCH 2000
static unsigned long
rtc_ds1501_get_time(void)
{
u32 century, year, month, day, hour, minute, second;
/* read time data */
writeb(readb(&rtc->control_b) & TDC_DIS_BUFF, &rtc->control_b);
century = BCD_TO_BIN(readb(&rtc->century));
year = BCD_TO_BIN(readb(&rtc->year)) + (century * 100);
month = BCD_TO_BIN(readb(&rtc->month) & 0x1f);
day = BCD_TO_BIN(readb(&rtc->date));
hour = BCD_TO_BIN(readb(&rtc->hours) & 0x3f); /* 24 hour format */
minute = BCD_TO_BIN(readb(&rtc->mins));
second = BCD_TO_BIN(readb(&rtc->secs));
writeb(readb(&rtc->control_b) | TDC_ENA_BUFF, &rtc->control_b);
return mktime(year, month, day, hour, minute, second);
}
static int
rtc_ds1501_set_time(unsigned long t)
{
struct rtc_time tm;
u8 temp, ctrl;
u8 year, month, day, hour, minute, second;
/* freeze external registers */
ctrl = readb(&rtc->control_b);
writeb(ctrl & TDC_DIS_BUFF, &rtc->control_b);
/* convert */
to_tm(t, &tm);
/* check each field one by one */
writeb(BIN_TO_BCD(EPOCH/100), &rtc->century);
year = BIN_TO_BCD(tm.tm_year - EPOCH);
if (year != readb(&rtc->year))
writeb(year, &rtc->year);
temp = readb(&rtc->month);
month = BIN_TO_BCD(tm.tm_mon + 1); /* tm_mon starts from 0 to 11 */
if (month != (temp & 0x1f))
writeb((month & 0x1f) | (temp & ~0x1f), &rtc->month);
day = BIN_TO_BCD(tm.tm_mday);
if (day != readb(&rtc->date))
writeb(day, &rtc->date);
hour = BIN_TO_BCD(tm.tm_hour) & 0x3f; /* 24 hour format */
if (hour != readb(&rtc->hours))
writeb(hour, &rtc->hours);
minute = BIN_TO_BCD(tm.tm_min);
if (minute != readb(&rtc->mins))
writeb(minute, &rtc->mins);
second = BIN_TO_BCD(tm.tm_sec);
if (second != readb(&rtc->secs))
writeb(second, &rtc->secs);
writeb(ctrl | TDC_ENA_BUFF, &rtc->control_b);
return 0;
}
void
rtc_ds1501_init(void)
{
u8 stop;
writeb(readb(&rtc->control_b) & TDC_DIS_BUFF, &rtc->control_b);
stop = readb(&rtc->month);
writeb(readb(&rtc->control_b) | TDC_ENA_BUFF, &rtc->control_b);
if (stop & TDS_STOP) {
/* start clock */
writeb(readb(&rtc->control_b) & TDC_DIS_BUFF, &rtc->control_b);
writeb(stop | TDS_STOP, &rtc->month);
writeb(readb(&rtc->control_b) | TDC_ENA_BUFF, &rtc->control_b);
/* wait 2s till oscillator stabilizes */
mdelay(2000);
}
/* set the function pointers */
rtc_get_time = rtc_ds1501_get_time;
rtc_set_time = rtc_ds1501_set_time;
}
--- NEW FILE: setup.c ---
/*
* BRIEF MODULE DESCRIPTION
* IDT 79EB355 board setup.
*
* Copyright 2002 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* st...@mv... or so...@mv...
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/irq.h>
#include <linux/ioport.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/pgtable.h>
#include <asm/reboot.h>
#include <asm/rc32300/rc32300.h>
extern void (*board_time_init)(void);
extern void (*board_timer_setup)(struct irqaction *irq);
extern void rc32300_time_init(void);
extern void rc32300_timer_setup(struct irqaction *irq);
extern char * __init prom_getcmdline(void);
extern void rc32300_restart(char *);
extern void rc32300_halt(void);
extern void rc32300_power_off(void);
extern int init_lcd(void);
#ifdef CONFIG_BLK_DEV_INITRD
extern unsigned long initrd_start, initrd_end;
extern void * __rd_start, * __rd_end;
#endif
#if 0
static void dump_dev(int devnum)
{
printk("DEV%d_BASE = %08x\n", devnum,
rc32300_readl(DEV0_BASE + devnum*DEV_REG_OFFSET));
printk("DEV%d_MASK = %08x\n", devnum,
rc32300_readl(DEV0_MASK + devnum*DEV_REG_OFFSET));
printk("DEV%d_CNTL = %08x\n", devnum,
rc32300_readl(DEV0_CNTL + devnum*DEV_REG_OFFSET));
printk("DEV%d_TIMING = %08x\n", devnum,
rc32300_readl(DEV0_TIMING + devnum*DEV_REG_OFFSET));
}
#endif
void __init idt_setup(void)
{
char* argptr;
argptr = prom_getcmdline();
#ifdef CONFIG_SERIAL_CONSOLE
if ((argptr = strstr(argptr, "console=")) == NULL) {
argptr = prom_getcmdline();
strcat(argptr, " console=ttyS0,9600");
}
#endif
board_time_init = rc32300_time_init;
board_timer_setup = rc32300_timer_setup;
_machine_restart = rc32300_restart;
_machine_halt = rc32300_halt;
_machine_power_off = rc32300_power_off;
set_io_port_base(KSEG1);
// clear out any wired entries
write_32bit_cp0_register(CP0_WIRED, 0);
/*
* Setup Device 3. The EPLD (U13) splits device 3 chip-select
* into seperate chip selects for the TDM, LCD, and RTC
* devices.
*/
rc32300_writel(0x00000000, DEV0_MASK + 3*DEV_REG_OFFSET);
rc32300_writel(TDM_BASE, DEV0_BASE + 3*DEV_REG_OFFSET);
/* timings are from IDT/sim source */
rc32300_writel(0x0FFFFF84, DEV0_CNTL + 3*DEV_REG_OFFSET);
rc32300_writel(0x00001FFF, DEV0_TIMING + 3*DEV_REG_OFFSET);
rc32300_writel(0xFFFF0000, DEV0_MASK + 3*DEV_REG_OFFSET);
/* initialize the LCD panel */
init_lcd();
idtprintf("IDT 79EB355 Eval MVL 2.1");
#ifdef CONFIG_MTD
/*
* Setup device 2 for flash devices. Set for
* 32-bit databus size, write-enable.
*/
rc32300_writel(0x00000000, DEV0_MASK + 2*DEV_REG_OFFSET);
rc32300_writel(FLASH_BASE, DEV0_BASE + 2*DEV_REG_OFFSET);
/* timings are from IDT/sim source */
rc32300_writel(0x03CF3316, DEV0_CNTL + 2*DEV_REG_OFFSET);
rc32300_writel(0x00001133, DEV0_TIMING + 2*DEV_REG_OFFSET);
rc32300_writel(0xFF800000, DEV0_MASK + 2*DEV_REG_OFFSET);
#endif
#ifdef CONFIG_BLK_DEV_INITRD
ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
initrd_start = (unsigned long)&__rd_start;
initrd_end = (unsigned long)&__rd_end;
#endif
}
|
|
From: Steve L. <slo...@us...> - 2002-04-29 23:04:16
|
Update of /cvsroot/linux-mips/linux/arch/mips/rc32300/79EB355 In directory usw-pr-cvs1:/tmp/cvs-serv16107/79EB355 Log Message: Directory /cvsroot/linux-mips/linux/arch/mips/rc32300/79EB355 added to the repository |
|
From: Steve L. <slo...@us...> - 2002-04-29 21:30:55
|
Update of /cvsroot/linux-mips/linux/arch/mips/math-emu
In directory usw-pr-cvs1:/tmp/cvs-serv20216
Modified Files:
cp1emu.c
Log Message:
cp1emu.c was missed during the sync to OSS 2.4.18.
Index: cp1emu.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/math-emu/cp1emu.c,v
retrieving revision 1.11
retrieving revision 1.12
diff -u -d -r1.11 -r1.12
--- cp1emu.c 24 Apr 2002 17:31:59 -0000 1.11
+++ cp1emu.c 29 Apr 2002 21:30:50 -0000 1.12
@@ -67,7 +67,7 @@
/* Function which emulates the instruction in a branch delay slot. */
-static int mips_dsemul(struct pt_regs *, mips_instruction, vaddr_t);
+static int mips_dsemul(struct pt_regs *, mips_instruction, unsigned long);
/* Function which emulates a floating point instruction. */
@@ -244,7 +244,7 @@
#ifndef SINGLE_ONLY_FPU
case ldc1_op:
{
- u32 *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)]) +
+ u64 *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)]) +
MIPSInst_SIMM(ir);
int ft = MIPSInst_RT(ir);
@@ -311,8 +311,8 @@
case swc1_op:
{
- fpureg_t *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)]) +
- MIPSInst_SIMM(ir);
+ u32 *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)]) +
+ MIPSInst_SIMM(ir);
unsigned int val;
int ft = MIPSInst_RT(ir);
@@ -341,8 +341,8 @@
#else /* old 32-bit fpu registers */
case lwc1_op:
{
- fpureg_t *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)]) +
- MIPSInst_SIMM(ir);
+ u32 *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)]) +
+ MIPSInst_SIMM(ir);
err = get_user(ctx->regs[MIPSInst_RT(ir)], va);
fpuemuprivate.stats.loads++;
@@ -366,17 +366,17 @@
break;
case ldc1_op:
{
- void *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)])
+ u32 *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)])
+ MIPSInst_SIMM(ir);
unsigned int rt = MIPSInst_RT(ir) & ~1;
int errs = 0;
fpuemuprivate.stats.loads++;
#if (defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN) || defined(__MIPSEB__)
err = get_user(ctx->regs[rt + 1], va + 0);
- err |= get_user(ctx->regs[rt + 0], va + 4);
+ err |= get_user(ctx->regs[rt + 0], va + 1);
#else
err = get_user(ctx->regs[rt + 0], va + 0);
- err |= get_user(ctx->regs[rt + 1], va + 4);
+ err |= get_user(ctx->regs[rt + 1], va + 1);
#endif
if (err)
return SIGBUS;
@@ -392,11 +392,11 @@
fpuemuprivate.stats.stores++;
#if (defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN) || defined(__MIPSEB__)
if (put_user(ctx->regs[rt + 1], va + 0)
- || put_user(ctx->regs[rt + 0], va + 4))
+ || put_user(ctx->regs[rt + 0], va + 1))
return SIGBUS;
#else
if (put_user(ctx->regs[rt + 0], va + 0)
- || put_user(ctx->regs[rt + 1], va + 4))
+ || put_user(ctx->regs[rt + 1], va + 1))
return SIGBUS;
#endif
}
@@ -713,38 +713,48 @@
*/
/* Instruction inserted following delay slot instruction to force trap */
-#define AdELOAD 0x8c000001 /* lw $0,1($0) */
+#define AdELOAD 0x8c000001 /* lw $0,1($0) */
/* Instruction inserted following the AdELOAD to further tag the sequence */
-#define BD_COOKIE 0x0000bd36 /* tne $0,$0 with baggage */
+#define BD_COOKIE 0x0000bd36 /* tne $0,$0 with baggage */
+
+struct emuframe {
+ mips_instruction emul;
+ mips_instruction adel;
+ mips_instruction cookie;
+ unsigned long epc;
+};
int do_dsemulret(struct pt_regs *xcp)
{
- mips_instruction *pinst;
- unsigned long stackitem;
+ struct emuframe *fr;
+ unsigned long epc;
+ u32 insn, cookie;
int err = 0;
- /* See if this trap was deliberate. First check the instruction */
-
- pinst = (mips_instruction *) REG_TO_VA(xcp->cp0_epc);
+ fr = (struct emuframe *) (xcp->cp0_epc - sizeof(mips_instruction));
/*
* If we can't even access the area, something is very wrong, but we'll
* leave that to the default handling
*/
- if (verify_area(VERIFY_READ, pinst, sizeof(unsigned long) * 3))
+ if (verify_area(VERIFY_READ, fr, sizeof(struct emuframe)))
return 0;
- /* Is the instruction pointed to by the EPC an AdELOAD? */
- err = get_user(stackitem, pinst);
- if (err || (stackitem != AdELOAD))
- return 0;
+ /*
+ * Do some sanity checking on the stackframe:
+ *
+ * - Is the instruction pointed to by the EPC an AdELOAD?
+ * - Is the following memory word the BD_COOKIE?
+ */
+ err = __get_user(insn, &fr->adel);
+ err |= __get_user(cookie, &fr->cookie);
- /* Is the following memory word the BD_COOKIE? */
+ if (unlikely(err || (insn != AdELOAD) || (cookie != BD_COOKIE))) {
+ fpuemuprivate.stats.errors++;
- err = get_user(stackitem, pinst + 1);
- if (err || (stackitem != BD_COOKIE))
return 0;
+ }
/*
* At this point, we are satisfied that it's a BD emulation trap. Yes,
@@ -759,40 +769,37 @@
#ifdef DSEMUL_TRACE
printk("desemulret\n");
#endif
- /* Fetch the Saved EPC to Resume */
-
- err = get_user(stackitem, pinst + 2);
- if (err) {
+ if (__get_user(epc, &fr->epc)) { /* Saved EPC */
/* This is not a good situation to be in */
- fpuemuprivate.stats.errors++;
force_sig(SIGBUS, current);
+
return 1;
}
/* Set EPC to return to post-branch instruction */
- xcp->cp0_epc = stackitem;
+ xcp->cp0_epc = epc;
return 1;
}
-
-#define AdELOAD 0x8c000001 /* lw $0,1($0) */
-
-static int mips_dsemul(struct pt_regs *regs, mips_instruction ir, vaddr_t cpc)
+static int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
+ unsigned long cpc)
{
extern asmlinkage void handle_dsemulret(void);
mips_instruction *dsemul_insns;
+ struct emuframe *fr;
int err;
if (ir == 0) { /* a nop is easy */
- regs->cp0_epc = VA_TO_REG(cpc);
+ regs->cp0_epc = cpc;
regs->cp0_cause &= ~CAUSEF_BD;
return 0;
}
#ifdef DSEMUL_TRACE
- printk("desemul %p %p\n", REG_TO_VA(regs->cp0_epc), cpc);
-#endif
+ printk("desemul %lx %lx\n", regs->cp0_epc, cpc);
+#endif
+
/*
* The strategy is to push the instruction onto the user stack
* and put a trap after it which we can catch and jump to
@@ -810,16 +817,17 @@
/* Ensure that the two instructions are in the same cache line */
dsemul_insns = (mips_instruction *) (regs->regs[29] & ~0xf);
dsemul_insns -= 4; /* Retain 16-byte alignment */
+ fr = (struct emuframe *) dsemul_insns;
/* Verify that the stack pointer is not competely insane */
- if (unlikely(verify_area(VERIFY_WRITE, dsemul_insns,
- sizeof(mips_instruction) * 4)))
+ if (unlikely(verify_area(VERIFY_WRITE, fr, sizeof(struct emuframe))))
return SIGBUS;
err = __put_user(ir, &dsemul_insns[0]);
- err |= __put_user((mips_instruction)AdELOAD, &dsemul_insns[1]);
- err |= __put_user((mips_instruction)BD_COOKIE, &dsemul_insns[2]);
- err |= __put_user((mips_instruction)cpc, &dsemul_insns[3]);
+ err |= __put_user((mips_instruction)AdELOAD, &fr->adel);
+ err |= __put_user((mips_instruction)BD_COOKIE, &fr->epc);
+ err |= __put_user(cpc, &fr->epc);
+
if (unlikely(err)) {
fpuemuprivate.stats.errors++;
return SIGBUS;
@@ -827,7 +835,8 @@
regs->cp0_epc = VA_TO_REG & dsemul_insns[0];
- flush_cache_sigtramp((unsigned long)dsemul_insns);
+ flush_cache_sigtramp((unsigned long)&fr->adel);
+
return SIGILL; /* force out of emulation loop */
}
@@ -938,21 +947,18 @@
switch (MIPSInst_FUNC(ir)) {
case lwxc1_op:
{
- void *va = REG_TO_VA(
+ u32 *va = REG_TO_VA(
xcp->regs[MIPSInst_FR(ir)] +
xcp->regs[MIPSInst_FT(ir)]);
fpureg_t val;
- int err = 0;
- err = get_user(val, (fpureg_t *)va);
- if (err) {
+ if (get_user(val, va)) {
fpuemuprivate.stats.errors++;
return SIGBUS;
}
if (xcp->cp0_status & ST0_FR) {
/* load whole register */
- ctx->
- regs[MIPSInst_FD(ir)] =
+ ctx->regs[MIPSInst_FD(ir)] =
val;
} else if (MIPSInst_FD(ir) & 1) {
/* load to m.s. 32 bits */
@@ -1076,29 +1082,28 @@
switch (MIPSInst_FUNC(ir)) {
case ldxc1_op:
{
- void *va = REG_TO_VA(
+ u64 *va = REG_TO_VA(
xcp->regs[MIPSInst_FR(ir)] +
xcp->regs[MIPSInst_FT(ir)]);
- int err;
+ u64 val;
- err=get_user(ctx->regs[MIPSInst_FD(ir)],
- (unsigned int *)va);
- if (err) {
- fpuemuprivate.stats.
- errors++;
+ if (get_user(val, va)) {
+ fpuemuprivate.stats.errors++;
return SIGBUS;
}
+ ctx->regs[MIPSInst_FD(ir)] = val;
}
break;
case sdxc1_op:
{
- void *va = REG_TO_VA(
+ u64 *va = REG_TO_VA(
xcp->regs[MIPSInst_FR(ir)] +
xcp->regs[MIPSInst_FT(ir)]);
+ u64 val;
- if (put_user(ctx->regs[MIPSInst_FS(ir)],
- (unsigned int *)va)) {
+ val = ctx->regs[MIPSInst_FS(ir)];
+ if (put_user(val, va)) {
fpuemuprivate.stats.errors++;
return SIGBUS;
}
@@ -1636,7 +1641,7 @@
{
struct mips_fpu_soft_struct *ctx = ¤t->thread.fpu.soft;
unsigned long oldepc, prevepc;
- unsigned int insn;
+ mips_instruction insn;
int sig = 0;
int err = 0;
@@ -1646,7 +1651,7 @@
schedule();
prevepc = xcp->cp0_epc;
- err = get_user(insn, (unsigned int *) xcp->cp0_epc);
+ err = get_user(insn, (mips_instruction *) xcp->cp0_epc);
if (err) {
fpuemuprivate.stats.errors++;
return SIGBUS;
|
|
From: Pete P. <pp...@us...> - 2002-04-29 16:43:28
|
Update of /cvsroot/linux-mips/linux/drivers/net In directory usw-pr-cvs1:/tmp/cvs-serv10863/drivers/net Modified Files: au1000_eth.c Log Message: wake_queue after a tx timeout. Index: au1000_eth.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/net/au1000_eth.c,v retrieving revision 1.9 retrieving revision 1.10 diff -u -d -r1.9 -r1.10 --- au1000_eth.c 2 Apr 2002 22:59:39 -0000 1.9 +++ au1000_eth.c 29 Apr 2002 16:43:23 -0000 1.10 @@ -1249,6 +1249,8 @@ printk(KERN_ERR "%s: au1000_tx_timeout: dev=%p\n", dev->name, dev); reset_mac(dev); au1000_init(dev); + dev->trans_start = jiffies; + netif_wake_queue(dev); } |
|
From: Pete P. <pp...@us...> - 2002-04-26 18:51:44
|
Update of /cvsroot/linux-mips/linux/arch/mips/au1000/pb1500 In directory usw-pr-cvs1:/tmp/cvs-serv23175/arch/mips/au1000/pb1500 Modified Files: setup.c Log Message: BE pci bus support. Index: setup.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/pb1500/setup.c,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- setup.c 25 Mar 2002 22:58:15 -0000 1.5 +++ setup.c 26 Apr 2002 18:51:39 -0000 1.6 @@ -230,7 +230,11 @@ // Setup PCI bus controller writel(0, Au1500_PCI_CMEM); writel(0x00003fff, Au1500_CFG_BASE); +#if defined(__MIPSEB__) + writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG); +#else writel(0xf, Au1500_PCI_CFG); +#endif writel(0xf0000000, Au1500_PCI_MWMASK_DEV); writel(0, Au1500_PCI_MWBASE_REV_CCL); writel(0x02a00356, Au1500_PCI_STATCMD); |
|
From: Steve L. <slo...@us...> - 2002-04-25 22:16:55
|
Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv10804
Modified Files:
tlb-r4k.c
Log Message:
RC32300 support was trampled in the sync to OSS at rev 1.10.
Index: tlb-r4k.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/tlb-r4k.c,v
retrieving revision 1.11
retrieving revision 1.12
diff -u -d -r1.11 -r1.12
--- tlb-r4k.c 9 Mar 2002 01:36:19 -0000 1.11
+++ tlb-r4k.c 25 Apr 2002 22:16:50 -0000 1.12
@@ -344,13 +344,21 @@
unsigned int prid, config1;
prid = read_32bit_cp0_register(CP0_PRID) & 0xff00;
- if (prid == PRID_IMP_RM7000 || !(config & (1 << 31)))
+ switch (prid) {
+ case PRID_IMP_RM7000:
+ case PRID_IMP_RC32334:
+ case PRID_IMP_RC32355:
/*
- * Not a MIPS32 complianant CPU. Config 1 register not
+ * Not a MIPS32 compliant CPU. Config 1 register not
* supported, we assume R4k style. Cpu probing already figured
* out the number of tlb entries.
*/
return;
+ default:
+ /* config1 register available? */
+ if (!(config & (1 << 31)))
+ return;
+ }
config1 = read_mips32_cp0_config1();
if (!((config >> 7) & 3))
|
|
From: James S. <jsi...@us...> - 2002-04-24 17:40:47
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv18756/asm-mips Added Files: elf.h Log Message: Accept binaries with ISA level flags in the e_flags field of the ELF header. We used to not accept these because they were only set in IRIX binaries. |
|
From: James S. <jsi...@us...> - 2002-04-24 17:38:23
|
Update of /cvsroot/linux-mips/linux/drivers/char
In directory usw-pr-cvs1:/tmp/cvs-serv18058a
Modified Files:
sb1250_duart.c
Log Message:
Fix about a dozen bugs in the serial driver ...
Index: sb1250_duart.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/char/sb1250_duart.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- sb1250_duart.c 28 Jan 2002 20:48:47 -0000 1.4
+++ sb1250_duart.c 24 Apr 2002 17:38:19 -0000 1.5
@@ -24,8 +24,8 @@
*
* The non-console part of this code is based heavily on the serial_21285.c
* driver also in this directory. See tty_driver.h for a description of some
- * of the driver functions, though it (like most of the inline code documentation :)
- * is a bit out of date.
+ * of the driver functions, though it (like most of the inline code
+ * documentation :) is a bit out of date.
*/
#include <linux/types.h>
@@ -59,28 +59,23 @@
/*
- Still not sure what the termios structures set up here are for,
- but we have to supply pointers to them to register the tty driver
-*/
-
+ * Still not sure what the termios structures set up here are for,
+ * but we have to supply pointers to them to register the tty driver
+ */
static struct tty_driver sb1250_duart_driver, sb1250_duart_callout_driver;
static int ref_count;
static struct tty_struct *duart_table[2];
static struct termios *duart_termios[2];
static struct termios *duart_termios_locked[2];
-/* This lock protects both the open flags for all the uart states as
- well as the reference count for the module */
+/*
+ * This lock protects both the open flags for all the uart states as
+ * well as the reference count for the module
+ */
static spinlock_t open_lock = SPIN_LOCK_UNLOCKED;
-/* Protect the writing stuff from contention */
-//static spinlock_t console_lock = SPIN_LOCK_UNLOCKED;
-
/* Bit fields of flags in the flags field below */
-#define SD_WRITE_WAKE 0x000000001
-
-
typedef struct {
struct tty_struct *tty;
unsigned char outp_buf[CONFIG_SB1250_DUART_OUTPUT_BUF_SIZE];
@@ -159,23 +154,26 @@
static void duart_int(int irq, void *dev_id, struct pt_regs *regs)
{
- unsigned int line;
uart_state_t *us = (uart_state_t *)dev_id;
- line = us-uart_states;
+ unsigned int line = us - uart_states;
+ struct tty_struct *tty = us->tty;
+
#ifdef DUART_SPEW
-// setleds("INT!");
- printk("DUART INT\n");
+ printk("DUART INT\n");
#endif
- /* We could query the ISR to figure out why we are here, but since
- we are here, we may as well just take care of both rx and tx */
+ /*
+ * We could query the ISR to figure out why we are here, but since
+ * we are here, we may as well just take care of both rx and tx
+ */
spin_lock(&us->outp_lock);
if (get_status_reg(line) & M_DUART_RX_RDY) {
do {
unsigned int status = get_status_reg(line);
- unsigned int ch = in64(IO_SPACE_BASE | A_DUART_CHANREG(line, R_DUART_RX_HOLD));
+ unsigned int ch = in64(IO_SPACE_BASE |
+ A_DUART_CHANREG(line, R_DUART_RX_HOLD));
unsigned int flag = 0;
- if (status & 0x10) {
- tty_insert_flip_char(us->tty, 0, TTY_OVERRUN); }
+ if (status & 0x10)
+ tty_insert_flip_char(tty, 0, TTY_OVERRUN);
if (status & 0x20) {
printk("Parity error!\n");
flag = TTY_PARITY;
@@ -183,26 +181,32 @@
printk("Frame error!\n");
flag = TTY_FRAME;
}
- tty_insert_flip_char(us->tty, ch, flag);
+ tty_insert_flip_char(tty, ch, flag);
} while (get_status_reg(line) & M_DUART_RX_RDY);
- tty_flip_buffer_push(us->tty);
+ tty_flip_buffer_push(tty);
}
if ((get_status_reg(line) & M_DUART_TX_RDY) && us->outp_count) {
do {
out64(us->outp_buf[us->outp_head], IO_SPACE_BASE | A_DUART_CHANREG(line, R_DUART_TX_HOLD));
us->outp_head = (us->outp_head + 1) & (CONFIG_SB1250_DUART_OUTPUT_BUF_SIZE-1);
us->outp_count--;
- } while ((get_status_reg(line) & M_DUART_TX_RDY) && us->outp_count);
+ } while ((get_status_reg(line) & M_DUART_TX_RDY) &&
+ us->outp_count);
- if (us->open && (us->flags & SD_WRITE_WAKE) &&
+ if (us->open &&
(us->outp_count < (CONFIG_SB1250_DUART_OUTPUT_BUF_SIZE/2))) {
- /* We told the discipline at one point that we had no space, so it went
- to sleep. Wake it up when we hit half empty */
- wake_up_interruptible(&us->tty->write_wait);
+ /*
+ * We told the discipline at one point that we had no
+ * space, so it went to sleep. Wake it up when we hit
+ * half empty
+ */
+ if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
+ tty->ldisc.write_wakeup)
+ tty->ldisc.write_wakeup(tty);
+ wake_up_interruptible(&tty->write_wait);
}
- if (!us->outp_count) {
+ if (!us->outp_count)
duart_mask_ints(line, M_DUART_IMR_TX);
- }
}
spin_unlock(&us->outp_lock);
}
@@ -214,19 +218,15 @@
/* Return the number of characters we can accomodate in a write at this instant */
static int duart_write_room(struct tty_struct *tty)
{
- unsigned long flags;
+ uart_state_t *us = (uart_state_t *) tty->driver_data;
int retval;
- uart_state_t *us = &uart_states[get_line(tty)];
- spin_lock_irqsave(&us->outp_lock, flags);
- retval = CONFIG_SB1250_DUART_OUTPUT_BUF_SIZE - uart_states[get_line(tty)].outp_count;
- if (!retval) {
- us->flags |= SD_WRITE_WAKE;
- }
- spin_unlock_irqrestore(&us->outp_lock, flags);
+ retval = CONFIG_SB1250_DUART_OUTPUT_BUF_SIZE - us->outp_count;
+
#ifdef DUART_SPEW
printk("duart_write_room called, returning %i\n", retval);
#endif
+
return retval;
}
@@ -242,25 +242,27 @@
return size;
}
-/* Buffer up to count characters from buf to be written. If we don't have other
- characters buffered, enable the tx interrupt to start sending */
+/*
+ * Buffer up to count characters from buf to be written. If we don't have
+ * other characters buffered, enable the tx interrupt to start sending
+ */
static int duart_write(struct tty_struct * tty, int from_user,
const unsigned char *buf, int count)
{
- uart_state_t *us;
- unsigned long flags;
- unsigned int line;
+ uart_state_t *us = (uart_state_t *) tty->driver_data;
+ unsigned int line = get_line(tty);
int chars_written = 0;
+ unsigned long flags;
+
if (from_user && verify_area(VERIFY_READ, buf, count)) {
return -EINVAL;
}
#ifdef DUART_SPEW
printk("duart_write called for %i chars by %i (%s)\n", count, current->pid, current->comm);
#endif
- line = get_line(tty);
- us = &uart_states[line];
spin_lock_irqsave(&us->outp_lock, flags);
- if (!count || (us->outp_count == CONFIG_SB1250_DUART_OUTPUT_BUF_SIZE)) {
+ if (!count ||
+ (us->outp_count == CONFIG_SB1250_DUART_OUTPUT_BUF_SIZE)) {
spin_unlock_irqrestore(&us->outp_lock, flags);
return 0;
}
@@ -285,17 +287,19 @@
}
us->outp_count += chars_written;
spin_unlock_irqrestore(&us->outp_lock, flags);
+
return chars_written;
-}
+}
/* Buffer one character to be written. If there's not room for it, just drop
it on the floor. This is used for echo, among other things */
static void duart_put_char(struct tty_struct *tty, u_char ch)
{
- unsigned long flags;
+ uart_state_t *us = (uart_state_t *) tty->driver_data;
unsigned int line = get_line(tty);
- uart_state_t *us = &uart_states[line];
+ unsigned long flags;
+
#ifdef DUART_SPEW
printk("duart_put_char called. Char is %x (%c)\n", (int)ch, ch);
#endif
@@ -315,15 +319,11 @@
written */
static int duart_chars_in_buffer(struct tty_struct *tty)
{
+ uart_state_t *us = (uart_state_t *) tty->driver_data;
int retval;
- unsigned long flags;
- uart_state_t *us = &uart_states[get_line(tty)];
- spin_lock_irqsave(&us->outp_lock, flags);
+
retval = us->outp_count;
- if (retval) {
- us->flags |= SD_WRITE_WAKE;
- }
- spin_unlock_irqrestore(&us->outp_lock, flags);
+
#ifdef DUART_SPEW
printk("duart_chars_in_buffer returning %i\n", retval);
#endif
@@ -334,19 +334,23 @@
transmit interrupt since we've nothing more to transmit */
static void duart_flush_buffer(struct tty_struct *tty)
{
- unsigned long flags;
+ uart_state_t *us = (uart_state_t *) tty->driver_data;
unsigned int line = get_line(tty);
- uart_state_t *us = &uart_states[get_line(tty)];
+ unsigned long flags;
+
#ifdef DUART_SPEW
printk("duart_flush_buffer called\n");
#endif
duart_mask_ints(line, M_DUART_IMR_TX);
spin_lock_irqsave(&us->outp_lock, flags);
us->outp_head = us->outp_tail = us->outp_count = 0;
- if (us->flags & SD_WRITE_WAKE) {
- wake_up_interruptible(&us->tty->write_wait);
- }
spin_unlock_irqrestore(&us->outp_lock, flags);
+
+ wake_up_interruptible(&us->tty->write_wait);
+
+ if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
+ tty->ldisc.write_wakeup)
+ tty->ldisc.write_wakeup(tty);
}
@@ -355,6 +359,7 @@
{
unsigned int mode_reg1 = 0, mode_reg2 = 0;
unsigned int clk_divisor;
+
switch (cflag & CSIZE) {
case CS7:
mode_reg1 |= V_DUART_BITS_PER_CHAR_7;
@@ -414,9 +419,9 @@
outp_lock to avoid races involving turning the interrupt line on/off */
static void duart_stop(struct tty_struct *tty)
{
+ uart_state_t *us = (uart_state_t *) tty->driver_data;
unsigned long flags;
- unsigned int line = get_line(tty);
- uart_state_t *us = &uart_states[line];
+
#ifdef DUART_SPEW
printk("duart_stop called\n");
#endif
@@ -512,9 +517,9 @@
outp_lock to avoid races involving turning the interrupt line on/off */
static void duart_start(struct tty_struct *tty)
{
+ uart_state_t *us = (uart_state_t *) tty->driver_data;
unsigned long flags;
- unsigned int line = get_line(tty);
- uart_state_t *us = &uart_states[line];
+
#ifdef DUART_SPEW
printk("duart_start called\n");
#endif
@@ -534,17 +539,20 @@
static void duart_wait_until_sent(struct tty_struct *tty, int timeout)
{
- unsigned long target_time;
- unsigned int line;
- uart_state_t *us;
+ unsigned int line = get_line(tty);
+ unsigned long orig_jiffies;
+
+ orig_jiffies = jiffies;
#ifdef DUART_SPEW
printk("duart_wait_until_sent(%d)+\n", timeout);
#endif
- target_time = jiffies + timeout;
- line = get_line(tty);
- us = &uart_states[line];
- while (!(get_status_reg(line) & M_DUART_TX_EMT) && (jiffies < target_time)) {
+ while (!(get_status_reg(line) & M_DUART_TX_EMT)) {
+ set_current_state(TASK_INTERRUPTIBLE);
schedule_timeout(1);
+ if (signal_pending(current))
+ break;
+ if (timeout && time_after(jiffies, orig_jiffies + timeout))
+ break;
}
#ifdef DUART_SPEW
printk("duart_wait_until_sent()-\n");
@@ -552,15 +560,26 @@
}
/*
+ * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
+ */
+static void duart_hangup(struct tty_struct *tty)
+{
+ uart_state_t *info = (uart_state_t *) tty->driver_data;
+
+ //info->tty = 0;
+ //wake_up_interruptible(&info->open_wait);
+}
+
+/*
* Open a tty line. Note that this can be called multiple times, so ->open can
* be >1. Only set up the tty struct if this is a "new" open, e.g. ->open was
* zero
*/
static int duart_open(struct tty_struct *tty, struct file *filp)
{
+ uart_state_t *us = (uart_state_t *) tty->driver_data;
unsigned long flags;
unsigned int line;
- uart_state_t *us;
MOD_INC_USE_COUNT;
#ifndef CONFIG_SIBYTE_SB1250_DUART_NO_PORT_1
@@ -572,14 +591,17 @@
MOD_DEC_USE_COUNT;
return -ENODEV;
}
+
#ifdef DUART_SPEW
- printk("duart_open called by %i (%s), tty is %p, rw is %p, ww is %p\n", current->pid, current->comm, tty,
- tty->read_wait, tty->write_wait);
+ printk("duart_open called by %i (%s), tty is %p, rw is %p, ww is %p\n",
+ current->pid, current->comm, tty, tty->read_wait,
+ tty->write_wait);
#endif
+
line = get_line(tty);
- tty->driver_data = NULL;
- us = &uart_states[line];
-
+ us = uart_states + line;
+ tty->driver_data = us;
+
spin_lock_irqsave(&open_lock, flags);
if (!us->open) {
us->tty = tty;
@@ -599,6 +621,7 @@
#endif
duart_unmask_ints(line, M_DUART_IMR_RX);
spin_unlock_irqrestore(&open_lock, flags);
+
return 0;
}
@@ -610,20 +633,28 @@
*/
static void duart_close(struct tty_struct *tty, struct file *filp)
{
+ uart_state_t *us = (uart_state_t *) tty->driver_data;
unsigned long flags;
- unsigned int line = get_line(tty);
- uart_state_t *us = &uart_states[line];
+
#ifdef DUART_SPEW
printk("duart_close called by %i (%s)\n", current->pid, current->comm);
#endif
+
+ if (!us->open)
+ return;
+
spin_lock_irqsave(&open_lock, flags);
us->open--;
#if 0
if (!us->open) {
/* Flushing TX stuff here is conservative */
- duart_mask_ints(line, M_DUART_IMR_IN | M_DUART_IMR_BRK | M_DUART_IMR_RX | M_DUART_IMR_TX);
+ duart_mask_ints(line, M_DUART_IMR_IN | M_DUART_IMR_BRK |
+ M_DUART_IMR_RX | M_DUART_IMR_TX);
spin_lock(&us->outp_lock);
- us->outp_head = us->outp_tail = us->outp_count = us->outp_stopped = 0;
+ us->outp_head = 0;
+ us->outp_tail = 0;
+ us->outp_count = 0;
+ us->outp_stopped = 0;
us->tty = NULL;
spin_unlock(&us->outp_lock);
}
@@ -668,6 +699,7 @@
sb1250_duart_driver.set_termios = duart_set_termios;
sb1250_duart_driver.stop = duart_stop;
sb1250_duart_driver.start = duart_start;
+ sb1250_duart_driver.hangup = duart_hangup;
sb1250_duart_driver.wait_until_sent = duart_wait_until_sent;
sb1250_duart_callout_driver = sb1250_duart_driver;
@@ -749,10 +781,10 @@
static void ser_console_write(struct console *cons, const char *str,
unsigned int count)
{
- unsigned int i;
unsigned long flags;
- spin_lock_irqsave(&uart_states[0].outp_lock, flags);
+ unsigned int i;
+ spin_lock_irqsave(&uart_states[0].outp_lock, flags);
for (i = 0; i < count; i++) {
if (str[i] == '\n') {
/* Expand LF -> CRLF */
@@ -782,7 +814,7 @@
static int ser_console_setup(struct console *cons, char *str)
{
/* Initialize the transmitter */
-
+
duart_set_cflag(0, DEFAULT_CFLAGS);
return 0;
}
|
|
From: James S. <jsi...@us...> - 2002-04-24 17:35:24
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv17256 Modified Files: unaligned.c Log Message: Reformat. Index: unaligned.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/unaligned.c,v retrieving revision 1.7 retrieving revision 1.8 diff -u -d -r1.7 -r1.8 --- unaligned.c 2 Jan 2002 19:18:13 -0000 1.7 +++ unaligned.c 24 Apr 2002 17:35:22 -0000 1.8 @@ -375,7 +375,8 @@ * in the delay slot of an emulated branch. */ /* Terminate if exception was recognized as a delay slot return */ - if(do_dsemulret(regs)) return; + if (do_dsemulret(regs)) + return; /* Otherwise handle as normal */ |
|
From: James S. <jsi...@us...> - 2002-04-24 17:34:16
|
Update of /cvsroot/linux-mips/linux/arch/mips64/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv16961
Modified Files:
traps.c unaligned.c
Log Message:
FPU emulator for the 64-bit kernel.
Index: traps.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/traps.c,v
retrieving revision 1.15
retrieving revision 1.16
diff -u -d -r1.15 -r1.16
--- traps.c 21 Apr 2002 20:01:14 -0000 1.15
+++ traps.c 24 Apr 2002 17:34:12 -0000 1.16
@@ -49,6 +49,9 @@
extern asmlinkage void handle_mcheck(void);
extern asmlinkage void handle_reserved(void);
+extern int fpu_emulator_cop1Handler(struct pt_regs *);
+void fpu_emulator_init_fpu(void);
+
char watch_available = 0;
char dedicated_iv_available = 0;
@@ -471,11 +474,15 @@
void do_cpu(struct pt_regs *regs)
{
u32 cpid;
+ int sig;
cpid = (regs->cp0_cause >> CAUSEB_CE) & 3;
if (cpid != 1)
goto bad_cid;
+ if (!(mips_cpu.options & MIPS_CPU_FPU))
+ goto fp_emul;
+
regs->cp0_status |= ST0_CU1;
#ifdef CONFIG_SMP
@@ -499,6 +506,16 @@
}
last_task_used_math = current;
#endif
+ return;
+
+fp_emul:
+ if (!current->used_math) {
+ fpu_emulator_init_fpu();
+ current->used_math = 1;
+ }
+ sig = fpu_emulator_cop1Handler(regs);
+ if (sig)
+ force_sig(sig, current);
return;
bad_cid:
Index: unaligned.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/unaligned.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- unaligned.c 26 Feb 2002 17:34:15 -0000 1.5
+++ unaligned.c 24 Apr 2002 17:34:12 -0000 1.6
@@ -381,10 +381,24 @@
asmlinkage void do_ade(struct pt_regs *regs)
{
unsigned long pc;
+ extern int do_dsemulret(struct pt_regs *);
+
#if 0
printk("ade: Cpu%d[%s:%d:%0lx:%0lx]\n", smp_processor_id(),
current->comm, current->pid, regs->cp0_badvaddr, regs->cp0_epc);
#endif
+
+ /*
+ * Address errors may be deliberately induced
+ * by the FPU emulator to take retake control
+ * of the CPU after executing the instruction
+ * in the delay slot of an emulated branch.
+ */
+ /* Terminate if exception was recognized as a delay slot return */
+ if (do_dsemulret(regs))
+ return;
+
+ /* Otherwise handle as normal */
/*
* Did we catch a fault trying to load an instruction?
|
|
From: James S. <jsi...@us...> - 2002-04-24 17:33:07
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv16712/mips/kernel
Modified Files:
smp.c
Log Message:
Fix race in SMP bootup.
Index: smp.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/smp.c,v
retrieving revision 1.16
retrieving revision 1.17
diff -u -d -r1.16 -r1.17
--- smp.c 21 Apr 2002 19:30:07 -0000 1.16
+++ smp.c 24 Apr 2002 17:33:03 -0000 1.17
@@ -101,6 +101,7 @@
printk("Slave cpu booted successfully\n");
CPUMASK_SETB(cpu_online_map, cpu);
atomic_inc(&cpus_booted);
+ while (!atomic_read(&smp_commenced));
cpu_idle();
}
|
|
From: James S. <jsi...@us...> - 2002-04-24 17:32:05
|
Update of /cvsroot/linux-mips/linux/arch/mips/math-emu
In directory usw-pr-cvs1:/tmp/cvs-serv16437
Modified Files:
cp1emu.c
Log Message:
64-bit fixes for FPU emulator.
Index: cp1emu.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/math-emu/cp1emu.c,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -d -r1.10 -r1.11
--- cp1emu.c 2 Jan 2002 19:58:02 -0000 1.10
+++ cp1emu.c 24 Apr 2002 17:31:59 -0000 1.11
@@ -34,6 +34,7 @@
* Note if you know that you won't have an fpu, then you'll get much
* better performance by compiling with -msoft-float!
*/
+#include <linux/compiler.h>
#include <linux/mm.h>
#include <linux/signal.h>
#include <linux/smp.h>
@@ -167,54 +168,6 @@
#define REG_TO_VA (vaddr_t)
#define VA_TO_REG (unsigned long)
-static unsigned long mips_get_word(struct pt_regs *xcp, void *va, int *perr)
-{
- unsigned long temp;
-
- if (!user_mode(xcp)) {
- *perr = 0;
- return *(unsigned long *) va;
- }
-
- *perr = (int) get_user(temp, (unsigned long *) va);
- return temp;
-}
-
-static unsigned long long
-mips_get_dword(struct pt_regs *xcp, void *va, int *perr)
-{
- unsigned long long temp;
-
- if (!user_mode(xcp)) {
- *perr = 0;
- return *(unsigned long long *) va;
- }
-
- *perr = (int) get_user(temp, (unsigned long long *) va);
- return temp;
-}
-
-static int mips_put_word(struct pt_regs *xcp, void *va, unsigned long val)
-{
- if (!user_mode(xcp)) {
- *(unsigned long *) va = val;
- return 0;
- }
-
- return put_user(val, (unsigned long *) va);
-}
-
-static int mips_put_dword(struct pt_regs *xcp, void *va, long long val)
-{
- if (!user_mode(xcp)) {
- *(unsigned long long *) va = val;
- return 0;
- }
-
- return put_user(val, (unsigned long long *) va);
-}
-
-
/*
* In the Linux kernel, we support selection of FPR format on the
* basis of the Status.FR bit. This does imply that, if a full 32
@@ -232,13 +185,12 @@
static int cop1Emulate(struct pt_regs *regs, struct mips_fpu_soft_struct *ctx)
{
+ vaddr_t emulpc, contpc;
mips_instruction ir;
- vaddr_t emulpc;
- vaddr_t contpc;
unsigned int cond;
int err = 0;
- ir = mips_get_word(regs, REG_TO_VA regs->cp0_epc, &err);
+ err = get_user(ir, (mips_instruction *) regs->cp0_epc);
if (err) {
fpuemuprivate.stats.errors++;
return SIGBUS;
@@ -270,7 +222,7 @@
#endif
return SIGILL;
}
- ir = mips_get_word(regs, emulpc, &err);
+ err = get_user(ir, (mips_instruction *) emulpc);
if (err) {
fpuemuprivate.stats.errors++;
return SIGBUS;
@@ -292,12 +244,13 @@
#ifndef SINGLE_ONLY_FPU
case ldc1_op:
{
- void *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)])
- + MIPSInst_SIMM(ir);
+ u32 *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)]) +
+ MIPSInst_SIMM(ir);
int ft = MIPSInst_RT(ir);
+
if (!(regs->cp0_status & ST0_FR))
ft &= ~1;
- ctx->regs[ft] = mips_get_dword(regs, va, &err);
+ err = get_user(ctx->regs[ft], va);
fpuemuprivate.stats.loads++;
if (err) {
fpuemuprivate.stats.errors++;
@@ -308,13 +261,14 @@
case sdc1_op:
{
- void *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)])
- + MIPSInst_SIMM(ir);
+ fpureg_t *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)]) +
+ MIPSInst_SIMM(ir);
int ft = MIPSInst_RT(ir);
+
if (!(regs->cp0_status & ST0_FR))
ft &= ~1;
fpuemuprivate.stats.stores++;
- if (mips_put_dword(regs, va, ctx->regs[ft])) {
+ if (put_user(ctx->regs[ft], va)) {
fpuemuprivate.stats.errors++;
return SIGBUS;
}
@@ -324,19 +278,20 @@
case lwc1_op:
{
- void *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)])
- + MIPSInst_SIMM(ir);
- fpureg_t val;
+ u32 *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)]) +
+ MIPSInst_SIMM(ir);
int ft = MIPSInst_RT(ir);
+ u32 val;
+
fpuemuprivate.stats.loads++;
- val = mips_get_word(regs, va, &err);
+ err = get_user(val, va);
if (err) {
fpuemuprivate.stats.errors++;
return SIGBUS;
}
if (regs->cp0_status & ST0_FR) {
/* load whole register */
- ctx->regs[ft] = val;
+ ctx->regs[ft] = (s64) val;
} else if (ft & 1) {
/* load to m.s. 32 bits */
#ifdef SINGLE_ONLY_FPU
@@ -344,7 +299,7 @@
return SIGILL;
#else
ctx->regs[(ft & ~1)] &= 0xffffffff;
- ctx->regs[(ft & ~1)] |= val << 32;
+ ctx->regs[(ft & ~1)] |= (fpureg_t) val << 32;
#endif
} else {
/* load to l.s. 32 bits */
@@ -356,10 +311,11 @@
case swc1_op:
{
- void *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)])
- + MIPSInst_SIMM(ir);
+ fpureg_t *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)]) +
+ MIPSInst_SIMM(ir);
unsigned int val;
int ft = MIPSInst_RT(ir);
+
fpuemuprivate.stats.stores++;
if (regs->cp0_status & ST0_FR) {
/* store whole register */
@@ -376,7 +332,7 @@
/* store from l.s. 32 bits */
val = ctx->regs[ft];
}
- if (mips_put_word(regs, va, val)) {
+ if (put_user(val, va)) {
fpuemuprivate.stats.errors++;
return SIGBUS;
}
@@ -385,10 +341,10 @@
#else /* old 32-bit fpu registers */
case lwc1_op:
{
- void *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)])
- + MIPSInst_SIMM(ir);
- ctx->regs[MIPSInst_RT(ir)] =
- mips_get_word(regs, va, &err);
+ fpureg_t *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)]) +
+ MIPSInst_SIMM(ir);
+ err = get_user(ctx->regs[MIPSInst_RT(ir)], va);
+
fpuemuprivate.stats.loads++;
if (err) {
fpuemuprivate.stats.errors++;
@@ -399,11 +355,10 @@
case swc1_op:
{
- void *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)])
- + MIPSInst_SIMM(ir);
+ u32 *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)]) +
+ MIPSInst_SIMM(ir);
fpuemuprivate.stats.stores++;
- if (mips_put_word
- (regs, va, ctx->regs[MIPSInst_RT(ir)])) {
+ if (put_user(ctx->regs[MIPSInst_RT(ir)], va)) {
fpuemuprivate.stats.errors++;
return SIGBUS;
}
@@ -417,19 +372,11 @@
int errs = 0;
fpuemuprivate.stats.loads++;
#if (defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN) || defined(__MIPSEB__)
- ctx->regs[rt + 1] =
- mips_get_word(regs, va + 0, &err);
- errs += err;
- ctx->regs[rt + 0] =
- mips_get_word(regs, va + 4, &err);
- errs += err;
+ err = get_user(ctx->regs[rt + 1], va + 0);
+ err |= get_user(ctx->regs[rt + 0], va + 4);
#else
- ctx->regs[rt + 0] =
- mips_get_word(regs, va + 0, &err);
- errs += err;
- ctx->regs[rt + 1] =
- mips_get_word(regs, va + 4, &err);
- errs += err;
+ err = get_user(ctx->regs[rt + 0], va + 0);
+ err |= get_user(ctx->regs[rt + 1], va + 4);
#endif
if (err)
return SIGBUS;
@@ -438,19 +385,18 @@
case sdc1_op:
{
- void *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)])
- + MIPSInst_SIMM(ir);
+ u32 *va = REG_TO_VA(regs->regs[MIPSInst_RS(ir)]) +
+ MIPSInst_SIMM(ir);
unsigned int rt = MIPSInst_RT(ir) & ~1;
+
fpuemuprivate.stats.stores++;
#if (defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN) || defined(__MIPSEB__)
- if (mips_put_word(regs, va + 0, ctx->regs[rt + 1]))
- return SIGBUS;
- if (mips_put_word(regs, va + 4, ctx->regs[rt + 0]))
+ if (put_user(ctx->regs[rt + 1], va + 0)
+ || put_user(ctx->regs[rt + 0], va + 4))
return SIGBUS;
#else
- if (mips_put_word(regs, va + 0, ctx->regs[rt + 0]))
- return SIGBUS;
- if (mips_put_word(regs, va + 4, ctx->regs[rt + 1]))
+ if (put_user(ctx->regs[rt + 0], va + 0)
+ || put_user(ctx->regs[rt + 1], va + 4))
return SIGBUS;
#endif
}
@@ -652,10 +598,10 @@
/* branch taken: emulate dslot instruction */
regs->cp0_epc += 4;
contpc = REG_TO_VA regs->cp0_epc +
- (MIPSInst_SIMM(ir) << 2);
+ (MIPSInst_SIMM(ir) << 2);
- ir = mips_get_word(regs, REG_TO_VA(regs->cp0_epc),
- &err);
+ err = get_user(ir,
+ (mips_instruction *)regs->cp0_epc);
if (err) {
fpuemuprivate.stats.errors++;
return SIGBUS;
@@ -774,13 +720,13 @@
int do_dsemulret(struct pt_regs *xcp)
{
- unsigned long *pinst;
+ mips_instruction *pinst;
unsigned long stackitem;
int err = 0;
/* See if this trap was deliberate. First check the instruction */
- pinst = (unsigned long *) REG_TO_VA(xcp->cp0_epc);
+ pinst = (mips_instruction *) REG_TO_VA(xcp->cp0_epc);
/*
* If we can't even access the area, something is very wrong, but we'll
@@ -790,13 +736,13 @@
return 0;
/* Is the instruction pointed to by the EPC an AdELOAD? */
- stackitem = mips_get_word(xcp, pinst, &err);
+ err = get_user(stackitem, pinst);
if (err || (stackitem != AdELOAD))
return 0;
/* Is the following memory word the BD_COOKIE? */
- stackitem = mips_get_word(xcp, pinst+1, &err);
+ err = get_user(stackitem, pinst + 1);
if (err || (stackitem != BD_COOKIE))
return 0;
@@ -815,7 +761,7 @@
#endif
/* Fetch the Saved EPC to Resume */
- stackitem = mips_get_word(xcp, pinst+2, &err);
+ err = get_user(stackitem, pinst + 2);
if (err) {
/* This is not a good situation to be in */
fpuemuprivate.stats.errors++;
@@ -834,8 +780,9 @@
static int mips_dsemul(struct pt_regs *regs, mips_instruction ir, vaddr_t cpc)
{
- mips_instruction *dsemul_insns;
extern asmlinkage void handle_dsemulret(void);
+ mips_instruction *dsemul_insns;
+ int err;
if (ir == 0) { /* a nop is easy */
regs->cp0_epc = VA_TO_REG(cpc);
@@ -865,29 +812,17 @@
dsemul_insns -= 4; /* Retain 16-byte alignment */
/* Verify that the stack pointer is not competely insane */
- if (verify_area
- (VERIFY_WRITE, dsemul_insns, sizeof(mips_instruction) * 4))
+ if (unlikely(verify_area(VERIFY_WRITE, dsemul_insns,
+ sizeof(mips_instruction) * 4)))
return SIGBUS;
- if (mips_put_word(regs, &dsemul_insns[0], ir)) {
- fpuemuprivate.stats.errors++;
- return (SIGBUS);
- }
-
- if (mips_put_word(regs, &dsemul_insns[1], (mips_instruction)AdELOAD)) {
- fpuemuprivate.stats.errors++;
- return (SIGBUS);
- }
-
- if (mips_put_word(regs, &dsemul_insns[2],
- (mips_instruction)BD_COOKIE)) {
- fpuemuprivate.stats.errors++;
- return (SIGBUS);
- }
-
- if (mips_put_word(regs, &dsemul_insns[3], (mips_instruction)cpc)) {
+ err = __put_user(ir, &dsemul_insns[0]);
+ err |= __put_user((mips_instruction)AdELOAD, &dsemul_insns[1]);
+ err |= __put_user((mips_instruction)BD_COOKIE, &dsemul_insns[2]);
+ err |= __put_user((mips_instruction)cpc, &dsemul_insns[3]);
+ if (unlikely(err)) {
fpuemuprivate.stats.errors++;
- return (SIGBUS);
+ return SIGBUS;
}
regs->cp0_epc = VA_TO_REG & dsemul_insns[0];
@@ -924,15 +859,15 @@
#ifdef CP0_STATUS_FR_SUPPORT
#define DPFROMREG(dp,x) ((dp).bits = \
- ctx->regs[(xcp->cp0_status & ST0_FR) ? x : (x & ~1)])
-#define DPTOREG(dp,x) (ctx->regs[(xcp->cp0_status & ST0_FR) ? x : (x & ~1)]\
- = (dp).bits)
+ ctx->regs[(xcp->cp0_status & ST0_FR) ? x : (x & ~1)])
+#define DPTOREG(dp,x) (ctx->regs[(xcp->cp0_status & ST0_FR) ? x : (x & ~1)] \
+ = (dp).bits)
#else
/* Beware: MIPS COP1 doubles are always little_word endian in registers */
#define DPFROMREG(dp,x) \
- ((dp).bits = ((unsigned long long)ctx->regs[(x)+1] << 32) | ctx->regs[x])
+ ((dp).bits = ((u64)ctx->regs[(x)+1] << 32) | ctx->regs[x])
#define DPTOREG(dp,x) \
- (ctx->regs[x] = (dp).bits, ctx->regs[(x)+1] = (dp).bits >> 32)
+ (ctx->regs[x] = (dp).bits, ctx->regs[(x)+1] = (dp).bits >> 32)
#endif
#if __mips >= 4 && __mips != 32
@@ -1003,19 +938,15 @@
switch (MIPSInst_FUNC(ir)) {
case lwxc1_op:
{
- void *va =
- REG_TO_VA(xcp->
- regs[MIPSInst_FR(ir)]
- +
- xcp->
- regs[MIPSInst_FT
- (ir)]);
+ void *va = REG_TO_VA(
+ xcp->regs[MIPSInst_FR(ir)] +
+ xcp->regs[MIPSInst_FT(ir)]);
fpureg_t val;
int err = 0;
- val = mips_get_word(xcp, va, &err);
+
+ err = get_user(val, (fpureg_t *)va);
if (err) {
- fpuemuprivate.stats.
- errors++;
+ fpuemuprivate.stats.errors++;
return SIGBUS;
}
if (xcp->cp0_status & ST0_FR) {
@@ -1054,30 +985,21 @@
case swxc1_op:
{
- void *va =
- REG_TO_VA(xcp->
- regs[MIPSInst_FR(ir)]
- +
- xcp->
- regs[MIPSInst_FT
- (ir)]);
+ u32 *va = REG_TO_VA(
+ xcp->regs[MIPSInst_FR(ir)] +
+ xcp->regs[MIPSInst_FT(ir)]);
unsigned int val;
+
if (xcp->cp0_status & ST0_FR) {
/* store whole register */
- val =
- ctx->
- regs[MIPSInst_FS(ir)];
+ val = ctx->regs[MIPSInst_FS(ir)];
} else if (MIPSInst_FS(ir) & 1) {
#if defined(SINGLE_ONLY_FPU)
/* illegal register in single-float mode */
return SIGILL;
#else
/* store from m.s. 32 bits */
- val =
- ctx->
- regs[
- (MIPSInst_FS(ir) &
- ~1)] >> 32;
+ val = ctx->regs[(MIPSInst_FS(ir) & ~1)] >> 32;
#endif
} else {
/* store from l.s. 32 bits */
@@ -1085,9 +1007,8 @@
ctx->
regs[MIPSInst_FS(ir)];
}
- if (mips_put_word(xcp, va, val)) {
- fpuemuprivate.stats.
- errors++;
+ if (put_user(val, va)) {
+ fpuemuprivate.stats.errors++;
return SIGBUS;
}
}
@@ -1155,16 +1076,13 @@
switch (MIPSInst_FUNC(ir)) {
case ldxc1_op:
{
- void *va =
- REG_TO_VA(xcp->
- regs[MIPSInst_FR(ir)]
- +
- xcp->
- regs[MIPSInst_FT
- (ir)]);
- int err = 0;
- ctx->regs[MIPSInst_FD(ir)] =
- mips_get_dword(xcp, va, &err);
+ void *va = REG_TO_VA(
+ xcp->regs[MIPSInst_FR(ir)] +
+ xcp->regs[MIPSInst_FT(ir)]);
+ int err;
+
+ err=get_user(ctx->regs[MIPSInst_FD(ir)],
+ (unsigned int *)va);
if (err) {
fpuemuprivate.stats.
errors++;
@@ -1175,18 +1093,13 @@
case sdxc1_op:
{
- void *va =
- REG_TO_VA(xcp->
- regs[MIPSInst_FR(ir)]
- +
- xcp->
- regs[MIPSInst_FT
- (ir)]);
- if (mips_put_dword
- (xcp, va,
- ctx->regs[MIPSInst_FS(ir)])) {
- fpuemuprivate.stats.
- errors++;
+ void *va = REG_TO_VA(
+ xcp->regs[MIPSInst_FR(ir)] +
+ xcp->regs[MIPSInst_FT(ir)]);
+
+ if (put_user(ctx->regs[MIPSInst_FS(ir)],
+ (unsigned int *)va)) {
+ fpuemuprivate.stats.errors++;
return SIGBUS;
}
}
@@ -1195,12 +1108,15 @@
case madd_d_op:
handler = fpemu_dp_madd;
goto dcoptop;
+
case msub_d_op:
handler = fpemu_dp_msub;
goto dcoptop;
+
case nmadd_d_op:
handler = fpemu_dp_nmadd;
goto dcoptop;
+
case nmsub_d_op:
handler = fpemu_dp_nmsub;
goto dcoptop;
@@ -1730,7 +1646,7 @@
schedule();
prevepc = xcp->cp0_epc;
- insn = mips_get_word(xcp, REG_TO_VA(xcp->cp0_epc), &err);
+ err = get_user(insn, (unsigned int *) xcp->cp0_epc);
if (err) {
fpuemuprivate.stats.errors++;
return SIGBUS;
|
|
From: Pete P. <pp...@us...> - 2002-04-24 17:31:48
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv16295/arch/mips/configs Modified Files: defconfig-it8172 Log Message: IT8172 board(s) update. The timer function call has changed ... Index: defconfig-it8172 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-it8172,v retrieving revision 1.17 retrieving revision 1.18 diff -u -d -r1.17 -r1.18 --- defconfig-it8172 12 Feb 2002 18:21:25 -0000 1.17 +++ defconfig-it8172 24 Apr 2002 17:31:44 -0000 1.18 @@ -2,6 +2,7 @@ # Automatically generated make config: don't edit # CONFIG_MIPS=y +CONFIG_MIPS32=y # # Code maturity level options @@ -32,6 +33,9 @@ # CONFIG_NEC_MOBILEPRO is not set # CONFIG_IDT_79S334 is not set # CONFIG_IDT_79EB355 is not set +# CONFIG_IBM_WORKPAD is not set +# CONFIG_CASIO_E55 is not set +# CONFIG_VICTOR_MPC303 is not set # CONFIG_MIPS_MAGNUM_4000 is not set # CONFIG_MOMENCO_OCELOT is not set # CONFIG_DDB5476 is not set @@ -45,6 +49,7 @@ # CONFIG_MIPS_IVR is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1500 is not set +# CONFIG_MIPS_PB1100 is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_HP_LASERJET is not set # CONFIG_HIGHMEM is not set @@ -103,6 +108,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y # CONFIG_CPU_R5900_CONTEXT is not set # CONFIG_VR4131_CACHE_FIX is not set +# CONFIG_VR4122_CLKSPEEDREG_FIX is not set CONFIG_KCORE_ELF=y CONFIG_ELF_KERNEL=y # CONFIG_BINFMT_AOUT is not set @@ -160,6 +166,8 @@ CONFIG_MTD_PHYSMAP_LEN=2000000 CONFIG_MTD_PHYSMAP_BUSWIDTH=4 # CONFIG_MTD_PB1000 is not set +# CONFIG_MTD_PB1500 is not set +# CONFIG_MTD_PB1100 is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set @@ -391,6 +399,7 @@ # CONFIG_BONDING is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set +# CONFIG_ETHERTAP is not set # # Ethernet (10 or 100Mbit) @@ -400,7 +409,6 @@ # CONFIG_HAPPYMEAL is not set # CONFIG_SUNBMAC is not set # CONFIG_SUNQE is not set -# CONFIG_SUNLANCE is not set # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set @@ -413,12 +421,12 @@ # CONFIG_ADAPTEC_STARFIRE is not set # CONFIG_APRICOT is not set # CONFIG_CS89x0 is not set +# CONFIG_TC35815 is not set CONFIG_TULIP=y # CONFIG_TULIP_MWI is not set # CONFIG_TULIP_MMIO is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set -# CONFIG_TC35815 is not set # CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set # CONFIG_LNE390 is not set @@ -432,6 +440,7 @@ # CONFIG_8139TOO_PIO is not set # CONFIG_8139TOO_TUNE_TWISTER is not set # CONFIG_8139TOO_8129 is not set +# CONFIG_8139_NEW_RX_RESET is not set # CONFIG_SIS900 is not set # CONFIG_EPIC100 is not set # CONFIG_SUNDANCE is not set @@ -690,6 +699,10 @@ # # CONFIG_USB_AUDIO is not set # CONFIG_USB_BLUETOOTH is not set + +# +# SCSI support is needed for USB Storage +# # CONFIG_USB_STORAGE is not set # CONFIG_USB_STORAGE_DEBUG is not set # CONFIG_USB_STORAGE_DATAFAB is not set @@ -752,6 +765,7 @@ # CONFIG_USB_SERIAL_EMPEG is not set # CONFIG_USB_SERIAL_FTDI_SIO is not set # CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set # CONFIG_USB_SERIAL_IR is not set # CONFIG_USB_SERIAL_EDGEPORT is not set # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set @@ -765,6 +779,7 @@ # CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set # CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set # CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_KLSI is not set # CONFIG_USB_SERIAL_PL2303 is not set # CONFIG_USB_SERIAL_CYBERJACK is not set # CONFIG_USB_SERIAL_XIRCOM is not set |
|
From: Pete P. <pp...@us...> - 2002-04-24 17:31:47
|
Update of /cvsroot/linux-mips/linux/arch/mips/ite-boards/generic
In directory usw-pr-cvs1:/tmp/cvs-serv16295/arch/mips/ite-boards/generic
Modified Files:
int-handler.S time.c
Log Message:
IT8172 board(s) update. The timer function call has changed ...
Index: int-handler.S
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/ite-boards/generic/int-handler.S,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- int-handler.S 22 Nov 2001 01:19:24 -0000 1.3
+++ int-handler.S 24 Apr 2002 17:31:44 -0000 1.4
@@ -27,7 +27,7 @@
andi a0, t0, CAUSEF_IP7
beq a0, zero, 1f
move a0, sp
- jal local_timer_interrupt
+ jal ite_timer_interrupt
j ret_from_irq
nop
Index: time.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/ite-boards/generic/time.c,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -d -r1.9 -r1.10
--- time.c 21 Apr 2002 19:30:07 -0000 1.9
+++ time.c 24 Apr 2002 17:31:44 -0000 1.10
@@ -129,9 +129,6 @@
#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
void __init it8172_timer_setup(struct irqaction *irq)
{
- puts("timer_setup\n");
- put32(NR_IRQS);
- puts("");
/* we are using the cpu counter for timer interrupts */
setup_irq(MIPS_CPU_TIMER_IRQ, irq);
@@ -141,3 +138,8 @@
set_cp0_status(ALLINTS);
}
+void ite_timer_interrupt(struct pt_regs *regs)
+{
+ ll_timer_interrupt(MIPS_CPU_TIMER_IRQ, regs);
+ //do_IRQ(MIPS_CPU_TIMER_IRQ, regs);
+}
|
|
From: James S. <jsi...@us...> - 2002-04-24 17:30:31
|
Update of /cvsroot/linux-mips/linux/arch/mips64/mm
In directory usw-pr-cvs1:/tmp/cvs-serv16026
Modified Files:
c-sb1.c
Log Message:
Fix old build problem for 64-bit also.
Index: c-sb1.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/mm/c-sb1.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- c-sb1.c 18 Mar 2002 22:19:21 -0000 1.5
+++ c-sb1.c 24 Apr 2002 17:30:19 -0000 1.6
@@ -326,7 +326,7 @@
/*
* A signal trampoline must fit into a single cacheline.
*/
-static inline void local_sb1_flush_cache_sigtramp(unsigned long addr)
+static void local_sb1_flush_cache_sigtramp(unsigned long addr)
{
unsigned long daddr, iaddr;
|
|
From: James S. <jsi...@us...> - 2002-04-24 17:26:06
|
Update of /cvsroot/linux-mips/linux/include/asm-mips64 In directory usw-pr-cvs1:/tmp/cvs-serv14748a/include/asm-mips64 Modified Files: time.h Log Message: 64-bit time fixes to make time.c match the 32-bit version. Index: time.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/time.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- time.h 2 Jan 2002 19:12:18 -0000 1.1 +++ time.h 24 Apr 2002 17:26:02 -0000 1.2 @@ -1,5 +1,5 @@ /* - * Copyright 2001 MontaVista Software Inc. + * Copyright (C) 2001, 2002, MontaVista Software Inc. * Author: Jun Sun, js...@mv... or js...@ju... * * include/asm-mips/time.h @@ -59,6 +59,12 @@ * the corresponding low-level timer interrupt routine. */ asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs); + +/* + * profiling and process accouting is done separately in local_timer_interrupt + */ +void local_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs); +asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs); /* * board specific routines required by time_init(). |
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From: James S. <jsi...@us...> - 2002-04-24 17:26:06
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Update of /cvsroot/linux-mips/linux/arch/mips64/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv14748a/arch/mips64/kernel
Modified Files:
time.c
Log Message:
64-bit time fixes to make time.c match the 32-bit version.
Index: time.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/time.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- time.c 2 Jan 2002 19:13:41 -0000 1.1
+++ time.c 24 Apr 2002 17:26:02 -0000 1.2
@@ -39,6 +39,11 @@
extern volatile unsigned long wall_jiffies;
/*
+ * whether we emulate local_timer_interrupts for SMP machines.
+ */
+int emulate_local_timer_interrupt;
+
+/*
* By default we provide the null RTC ops
*/
static unsigned long null_rtc_get_time(void)
@@ -283,6 +288,42 @@
/*
+ * local_timer_interrupt() does profiling and process accounting
+ * on a per-CPU basis.
+ *
+ * In UP mode, it is invoked from the (global) timer_interrupt.
+ *
+ * In SMP mode, it might invoked by per-CPU timer interrupt, or
+ * a broadcasted inter-processor interrupt which itself is triggered
+ * by the global timer interrupt.
+ */
+void local_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+ if(!user_mode(regs)) {
+ if (prof_buffer && current->pid) {
+ extern int _stext;
+ unsigned long pc = regs->cp0_epc;
+
+ pc -= (unsigned long) &_stext;
+ pc >>= prof_shift;
+ /*
+ * Dont ignore out-of-bounds pc values silently,
+ * put them into the last histogram slot, so if
+ * present, they will show up as a sharp peak.
+ */
+ if (pc > prof_len-1)
+ pc = prof_len-1;
+ atomic_inc((atomic_t *)&prof_buffer[pc]);
+ }
+ }
+
+#if defined(CONFIG_SMP)
+ /* in UP mode, update_process_times() is invoked by do_timer() */
+ update_process_times(user_mode(regs));
+#endif
+}
+
+/*
* high-level timer interrupt service routines. This function
* is set as irqaction->handler and is invoked through do_IRQ.
*/
@@ -309,24 +350,6 @@
}
- if(!user_mode(regs)) {
- if (prof_buffer && current->pid) {
- extern int _stext;
- unsigned long pc = regs->cp0_epc;
-
- pc -= (unsigned long) &_stext;
- pc >>= prof_shift;
- /*
- * Dont ignore out-of-bounds pc values silently,
- * put them into the last histogram slot, so if
- * present, they will show up as a sharp peak.
- */
- if (pc > prof_len-1)
- pc = prof_len-1;
- atomic_inc((atomic_t *)&prof_buffer[pc]);
- }
- }
-
/*
* call the generic timer interrupt handling
*/
@@ -359,6 +382,31 @@
if (!jiffies) {
timerhi = timerlo = 0;
}
+
+#if !defined(CONFIG_SMP)
+ /*
+ * In UP mode, we call local_timer_interrupt() to do profiling
+ * and process accouting.
+ *
+ * In SMP mode, local_timer_interrupt() is invoked by appropriate
+ * low-level local timer interrupt handler.
+ */
+ local_timer_interrupt(0, NULL, regs);
+
+#else /* CONFIG_SMP */
+
+ if (emulate_local_timer_interrupt) {
+ /*
+ * this is the place where we send out inter-process
+ * interrupts and let each CPU do its own profiling
+ * and process accouting.
+ *
+ * Obviously we need to call local_timer_interrupt() for
+ * the current CPU too.
+ */
+ panic("Not implemented yet!!!");
+ }
+#endif /* CONFIG_SMP */
}
asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs)
@@ -377,6 +425,21 @@
do_softirq();
}
+asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs)
+{
+ int cpu = smp_processor_id();
+
+ irq_enter(cpu, irq);
+ kstat.irqs[cpu][irq]++;
+
+ /* we keep interrupt disabled all the time */
+ local_timer_interrupt(irq, NULL, regs);
+
+ irq_exit(cpu, irq);
+
+ if (softirq_pending(cpu))
+ do_softirq();
+}
/*
* time_init() - it does the following things.
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From: James S. <jsi...@us...> - 2002-04-24 17:23:17
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Update of /cvsroot/linux-mips/linux/arch/mips/tx4927/toshiba_rbtx4927 In directory usw-pr-cvs1:/tmp/cvs-serv13975/toshiba_rbtx4927 Log Message: Directory /cvsroot/linux-mips/linux/arch/mips/tx4927/toshiba_rbtx4927 added to the repository |
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From: James S. <jsi...@us...> - 2002-04-24 17:22:59
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Update of /cvsroot/linux-mips/linux/arch/mips/tx4927/common In directory usw-pr-cvs1:/tmp/cvs-serv13916/common Log Message: Directory /cvsroot/linux-mips/linux/arch/mips/tx4927/common added to the repository |
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From: James S. <jsi...@us...> - 2002-04-24 17:22:43
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Update of /cvsroot/linux-mips/linux/arch/mips/tx4927 In directory usw-pr-cvs1:/tmp/cvs-serv13861/tx4927 Log Message: Directory /cvsroot/linux-mips/linux/arch/mips/tx4927 added to the repository |
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From: James S. <jsi...@us...> - 2002-04-24 17:22:19
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Update of /cvsroot/linux-mips/linux/include/asm-mips/tx4927/toshiba_rbtx4927 In directory usw-pr-cvs1:/tmp/cvs-serv13789/toshiba_rbtx4927 Log Message: Directory /cvsroot/linux-mips/linux/include/asm-mips/tx4927/toshiba_rbtx4927 added to the repository |
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From: James S. <jsi...@us...> - 2002-04-24 17:21:54
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Update of /cvsroot/linux-mips/linux/include/asm-mips/tx4927 In directory usw-pr-cvs1:/tmp/cvs-serv13709/tx4927 Log Message: Directory /cvsroot/linux-mips/linux/include/asm-mips/tx4927 added to the repository |
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From: Pete P. <pp...@us...> - 2002-04-23 16:43:51
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Update of /cvsroot/linux-mips/linux/arch/mips/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv25995/arch/mips/kernel
Modified Files:
setup.c
Log Message:
Moved au1k_wait() to kernel/setup.c to fix the compile problem.
Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/setup.c,v
retrieving revision 1.58
retrieving revision 1.59
diff -u -d -r1.58 -r1.59
--- setup.c 22 Apr 2002 17:45:01 -0000 1.58
+++ setup.c 23 Apr 2002 16:43:48 -0000 1.59
@@ -1177,6 +1177,18 @@
: "$1");
}
+void au1k_wait(void)
+{
+#ifdef CONFIG_PM
+ /* using the wait instruction makes CP0 counter unusable */
+ __asm__(".set\tmips3\n\t"
+ "wait\n\t"
+ "nop\n\t" "nop\n\t" "nop\n\t" "nop\n\t" ".set\tmips0");
+#else
+ __asm__("nop\n\t" "nop\n\t");
+#endif
+}
+
int __init fpu_disable(char *s)
{
mips_cpu.options &= ~MIPS_CPU_FPU;
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From: Pete P. <pp...@us...> - 2002-04-23 16:43:50
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Update of /cvsroot/linux-mips/linux/arch/mips/au1000/common
In directory usw-pr-cvs1:/tmp/cvs-serv25995/arch/mips/au1000/common
Modified Files:
power.c
Log Message:
Moved au1k_wait() to kernel/setup.c to fix the compile problem.
Index: power.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/power.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- power.c 22 Apr 2002 17:45:00 -0000 1.6
+++ power.c 23 Apr 2002 16:43:47 -0000 1.7
@@ -49,7 +49,7 @@
# define DPRINTK(fmt, args...)
#endif
-inline void au1k_wait(void);
+extern void au1k_wait(void);
static void calibrate_delay(void);
extern void set_au1000_speed(unsigned int new_freq);
@@ -278,13 +278,6 @@
__initcall(pm_init);
-inline void au1k_wait(void)
-{
- __asm__(".set\tmips3\n\t"
- "wait\n\t"
- "nop\n\t" "nop\n\t" "nop\n\t" "nop\n\t" ".set\tmips0");
-}
-
/*
* This is right out of init/main.c
@@ -330,12 +323,8 @@
}
}
-
-#else /* CONFIG_PM */
-
void au1k_wait(void)
{
__asm__("nop\n\t" "nop\n\t");
}
-
#endif /* CONFIG_PM */
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