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From: James S. <jsi...@us...> - 2001-08-22 18:18:17
|
Update of /cvsroot/linux-mips/linux/arch/mips/galileo-boards/ev96100
In directory usw-pr-cvs1:/tmp/cvs-serv15361/arch/mips/galileo-boards/ev96100
Modified Files:
irq.c
Added Files:
pci.c
Log Message:
Synced to Ralph's tree
Index: irq.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/galileo-boards/ev96100/irq.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -C2 -d -r1.3 -r1.4
*** irq.c 2001/08/10 21:53:38 1.3
--- irq.c 2001/08/22 18:18:13 1.4
***************
*** 116,128 ****
}
- void disable_irq_nosync(unsigned int irq_nr)
- {
- unsigned long flags;
-
- save_and_cli(flags);
- mask_irq(irq_nr);
- restore_flags(flags);
- }
-
void enable_irq(unsigned int irq_nr)
{
--- 116,119 ----
***************
*** 230,237 ****
irq_exit(cpu,irq);
- #if 0
if (softirq_pending(cpu))
do_softirq();
- #endif
}
--- 221,226 ----
|
|
From: James S. <jsi...@us...> - 2001-08-22 18:18:16
|
Update of /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5477
In directory usw-pr-cvs1:/tmp/cvs-serv15361/arch/mips/ddb5xxx/ddb5477
Modified Files:
pci.c
Log Message:
Synced to Ralph's tree
Index: pci.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5xxx/ddb5477/pci.c,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -C2 -d -r1.1.1.1 -r1.2
*** pci.c 2001/06/22 02:29:31 1.1.1.1
--- pci.c 2001/08/22 18:18:13 1.2
***************
*** 142,144 ****
}
!
--- 142,147 ----
}
! unsigned __init int pcibios_assign_all_busses(void)
! {
! return 1;
! }
|
|
From: James S. <jsi...@us...> - 2001-08-22 18:18:16
|
Update of /cvsroot/linux-mips/linux/arch/mips/ddb5476
In directory usw-pr-cvs1:/tmp/cvs-serv15361/arch/mips/ddb5476
Added Files:
pci.c
Log Message:
Synced to Ralph's tree
--- NEW FILE: pci.c ---
/*
* arch/mips/ddb5476/pci.c -- NEC DDB Vrc-5074 PCI access routines
*
* Copyright (C) 2000 Geert Uytterhoeven <ge...@so...>
* Albert Dorofeev <al...@so...>
* Sony Software Development Center Europe (SDCE), Brussels
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <asm-mips/nile4.h>
static u32 nile4_pre_pci_access0(int slot_num)
{
u32 pci_addr = 0;
u32 virt_addr = NILE4_PCI_CFG_BASE;
/* work around the bug for Vrc5476 */
if (slot_num == 13)
return NILE4_BASE + NILE4_PCI_BASE;
/* Set window 1 address 08000000 - 32 bit - 128 MB (PCI config space) */
nile4_set_pdar(NILE4_PCIW1, PHYSADDR(virt_addr), 0x08000000, 32, 0,
0);
// [jsun] we start scanning from addr:10,
// with 128M we can go up to addr:26 (slot 16)
if (slot_num <= 16) {
virt_addr += 0x00000400 << slot_num;
} else {
/* for high slot, we have to set higher PCI base addr */
pci_addr = 0x00000400 << slot_num;
}
nile4_set_pmr(NILE4_PCIINIT1, NILE4_PCICMD_CFG, pci_addr);
return virt_addr;
}
static void nile4_post_pci_access0(void)
{
/*
* Set window 1 back to address 08000000 - 32 bit - 128 MB
* (PCI IO space)
*/
nile4_set_pdar(NILE4_PCIW1, PHYSADDR(NILE4_PCI_MEM_BASE),
0x08000000, 32, 1, 1);
// nile4_set_pmr(NILE4_PCIINIT1, NILE4_PCICMD_MEM, 0);
nile4_set_pmr(NILE4_PCIINIT1, NILE4_PCICMD_MEM, 0x08000000);
}
static int nile4_pci_read_config_dword(struct pci_dev *dev,
int where, u32 * val)
{
int slot_num, func_num;
u32 base;
u32 addr;
/*
* Do we need to generate type 1 configure transaction?
*/
if (dev->bus->number) {
/* FIXME - not working yet */
return PCIBIOS_FUNC_NOT_SUPPORTED;
/*
* the largest type 1 configuration addr is 16M, < 256M
* config space
*/
slot_num = 0;
addr =
(dev->bus->number << 16) | (dev->devfn <
8) | where | 1;
} else {
slot_num = PCI_SLOT(dev->devfn);
func_num = PCI_FUNC(dev->devfn);
addr = (func_num << 8) + where;
}
base = nile4_pre_pci_access0(slot_num);
*val = *(volatile u32 *) (base + addr);
nile4_post_pci_access0();
return PCIBIOS_SUCCESSFUL;
}
static int nile4_pci_write_config_dword(struct pci_dev *dev, int where,
u32 val)
{
int slot_num, func_num;
u32 base;
u32 addr;
/*
* Do we need to generate type 1 configure transaction?
*/
if (dev->bus->number) {
/* FIXME - not working yet */
return PCIBIOS_FUNC_NOT_SUPPORTED;
/* the largest type 1 configuration addr is 16M, < 256M config space */
slot_num = 0;
addr =
(dev->bus->number << 16) | (dev->devfn <
8) | where | 1;
} else {
slot_num = PCI_SLOT(dev->devfn);
func_num = PCI_FUNC(dev->devfn);
addr = (func_num << 8) + where;
}
base = nile4_pre_pci_access0(slot_num);
*(volatile u32 *) (base + addr) = val;
nile4_post_pci_access0();
return PCIBIOS_SUCCESSFUL;
}
static int nile4_pci_read_config_word(struct pci_dev *dev, int where,
u16 * val)
{
int status;
u32 result;
status = nile4_pci_read_config_dword(dev, where & ~3, &result);
if (status != PCIBIOS_SUCCESSFUL)
return status;
if (where & 2)
result >>= 16;
*val = result & 0xffff;
return PCIBIOS_SUCCESSFUL;
}
static int nile4_pci_read_config_byte(struct pci_dev *dev, int where,
u8 * val)
{
int status;
u32 result;
status = nile4_pci_read_config_dword(dev, where & ~3, &result);
if (status != PCIBIOS_SUCCESSFUL)
return status;
if (where & 1)
result >>= 8;
if (where & 2)
result >>= 16;
*val = result & 0xff;
return PCIBIOS_SUCCESSFUL;
}
static int nile4_pci_write_config_word(struct pci_dev *dev, int where,
u16 val)
{
int status, shift = 0;
u32 result;
status = nile4_pci_read_config_dword(dev, where & ~3, &result);
if (status != PCIBIOS_SUCCESSFUL)
return status;
if (where & 2)
shift += 16;
result &= ~(0xffff << shift);
result |= val << shift;
return nile4_pci_write_config_dword(dev, where & ~3, result);
}
static int nile4_pci_write_config_byte(struct pci_dev *dev, int where,
u8 val)
{
int status, shift = 0;
u32 result;
status = nile4_pci_read_config_dword(dev, where & ~3, &result);
if (status != PCIBIOS_SUCCESSFUL)
return status;
if (where & 2)
shift += 16;
if (where & 1)
shift += 8;
result &= ~(0xff << shift);
result |= val << shift;
return nile4_pci_write_config_dword(dev, where & ~3, result);
}
struct pci_ops nile4_pci_ops = {
nile4_pci_read_config_byte,
nile4_pci_read_config_word,
nile4_pci_read_config_dword,
nile4_pci_write_config_byte,
nile4_pci_write_config_word,
nile4_pci_write_config_dword
};
struct {
struct resource ram;
struct resource flash;
struct resource isa_io;
struct resource pci_io;
struct resource isa_mem;
struct resource pci_mem;
struct resource nile4;
struct resource boot;
} ddb5476_resources = {
// { "RAM", 0x00000000, 0x03ffffff, IORESOURCE_MEM | PCI_BASE_ADDRESS_MEM_TYPE_64 },
{
"RAM", 0x00000000, 0x03ffffff, IORESOURCE_MEM}, {
"Flash ROM", 0x04000000, 0x043fffff}, {
"Nile4 ISA I/O", 0x06000000, 0x060fffff}, {
"Nile4 PCI I/O", 0x06100000, 0x07ffffff}, {
"Nile4 ISA mem", 0x08000000, 0x08ffffff, IORESOURCE_MEM}, {
"Nile4 PCI mem", 0x09000000, 0x0fffffff, IORESOURCE_MEM},
// { "Nile4 ctrl", 0x1fa00000, 0x1fbfffff, IORESOURCE_MEM | PCI_BASE_ADDRESS_MEM_TYPE_64 },
{
"Nile4 ctrl", 0x1fa00000, 0x1fbfffff, IORESOURCE_MEM}, {
"Boot ROM", 0x1fc00000, 0x1fffffff}
};
struct resource M5229_resources[5] = {
{"M5229 BAR0", 0x1f0, 0x1f3, IORESOURCE_IO},
{"M5229 BAR1", 0x3f4, 0x3f7, IORESOURCE_IO},
{"M5229 BAR2", 0x170, 0x173, IORESOURCE_IO},
{"M5229 BAR3", 0x374, 0x377, IORESOURCE_IO},
{"M5229 BAR4", 0xf000, 0xf00f, IORESOURCE_IO}
};
static void __init ddb5476_pci_fixup(void)
{
struct pci_dev *dev;
pci_for_each_dev(dev) {
if (dev->vendor == PCI_VENDOR_ID_NEC &&
dev->device == PCI_DEVICE_ID_NEC_VRC5476) {
/*
* The first 64-bit PCI base register should point to
* the Nile4 control registers. Unfortunately this
* isn't the case, so we fix it ourselves. This allows
* the serial driver to find the UART.
*/
dev->resource[0] = ddb5476_resources.nile4;
request_resource(&iomem_resource,
&dev->resource[0]);
/*
* The second 64-bit PCI base register points to the
* first memory bank. Unfortunately the address is
* wrong, so we fix it (again).
*/
/* [jsun] We cannot request the resource anymore,
* because kernel/setup.c has already reserved "System
* RAM" resource at the same spot.
* The fundamental problem here is that PCI host
* controller should not put system RAM mapping in BAR
* and make subject to PCI resource assignement.
* Current fix is a total hack. We set parent to 1 so
* so that PCI resource assignement code is fooled to
* think the resource is assigned, and will not attempt
* to mess with it.
*/
dev->resource[2] = ddb5476_resources.ram;
if (request_resource(&iomem_resource,
&dev->resource[2]) ) {
dev->resource[2].parent = 0x1;
}
} else if (dev->vendor == PCI_VENDOR_ID_AL
&& dev->device == PCI_DEVICE_ID_AL_M7101) {
/*
* It's nice to have the LEDs on the GPIO pins
* available for debugging
*/
extern struct pci_dev *pci_pmu;
u8 t8;
pci_pmu = dev; /* for LEDs D2 and D3 */
/* Program the lines for LEDs D2 and D3 to output */
nile4_pci_read_config_byte(dev, 0x7d, &t8);
t8 |= 0xc0;
nile4_pci_write_config_byte(dev, 0x7d, t8);
/* Turn LEDs D2 and D3 off */
nile4_pci_read_config_byte(dev, 0x7e, &t8);
t8 |= 0xc0;
nile4_pci_write_config_byte(dev, 0x7e, t8);
} else if (dev->vendor == PCI_VENDOR_ID_AL &&
dev->device == 0x5229) {
int i;
for (i = 0; i < 5; i++) {
dev->resource[i] = M5229_resources[i];
request_resource(&ioport_resource,
&dev->resource[i]);
}
}
}
}
static void __init pcibios_fixup_irqs(void)
{
struct pci_dev *dev;
int slot_num;
pci_for_each_dev(dev) {
slot_num = PCI_SLOT(dev->devfn);
switch (slot_num) {
case 3: /* re-programmed to USB */
dev->irq = 9; /* hard-coded; see irq.c */
break;
case 4: /* re-programmed to PMU */
dev->irq = 10; /* hard-coded; see irq.c */
break;
case 6: /* on-board pci-pci bridge */
dev->irq = 0xff;
break;
case 7: /* on-board ether */
dev->irq = nile4_to_irq(NILE4_INT_INTB);
break;
case 8: /* ISA-PCI bridge */
dev->irq = nile4_to_irq(NILE4_INT_INTC);
break;
case 9: /* ext slot #3 */
dev->irq = nile4_to_irq(NILE4_INT_INTD);
break;
case 10: /* ext slot #4 */
dev->irq = nile4_to_irq(NILE4_INT_INTA);
break;
case 13: /* Vrc5476 */
dev->irq = 0xff;
break;
case 14: /* HD controller, M5229 */
dev->irq = 14;
break;
default:
printk
("JSUN : in pcibios_fixup_irqs - unkown slot %d\n",
slot_num);
panic
("JSUN : in pcibios_fixup_irqs - unkown slot.\n");
}
}
}
void __init pcibios_init(void)
{
printk("PCI: Emulate bios initialization \n");
/* [jsun] we need to set BAR0 so that SDRAM 0 appears at 0x0 in PCI */
*(long *) (NILE4_BASE + NILE4_BAR0) = 0x8;
printk("PCI: Probing PCI hardware\n");
ioport_resource.end = 0x1ffffff; /* 32 MB */
iomem_resource.end = 0x1fffffff; /* 512 MB */
/* `ram' and `nile4' are requested through the Nile4 pci_dev */
request_resource(&iomem_resource, &ddb5476_resources.flash);
request_resource(&iomem_resource, &ddb5476_resources.isa_io);
request_resource(&iomem_resource, &ddb5476_resources.pci_io);
request_resource(&iomem_resource, &ddb5476_resources.isa_mem);
request_resource(&iomem_resource, &ddb5476_resources.pci_mem);
request_resource(&iomem_resource, &ddb5476_resources.boot);
pci_scan_bus(0, &nile4_pci_ops, NULL);
ddb5476_pci_fixup();
pci_assign_unassigned_resources();
pcibios_fixup_irqs();
}
void __init pcibios_fixup_bus(struct pci_bus *bus)
{
/* [jsun] we don't know how to fix sub-buses yet */
if (bus->number == 0) {
bus->resource[1] = &ddb5476_resources.pci_mem;
}
}
char *pcibios_setup(char *str)
{
return str;
}
void __init pcibios_update_irq(struct pci_dev *dev, int irq)
{
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
}
void __init pcibios_fixup_pbus_ranges(struct pci_bus *bus,
struct pbus_set_ranges_data *ranges)
{
/*
* our caller figure out range by going through the dev structures.
* I guess this is the place to fix things up if the bus is using a
* different view of the addressing space.
*/
#if 0 /* original DDB5074 code */
if (bus->number == 0) {
ranges->io_start -= bus->resource[0]->start;
ranges->io_end -= bus->resource[0]->start;
ranges->mem_start -= bus->resource[1]->start;
ranges->mem_end -= bus->resource[1]->start;
}
#endif
}
int pcibios_enable_resources(struct pci_dev *dev)
{
u16 cmd, old_cmd;
int idx;
struct resource *r;
/*
* Don't touch the Nile 4
*/
if (dev->vendor == PCI_VENDOR_ID_NEC &&
dev->device == PCI_DEVICE_ID_NEC_VRC5476) return 0;
pci_read_config_word(dev, PCI_COMMAND, &cmd);
old_cmd = cmd;
for (idx = 0; idx < 6; idx++) {
r = &dev->resource[idx];
if (!r->start && r->end) {
printk(KERN_ERR "PCI: Device %s not available because "
"of resource collisions\n", dev->slot_name);
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
cmd |= PCI_COMMAND_IO;
if (r->flags & IORESOURCE_MEM)
cmd |= PCI_COMMAND_MEMORY;
}
if (cmd != old_cmd) {
printk("PCI: Enabling device %s (%04x -> %04x)\n",
dev->slot_name, old_cmd, cmd);
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
return 0;
}
int pcibios_enable_device(struct pci_dev *dev)
{
return pcibios_enable_resources(dev);
}
void pcibios_update_resource(struct pci_dev *dev, struct resource *root,
struct resource *res, int resource)
{
u32 new, check;
int reg;
new = res->start | (res->flags & PCI_REGION_FLAG_MASK);
if (resource < 6) {
reg = PCI_BASE_ADDRESS_0 + 4 * resource;
} else if (resource == PCI_ROM_RESOURCE) {
res->flags |= PCI_ROM_ADDRESS_ENABLE;
reg = dev->rom_base_reg;
} else {
/*
* Somebody might have asked allocation of a non-standard
* resource
*/
return;
}
pci_write_config_dword(dev, reg, new);
pci_read_config_dword(dev, reg, &check);
if ((new ^ check) &
((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK :
PCI_BASE_ADDRESS_MEM_MASK)) {
printk(KERN_ERR "PCI: Error while updating region "
"%s/%d (%08x != %08x)\n", dev->slot_name, resource,
new, check);
}
}
void pcibios_align_resource(void *data, struct resource *res,
unsigned long size)
{
struct pci_dev *dev = data;
if (res->flags & IORESOURCE_IO) {
unsigned long start = res->start;
/* We need to avoid collisions with `mirrored' VGA ports
and other strange ISA hardware, so we always want the
addresses kilobyte aligned. */
if (size > 0x100) {
printk(KERN_ERR "PCI: I/O Region %s/%d too large"
" (%ld bytes)\n", dev->slot_name,
dev->resource - res, size);
}
start = (start + 1024 - 1) & ~(1024 - 1);
res->start = start;
}
}
unsigned __init int pcibios_assign_all_busses(void)
{
return 1;
}
struct pci_fixup pcibios_fixups[] = { {0} };
|
|
From: James S. <jsi...@us...> - 2001-08-22 18:18:16
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv15361/arch/mips/configs Modified Files: defconfig-nino defconfig-ocelot defconfig-pb1000 defconfig-rm200 Log Message: Synced to Ralph's tree Index: defconfig-nino =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-nino,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** defconfig-nino 2001/08/16 16:58:30 1.3 --- defconfig-nino 2001/08/22 18:18:13 1.4 *************** *** 278,282 **** CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set - # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set --- 278,281 ---- Index: defconfig-ocelot =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ocelot,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** defconfig-ocelot 2001/08/16 16:58:30 1.3 --- defconfig-ocelot 2001/08/22 18:18:13 1.4 *************** *** 211,215 **** # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - # CONFIG_NET_SB1000 is not set # --- 211,214 ---- *************** *** 217,226 **** # CONFIG_NET_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set - # CONFIG_AT1700 is not set - # CONFIG_DEPCA is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set --- 216,230 ---- # CONFIG_NET_ETHERNET=y + # CONFIG_ARM_AM79C961A is not set + # CONFIG_SUNLANCE is not set + # CONFIG_HAPPYMEAL is not set + # CONFIG_SUNBMAC is not set + # CONFIG_SUNQE is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set *************** *** 231,239 **** # CONFIG_CS89x0 is not set # CONFIG_TULIP is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set CONFIG_EEPRO100=y - # CONFIG_EEPRO100_PM is not set # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set --- 235,244 ---- # CONFIG_CS89x0 is not set # CONFIG_TULIP is not set + # CONFIG_TULIP_MWI is not set + # CONFIG_TULIP_MMIO is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set CONFIG_EEPRO100=y # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set *************** *** 252,256 **** # CONFIG_VIA_RHINE is not set # CONFIG_WINBOND_840 is not set - # CONFIG_HAPPYMEAL is not set # CONFIG_LAN_SAA9730 is not set # CONFIG_NET_POCKET is not set --- 257,260 ---- *************** *** 260,263 **** --- 264,269 ---- # # CONFIG_ACENIC is not set + # CONFIG_ACENIC_OMIT_TIGON_I is not set + # CONFIG_MYRI_SBUS is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set *************** *** 265,268 **** --- 271,275 ---- # CONFIG_FDDI is not set # CONFIG_HIPPI is not set + # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set *************** *** 400,404 **** CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set - # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set --- 407,410 ---- Index: defconfig-pb1000 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-pb1000,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** defconfig-pb1000 2001/08/16 16:58:30 1.3 --- defconfig-pb1000 2001/08/22 18:18:13 1.4 *************** *** 206,210 **** # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - # CONFIG_NET_SB1000 is not set # --- 206,209 ---- *************** *** 212,222 **** # CONFIG_NET_ETHERNET=y CONFIG_MIPS_AU1000_ENET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set - # CONFIG_AT1700 is not set - # CONFIG_DEPCA is not set # CONFIG_NET_ISA is not set # CONFIG_NET_PCI is not set --- 211,225 ---- # CONFIG_NET_ETHERNET=y + # CONFIG_ARM_AM79C961A is not set CONFIG_MIPS_AU1000_ENET=y + # CONFIG_SUNLANCE is not set + # CONFIG_SUNBMAC is not set + # CONFIG_SUNQE is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_NET_ISA is not set # CONFIG_NET_PCI is not set *************** *** 227,230 **** --- 230,235 ---- # # CONFIG_ACENIC is not set + # CONFIG_ACENIC_OMIT_TIGON_I is not set + # CONFIG_MYRI_SBUS is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set *************** *** 232,235 **** --- 237,241 ---- # CONFIG_FDDI is not set # CONFIG_HIPPI is not set + # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set *************** *** 383,387 **** CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set - # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set --- 389,392 ---- Index: defconfig-rm200 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-rm200,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** defconfig-rm200 2001/08/16 16:58:30 1.3 --- defconfig-rm200 2001/08/22 18:18:13 1.4 *************** *** 322,326 **** CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set - # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set --- 322,325 ---- |
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From: James S. <jsi...@us...> - 2001-08-22 18:18:16
|
Update of /cvsroot/linux-mips/linux/arch/mips/ddb5074
In directory usw-pr-cvs1:/tmp/cvs-serv15361/arch/mips/ddb5074
Modified Files:
pci.c
Log Message:
Synced to Ralph's tree
Index: pci.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/ddb5074/pci.c,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -C2 -d -r1.1.1.1 -r1.2
*** pci.c 2001/06/22 02:29:31 1.1.1.1
--- pci.c 2001/08/22 18:18:13 1.2
***************
*** 418,421 ****
--- 418,425 ----
}
+ unsigned __init int pcibios_assign_all_busses(void)
+ {
+ return 1;
+ }
struct pci_fixup pcibios_fixups[] = { };
|
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From: James S. <jsi...@us...> - 2001-08-22 16:47:16
|
Update of /cvsroot/linux-mips/linux/arch/mips/dec/boot In directory usw-pr-cvs1:/tmp/cvs-serv9720/boot Log Message: Directory /cvsroot/linux-mips/linux/arch/mips/dec/boot added to the repository |
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From: James S. <jsi...@us...> - 2001-08-22 16:40:41
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv7506 Modified Files: defconfig-malta Log Message: Synced to Ralph's tree Index: defconfig-malta =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-malta,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** defconfig-malta 2001/08/16 16:58:30 1.3 --- defconfig-malta 2001/08/22 16:40:38 1.4 *************** *** 273,277 **** # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - # CONFIG_NET_SB1000 is not set # --- 273,276 ---- *************** *** 279,288 **** # CONFIG_NET_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set - # CONFIG_AT1700 is not set - # CONFIG_DEPCA is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set --- 278,292 ---- # CONFIG_NET_ETHERNET=y + # CONFIG_ARM_AM79C961A is not set + # CONFIG_SUNLANCE is not set + # CONFIG_HAPPYMEAL is not set + # CONFIG_SUNBMAC is not set + # CONFIG_SUNQE is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set *************** *** 293,301 **** # CONFIG_CS89x0 is not set # CONFIG_TULIP is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set - # CONFIG_EEPRO100_PM is not set # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set --- 297,306 ---- # CONFIG_CS89x0 is not set # CONFIG_TULIP is not set + # CONFIG_TULIP_MWI is not set + # CONFIG_TULIP_MMIO is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set *************** *** 314,318 **** # CONFIG_VIA_RHINE is not set # CONFIG_WINBOND_840 is not set - # CONFIG_HAPPYMEAL is not set # CONFIG_LAN_SAA9730 is not set # CONFIG_NET_POCKET is not set --- 319,322 ---- *************** *** 322,325 **** --- 326,331 ---- # # CONFIG_ACENIC is not set + # CONFIG_ACENIC_OMIT_TIGON_I is not set + # CONFIG_MYRI_SBUS is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set *************** *** 327,330 **** --- 333,337 ---- # CONFIG_FDDI is not set # CONFIG_HIPPI is not set + # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set *************** *** 462,466 **** CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set - # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set --- 469,472 ---- |
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From: James S. <jsi...@us...> - 2001-08-22 16:40:07
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv7329 Modified Files: defconfig-it8172 Log Message: Synced to Ralph's tree Index: defconfig-it8172 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-it8172,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** defconfig-it8172 2001/08/20 16:12:26 1.4 --- defconfig-it8172 2001/08/22 16:40:04 1.5 *************** *** 101,153 **** CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set ! ! # ! # Disk-On-Chip Device Drivers ! # ! # CONFIG_MTD_DOC1000 is not set ! # CONFIG_MTD_DOC2000 is not set ! # CONFIG_MTD_DOC2001 is not set ! # CONFIG_MTD_DOCPROBE is not set # ! # RAM/ROM Device Drivers # ! # CONFIG_MTD_SLRAM is not set ! # CONFIG_MTD_PMC551 is not set ! # CONFIG_MTD_MTDRAM is not set # ! # Linearly Mapped Flash Device Drivers # CONFIG_MTD_CFI=y CONFIG_MTD_CFI_INTELEXT=y # CONFIG_MTD_CFI_AMDSTD is not set # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set # CONFIG_MTD_JEDEC is not set CONFIG_MTD_PHYSMAP=y CONFIG_MTD_PHYSMAP_START=8000000 CONFIG_MTD_PHYSMAP_LEN=2000000 CONFIG_MTD_PHYSMAP_BUSWIDTH=4 ! ! # ! # Drivers for chip mappings ! # ! # CONFIG_MTD_MIXMEM is not set # CONFIG_MTD_NORA is not set - # CONFIG_MTD_OCTAGON is not set # CONFIG_MTD_PNC2000 is not set # CONFIG_MTD_RPXLITE is not set # CONFIG_MTD_VMAX is not set # ! # User modules and translation layers for MTD devices # ! CONFIG_MTD_CHAR=y ! # CONFIG_MTD_BLOCK is not set ! # CONFIG_FTL is not set ! # CONFIG_NFTL is not set # # Parallel port support # --- 101,180 ---- CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set ! # CONFIG_MTD_PARTITIONS is not set ! # CONFIG_MTD_REDBOOT_PARTS is not set ! # CONFIG_MTD_BOOTLDR_PARTS is not set # ! # User Modules And Translation Layers # ! CONFIG_MTD_CHAR=y ! # CONFIG_MTD_BLOCK is not set ! # CONFIG_MTD_BLOCK_RO is not set ! # CONFIG_FTL is not set ! # CONFIG_NFTL is not set # ! # RAM/ROM/Flash chip drivers # CONFIG_MTD_CFI=y + # CONFIG_MTD_CFI_VIRTUAL_ER is not set + # CONFIG_MTD_CFI_ADV_OPTIONS is not set CONFIG_MTD_CFI_INTELEXT=y # CONFIG_MTD_CFI_AMDSTD is not set + # CONFIG_MTD_AMDSTD is not set + # CONFIG_MTD_SHARP is not set # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set # CONFIG_MTD_JEDEC is not set + + # + # Mapping drivers for chip access + # CONFIG_MTD_PHYSMAP=y CONFIG_MTD_PHYSMAP_START=8000000 CONFIG_MTD_PHYSMAP_LEN=2000000 CONFIG_MTD_PHYSMAP_BUSWIDTH=4 ! # CONFIG_MTD_SUN_UFLASH is not set # CONFIG_MTD_NORA is not set # CONFIG_MTD_PNC2000 is not set # CONFIG_MTD_RPXLITE is not set + # CONFIG_MTD_SC520CDP is not set + # CONFIG_MTD_NETSC520 is not set + # CONFIG_MTD_SBC_GXX is not set + # CONFIG_MTD_ELAN_104NC is not set + # CONFIG_MTD_SA1100 is not set + # CONFIG_MTD_SA1100_REDBOOT_PARTITIONS is not set + # CONFIG_MTD_SA1100_BOOTLDR_PARTITIONS is not set + # CONFIG_MTD_DC21285 is not set + # CONFIG_MTD_IQ80310 is not set + # CONFIG_MTD_DBOX2 is not set + # CONFIG_MTD_CSTM_MIPS_IXX is not set + # CONFIG_MTD_CFI_FLAGADM is not set + # CONFIG_MTD_MIXMEM is not set + # CONFIG_MTD_OCTAGON is not set # CONFIG_MTD_VMAX is not set + # CONFIG_MTD_OCELOT is not set # ! # Self-contained MTD device drivers # ! # CONFIG_MTD_PMC551 is not set ! # CONFIG_MTD_SLRAM is not set ! # CONFIG_MTD_MTDRAM is not set ! ! # ! # Disk-On-Chip Device Drivers ! # ! # CONFIG_MTD_DOC1000 is not set ! # CONFIG_MTD_DOC2000 is not set ! # CONFIG_MTD_DOC2001 is not set ! # CONFIG_MTD_DOCPROBE is not set # + # NAND Flash Device Drivers + # + # CONFIG_MTD_NAND is not set + + # # Parallel port support # *************** *** 344,348 **** # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - # CONFIG_NET_SB1000 is not set # --- 371,374 ---- *************** *** 350,359 **** # CONFIG_NET_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set - # CONFIG_AT1700 is not set - # CONFIG_DEPCA is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set --- 376,390 ---- # CONFIG_NET_ETHERNET=y + # CONFIG_ARM_AM79C961A is not set + # CONFIG_SUNLANCE is not set + # CONFIG_HAPPYMEAL is not set + # CONFIG_SUNBMAC is not set + # CONFIG_SUNQE is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set *************** *** 364,372 **** # CONFIG_CS89x0 is not set CONFIG_TULIP=y # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set - # CONFIG_EEPRO100_PM is not set # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set --- 395,404 ---- # CONFIG_CS89x0 is not set CONFIG_TULIP=y + # CONFIG_TULIP_MWI is not set + # CONFIG_TULIP_MMIO is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set *************** *** 385,389 **** # CONFIG_VIA_RHINE is not set # CONFIG_WINBOND_840 is not set - # CONFIG_HAPPYMEAL is not set # CONFIG_LAN_SAA9730 is not set # CONFIG_NET_POCKET is not set --- 417,420 ---- *************** *** 393,396 **** --- 424,429 ---- # # CONFIG_ACENIC is not set + # CONFIG_ACENIC_OMIT_TIGON_I is not set + # CONFIG_MYRI_SBUS is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set *************** *** 398,401 **** --- 431,435 ---- # CONFIG_FDDI is not set # CONFIG_HIPPI is not set + # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set *************** *** 538,542 **** CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set - # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set --- 572,575 ---- |
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From: James S. <jsi...@us...> - 2001-08-22 16:39:23
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv7033 Modified Files: defconfig-ip22 Log Message: Synced to Ralph's tree Index: defconfig-ip22 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ip22,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** defconfig-ip22 2001/08/16 16:58:30 1.3 --- defconfig-ip22 2001/08/22 16:39:20 1.4 *************** *** 263,267 **** # CONFIG_TUN is not set # CONFIG_ETHERTAP is not set - # CONFIG_NET_SB1000 is not set # --- 263,266 ---- *************** *** 269,278 **** # CONFIG_NET_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set - # CONFIG_AT1700 is not set - # CONFIG_DEPCA is not set # CONFIG_NET_ISA is not set # CONFIG_NET_PCI is not set --- 268,281 ---- # CONFIG_NET_ETHERNET=y + # CONFIG_ARM_AM79C961A is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNBMAC is not set + # CONFIG_SUNQE is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_NET_ISA is not set # CONFIG_NET_PCI is not set *************** *** 284,287 **** --- 287,292 ---- # # CONFIG_ACENIC is not set + # CONFIG_ACENIC_OMIT_TIGON_I is not set + # CONFIG_MYRI_SBUS is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set *************** *** 289,292 **** --- 294,298 ---- # CONFIG_FDDI is not set # CONFIG_HIPPI is not set + # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set *************** *** 435,439 **** CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set - # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set --- 441,444 ---- |
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From: James S. <jsi...@us...> - 2001-08-22 16:38:54
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv6936 Modified Files: defconfig-eagle Log Message: Synced to Ralph's tree Index: defconfig-eagle =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-eagle,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** defconfig-eagle 2001/08/16 16:58:30 1.3 --- defconfig-eagle 2001/08/22 16:38:52 1.4 *************** *** 214,217 **** --- 214,218 ---- # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set + # CONFIG_ETHERTAP is not set # CONFIG_NET_SB1000 is not set *************** *** 220,223 **** --- 221,230 ---- # CONFIG_NET_ETHERNET=y + # CONFIG_ARM_AM79C961A is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNBMAC is not set + # CONFIG_SUNQE is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set *************** *** 260,263 **** --- 267,272 ---- # # CONFIG_ACENIC is not set + # CONFIG_ACENIC_OMIT_TIGON_I is not set + # CONFIG_MYRI_SBUS is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set *************** *** 265,268 **** --- 274,278 ---- # CONFIG_FDDI is not set # CONFIG_HIPPI is not set + # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set |
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From: James S. <jsi...@us...> - 2001-08-22 16:36:31
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv5915 Modified Files: defconfig-cobalt Log Message: Synced to Ralph's tree Index: defconfig-cobalt =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-cobalt,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** defconfig-cobalt 2001/08/16 16:58:30 1.4 --- defconfig-cobalt 2001/08/22 16:36:28 1.5 *************** *** 281,284 **** --- 281,290 ---- # CONFIG_NET_ETHERNET=y + # CONFIG_ARM_AM79C961A is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNBMAC is not set + # CONFIG_SUNQE is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set *************** *** 324,327 **** --- 330,335 ---- # # CONFIG_ACENIC is not set + # CONFIG_ACENIC_OMIT_TIGON_I is not set + # CONFIG_MYRI_SBUS is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set *************** *** 329,332 **** --- 337,341 ---- # CONFIG_FDDI is not set # CONFIG_HIPPI is not set + # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set |
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From: James S. <jsi...@us...> - 2001-08-22 16:32:44
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv3912 Modified Files: defconfig-ev64120 Log Message: Synced to Ralph's tree Index: defconfig-ev64120 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ev64120,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** defconfig-ev64120 2001/08/16 16:58:30 1.3 --- defconfig-ev64120 2001/08/22 16:32:41 1.4 *************** *** 216,220 **** # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - # CONFIG_NET_SB1000 is not set # --- 216,219 ---- *************** *** 222,231 **** # CONFIG_NET_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set - # CONFIG_AT1700 is not set - # CONFIG_DEPCA is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set --- 221,235 ---- # CONFIG_NET_ETHERNET=y + # CONFIG_ARM_AM79C961A is not set + # CONFIG_SUNLANCE is not set + # CONFIG_HAPPYMEAL is not set + # CONFIG_SUNBMAC is not set + # CONFIG_SUNQE is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set *************** *** 236,244 **** # CONFIG_CS89x0 is not set # CONFIG_TULIP is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set - # CONFIG_EEPRO100_PM is not set # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set --- 240,249 ---- # CONFIG_CS89x0 is not set # CONFIG_TULIP is not set + # CONFIG_TULIP_MWI is not set + # CONFIG_TULIP_MMIO is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set *************** *** 257,261 **** # CONFIG_VIA_RHINE is not set # CONFIG_WINBOND_840 is not set - # CONFIG_HAPPYMEAL is not set # CONFIG_LAN_SAA9730 is not set # CONFIG_NET_POCKET is not set --- 262,265 ---- *************** *** 265,268 **** --- 269,274 ---- # # CONFIG_ACENIC is not set + # CONFIG_ACENIC_OMIT_TIGON_I is not set + # CONFIG_MYRI_SBUS is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set *************** *** 270,273 **** --- 276,280 ---- # CONFIG_FDDI is not set # CONFIG_HIPPI is not set + # CONFIG_PLIP is not set CONFIG_PPP=y # CONFIG_PPP_MULTILINK is not set *************** *** 412,416 **** CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set - # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set --- 419,422 ---- |
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From: James S. <jsi...@us...> - 2001-08-22 16:32:06
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv3759 Modified Files: defconfig-ev96100 Log Message: Synced to Ralph's tree Index: defconfig-ev96100 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ev96100,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** defconfig-ev96100 2001/08/20 16:11:46 1.4 --- defconfig-ev96100 2001/08/22 16:32:04 1.5 *************** *** 213,217 **** # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - # CONFIG_NET_SB1000 is not set # --- 213,216 ---- *************** *** 219,229 **** # CONFIG_NET_ETHERNET=y CONFIG_MIPS_GT96100ETH=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set - # CONFIG_AT1700 is not set - # CONFIG_DEPCA is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set --- 218,233 ---- # CONFIG_NET_ETHERNET=y + # CONFIG_ARM_AM79C961A is not set CONFIG_MIPS_GT96100ETH=y + # CONFIG_SUNLANCE is not set + # CONFIG_HAPPYMEAL is not set + # CONFIG_SUNBMAC is not set + # CONFIG_SUNQE is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set *************** *** 234,242 **** # CONFIG_CS89x0 is not set CONFIG_TULIP=y # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set - # CONFIG_EEPRO100_PM is not set # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set --- 238,247 ---- # CONFIG_CS89x0 is not set CONFIG_TULIP=y + # CONFIG_TULIP_MWI is not set + # CONFIG_TULIP_MMIO is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set *************** *** 255,259 **** # CONFIG_VIA_RHINE is not set # CONFIG_WINBOND_840 is not set - # CONFIG_HAPPYMEAL is not set # CONFIG_LAN_SAA9730 is not set # CONFIG_NET_POCKET is not set --- 260,263 ---- *************** *** 263,266 **** --- 267,272 ---- # # CONFIG_ACENIC is not set + # CONFIG_ACENIC_OMIT_TIGON_I is not set + # CONFIG_MYRI_SBUS is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set *************** *** 268,271 **** --- 274,278 ---- # CONFIG_FDDI is not set # CONFIG_HIPPI is not set + # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set *************** *** 403,407 **** CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set - # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set --- 410,413 ---- |
|
From: James S. <jsi...@us...> - 2001-08-22 16:31:22
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv3383 Modified Files: defconfig-decstation Log Message: Synced to Ralph's tree Index: defconfig-decstation =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-decstation,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** defconfig-decstation 2001/08/16 16:58:30 1.3 --- defconfig-decstation 2001/08/22 16:31:16 1.4 *************** *** 249,253 **** # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - # CONFIG_NET_SB1000 is not set # --- 249,252 ---- *************** *** 255,264 **** # CONFIG_NET_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set - # CONFIG_AT1700 is not set - # CONFIG_DEPCA is not set # CONFIG_NET_ISA is not set # CONFIG_NET_PCI is not set --- 254,267 ---- # CONFIG_NET_ETHERNET=y + # CONFIG_ARM_AM79C961A is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNBMAC is not set + # CONFIG_SUNQE is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_NET_ISA is not set # CONFIG_NET_PCI is not set *************** *** 270,273 **** --- 273,278 ---- # # CONFIG_ACENIC is not set + # CONFIG_ACENIC_OMIT_TIGON_I is not set + # CONFIG_MYRI_SBUS is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set *************** *** 275,278 **** --- 280,284 ---- # CONFIG_FDDI is not set # CONFIG_HIPPI is not set + # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set *************** *** 422,426 **** CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set - # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set --- 428,431 ---- |
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From: James S. <jsi...@us...> - 2001-08-22 16:30:44
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv3105 Modified Files: defconfig-ddb5477 Log Message: Synced to Ralph's tree Index: defconfig-ddb5477 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ddb5477,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** defconfig-ddb5477 2001/08/16 16:58:30 1.3 --- defconfig-ddb5477 2001/08/22 16:30:40 1.4 *************** *** 209,213 **** # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - # CONFIG_NET_SB1000 is not set # --- 209,212 ---- *************** *** 215,224 **** # CONFIG_NET_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set - # CONFIG_AT1700 is not set - # CONFIG_DEPCA is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set --- 214,228 ---- # CONFIG_NET_ETHERNET=y + # CONFIG_ARM_AM79C961A is not set + # CONFIG_SUNLANCE is not set + # CONFIG_HAPPYMEAL is not set + # CONFIG_SUNBMAC is not set + # CONFIG_SUNQE is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set *************** *** 229,237 **** # CONFIG_CS89x0 is not set CONFIG_TULIP=y # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set - # CONFIG_EEPRO100_PM is not set # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set --- 233,242 ---- # CONFIG_CS89x0 is not set CONFIG_TULIP=y + # CONFIG_TULIP_MWI is not set + # CONFIG_TULIP_MMIO is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set *************** *** 250,254 **** # CONFIG_VIA_RHINE is not set # CONFIG_WINBOND_840 is not set - # CONFIG_HAPPYMEAL is not set # CONFIG_LAN_SAA9730 is not set # CONFIG_NET_POCKET is not set --- 255,258 ---- *************** *** 258,261 **** --- 262,267 ---- # # CONFIG_ACENIC is not set + # CONFIG_ACENIC_OMIT_TIGON_I is not set + # CONFIG_MYRI_SBUS is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set *************** *** 263,266 **** --- 269,273 ---- # CONFIG_FDDI is not set # CONFIG_HIPPI is not set + # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set *************** *** 397,401 **** CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set - # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set --- 404,407 ---- |
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From: James S. <jsi...@us...> - 2001-08-22 16:30:11
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv2839 Modified Files: defconfig-ddb5476 Log Message: Synced to Ralph's tree Index: defconfig-ddb5476 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ddb5476,v retrieving revision 1.5 retrieving revision 1.6 diff -C2 -d -r1.5 -r1.6 *** defconfig-ddb5476 2001/08/20 17:41:19 1.5 --- defconfig-ddb5476 2001/08/22 16:30:07 1.6 *************** *** 45,48 **** --- 45,49 ---- CONFIG_NEW_TIME_C=y CONFIG_EISA=y + # CONFIG_I8259 is not set # *************** *** 285,289 **** # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - # CONFIG_NET_SB1000 is not set # --- 286,289 ---- *************** *** 291,294 **** --- 291,301 ---- # CONFIG_NET_ETHERNET=y + # CONFIG_ARM_AM79C961A is not set + # CONFIG_SUNLANCE is not set + # CONFIG_HAPPYMEAL is not set + # CONFIG_SUNBMAC is not set + # CONFIG_SUNQE is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set *************** *** 306,314 **** # CONFIG_CS89x0 is not set CONFIG_TULIP=y # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set CONFIG_EEPRO100=y - # CONFIG_EEPRO100_PM is not set # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set --- 313,322 ---- # CONFIG_CS89x0 is not set CONFIG_TULIP=y + # CONFIG_TULIP_MWI is not set + # CONFIG_TULIP_MMIO is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set CONFIG_EEPRO100=y # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set *************** *** 328,332 **** # CONFIG_VIA_RHINE is not set # CONFIG_WINBOND_840 is not set - # CONFIG_HAPPYMEAL is not set # CONFIG_LAN_SAA9730 is not set # CONFIG_NET_POCKET is not set --- 336,339 ---- *************** *** 336,339 **** --- 343,348 ---- # # CONFIG_ACENIC is not set + # CONFIG_ACENIC_OMIT_TIGON_I is not set + # CONFIG_MYRI_SBUS is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set *************** *** 341,344 **** --- 350,354 ---- # CONFIG_FDDI is not set # CONFIG_HIPPI is not set + # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set *************** *** 480,484 **** CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set - # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set --- 490,493 ---- *************** *** 520,524 **** # # CONFIG_VGA_CONSOLE is not set ! CONFIG_FB=y # --- 529,533 ---- # # CONFIG_VGA_CONSOLE is not set ! # CONFIG_MDA_CONSOLE is not set # |
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From: James S. <jsi...@us...> - 2001-08-22 16:25:04
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv32112 Modified Files: defconfig-atlas Log Message: Synced to Ralph's tree Index: defconfig-atlas =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-atlas,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** defconfig-atlas 2001/08/16 16:58:30 1.3 --- defconfig-atlas 2001/08/22 16:25:01 1.4 *************** *** 273,277 **** # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - # CONFIG_NET_SB1000 is not set # --- 273,276 ---- *************** *** 279,288 **** # CONFIG_NET_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set - # CONFIG_AT1700 is not set - # CONFIG_DEPCA is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set --- 278,292 ---- # CONFIG_NET_ETHERNET=y + # CONFIG_ARM_AM79C961A is not set + # CONFIG_SUNLANCE is not set + # CONFIG_HAPPYMEAL is not set + # CONFIG_SUNBMAC is not set + # CONFIG_SUNQE is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set *************** *** 294,297 **** --- 298,303 ---- # # CONFIG_ACENIC is not set + # CONFIG_ACENIC_OMIT_TIGON_I is not set + # CONFIG_MYRI_SBUS is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set *************** *** 299,302 **** --- 305,309 ---- # CONFIG_FDDI is not set # CONFIG_HIPPI is not set + # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set *************** *** 434,438 **** CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set - # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set --- 441,444 ---- |
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From: James S. <jsi...@us...> - 2001-08-22 16:23:40
|
Update of /cvsroot/linux-mips/linux/arch/mips In directory usw-pr-cvs1:/tmp/cvs-serv31361 Modified Files: defconfig Log Message: Synced to Ralph's tree Index: defconfig =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/defconfig,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** defconfig 2001/08/16 16:51:27 1.4 --- defconfig 2001/08/22 16:23:37 1.5 *************** *** 263,267 **** # CONFIG_TUN is not set # CONFIG_ETHERTAP is not set - # CONFIG_NET_SB1000 is not set # --- 263,266 ---- *************** *** 269,278 **** # CONFIG_NET_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set - # CONFIG_AT1700 is not set - # CONFIG_DEPCA is not set # CONFIG_NET_ISA is not set # CONFIG_NET_PCI is not set --- 268,281 ---- # CONFIG_NET_ETHERNET=y + # CONFIG_ARM_AM79C961A is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNBMAC is not set + # CONFIG_SUNQE is not set + # CONFIG_SUNLANCE is not set + # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_NET_ISA is not set # CONFIG_NET_PCI is not set *************** *** 284,287 **** --- 287,292 ---- # # CONFIG_ACENIC is not set + # CONFIG_ACENIC_OMIT_TIGON_I is not set + # CONFIG_MYRI_SBUS is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set *************** *** 289,292 **** --- 294,298 ---- # CONFIG_FDDI is not set # CONFIG_HIPPI is not set + # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set *************** *** 435,439 **** CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set - # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set --- 441,444 ---- |
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From: Bradley D. L. <br...@us...> - 2001-08-22 14:42:27
|
Update of /cvsroot/linux-mips/linux/include/asm-mips/ddb5xxx In directory usw-pr-cvs1:/tmp/cvs-serv12382/include/asm-mips/ddb5xxx Modified Files: ddb5477.h Log Message: Add local bus register definitions (already in oss). Index: ddb5477.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/ddb5xxx/ddb5477.h,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -C2 -d -r1.1.1.1 -r1.2 *** ddb5477.h 2001/06/22 02:29:33 1.1.1.1 --- ddb5477.h 2001/08/22 14:42:24 1.2 *************** *** 145,148 **** --- 145,165 ---- /* + * Local Bus + */ + #define DDB_LCST0 0x0110 /* LB Chip Select Timing 0 */ + #define DDB_LCST1 0x0118 /* LB Chip Select Timing 1 */ + #undef DDB_LCST2 + #define DDB_LCST2 0x0120 /* LB Chip Select Timing 2 */ + #undef DDB_LCST3 + #undef DDB_LCST4 + #undef DDB_LCST5 + #undef DDB_LCST6 + #undef DDB_LCST7 + #undef DDB_LCST8 + #define DDB_ERRADR 0x0150 /* Error Address Register */ + #define DDB_ERRCS 0x0160 + #define DDB_BTM 0x0170 /* Boot Time Mode value */ + + /* * MISC registers */ |
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From: Jun S. <ju...@us...> - 2001-08-22 05:31:30
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv27237/arch/mips/kernel Modified Files: head.S Log Message: Missing CONFIG_MIPS_AU1000 around vec0_au1000, which causes a complain about missing translate_pte. Index: head.S =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/head.S,v retrieving revision 1.5 retrieving revision 1.6 diff -C2 -d -r1.5 -r1.6 *** head.S 2001/08/18 18:04:54 1.5 --- head.S 2001/08/22 05:31:27 1.6 *************** *** 97,100 **** --- 97,101 ---- END(except_vec0_r4000) + #ifdef CONFIG_MIPS_AU1000 /* TLB refill, EXL == 0, Au1000 version */ /* we'll worry about smp later */ *************** *** 116,119 **** --- 117,121 ---- nop END(except_vec0_au1000) + #endif /* TLB refill, EXL == 0, R4600 version */ |
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From: Pete P. <pp...@us...> - 2001-08-22 00:39:57
|
Update of /cvsroot/linux-mips/linux/arch/mips/galileo-boards/ev96100
In directory usw-pr-cvs1:/tmp/cvs-serv3463/arch/mips/galileo-boards/ev96100
Modified Files:
time.c
Log Message:
ev96100 timer update bug fix.
Index: time.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/galileo-boards/ev96100/time.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** time.c 2001/07/06 01:25:33 1.2
--- time.c 2001/08/22 00:39:54 1.3
***************
*** 261,264 ****
--- 261,268 ----
do {
+ count = read_32bit_cp0_register(CP0_COUNT);
+ timerhi += (count < timerlo); /* Wrap around */
+ timerlo = count;
+
kstat.irqs[0][irq]++;
do_timer(regs);
|
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From: Pete P. <pp...@us...> - 2001-08-22 00:33:57
|
Update of /cvsroot/linux-mips/linux/drivers/net
In directory usw-pr-cvs1:/tmp/cvs-serv2570/drivers/net
Modified Files:
gt96100eth.c gt96100eth.h
Log Message:
Latest gt96100 ethernet driver.
Index: gt96100eth.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/net/gt96100eth.c,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -C2 -d -r1.1.1.1 -r1.2
*** gt96100eth.c 2001/06/22 02:29:32 1.1.1.1
--- gt96100eth.c 2001/08/22 00:33:54 1.2
***************
*** 25,28 ****
--- 25,34 ----
*/
+ #ifndef __OPTIMIZE__
+ #error You must compile this file with the correct options!
+ #error See the last lines of the source file.
+ #error You must compile this driver with "-O".
+ #endif
+
#ifndef __mips__
[...2737 lines suppressed...]
! spin_unlock_irqrestore(&gp->lock, flags);
}
! static struct net_device_stats *
! gt96100_get_stats(struct net_device *dev)
{
! struct gt96100_private *gp = (struct gt96100_private *)dev->priv;
! unsigned long flags;
! if (gt96100_debug > 3)
! printk("%s: gt96100_get_stats: dev=%p\n", dev->name, dev);
! if (netif_device_present(dev)) {
! spin_lock_irqsave (&gp->lock, flags);
! update_stats(gp);
! spin_unlock_irqrestore (&gp->lock, flags);
! }
! return &gp->stats;
}
Index: gt96100eth.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/net/gt96100eth.h,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -C2 -d -r1.1.1.1 -r1.2
*** gt96100eth.h 2001/06/22 02:29:32 1.1.1.1
--- gt96100eth.h 2001/08/22 00:33:54 1.2
***************
*** 33,37 ****
#define TX_RING_SIZE 16
#define RX_RING_SIZE 32
! #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */
#define RX_HASH_TABLE_SIZE 16384
--- 33,37 ----
#define TX_RING_SIZE 16
#define RX_RING_SIZE 32
! #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
#define RX_HASH_TABLE_SIZE 16384
***************
*** 40,44 ****
#define NUM_INTERFACES 2
! #define GT96100ETH_TX_TIMEOUT HZ
#define GT96100_ETH0_BASE (MIPS_GT96100_BASE + GT96100_ETH_PORT_CONFIG)
--- 40,44 ----
#define NUM_INTERFACES 2
! #define GT96100ETH_TX_TIMEOUT HZ/4
#define GT96100_ETH0_BASE (MIPS_GT96100_BASE + GT96100_ETH_PORT_CONFIG)
***************
*** 53,56 ****
--- 53,59 ----
#endif
+ #define REV_GT96100 1
+ #define REV_GT96100A 3
+
#define GT96100ETH_READ(gp, offset) \
GT96100_READ((gp->port_offset + offset))
***************
*** 70,127 ****
/* Bit definitions of the SMI Reg */
enum {
! smirDataMask = 0xffff,
! smirPhyAdMask = 0x1f << 16,
! smirPhyAdBit = 16,
! smirRegAdMask = 0x1f << 21,
! smirRegAdBit = 21,
! smirOpCode = 1 << 26,
! smirReadValid = 1 << 27,
! smirBusy = 1 << 28
};
/* Bit definitions of the Port Config Reg */
enum pcr_bits {
! pcrPM = 1,
! pcrRBM = 2,
! pcrPBF = 4,
! pcrEN = 1 << 7,
! pcrLPBKMask = 0x3 << 8,
! pcrLPBKBit = 8,
! pcrFC = 1 << 10,
! pcrHS = 1 << 12,
! pcrHM = 1 << 13,
! pcrHDM = 1 << 14,
! pcrHD = 1 << 15,
! pcrISLMask = 0x7 << 28,
! pcrISLBit = 28,
! pcrACCS = 1 << 31
};
/* Bit definitions of the Port Config Extend Reg */
enum pcxr_bits {
! pcxrIGMP = 1,
! pcxrSPAN = 2,
! pcxrPAR = 4,
! pcxrPRIOtxMask = 0x7 << 3,
! pcxrPRIOtxBit = 3,
! pcxrPRIOrxMask = 0x3 << 6,
! pcxrPRIOrxBit = 6,
! pcxrPRIOrxOverride = 1 << 8,
! pcxrDPLXen = 1 << 9,
! pcxrFCTLen = 1 << 10,
! pcxrFLP = 1 << 11,
! pcxrFCTL = 1 << 12,
! pcxrMFLMask = 0x3 << 14,
! pcxrMFLBit = 14,
! pcxrMIBclrMode = 1 << 16,
! pcxrSpeed = 1 << 18,
! pcxrSpeeden = 1 << 19,
! pcxrRMIIen = 1 << 20,
! pcxrDSCPen = 1 << 21
};
/* Bit definitions of the Port Command Reg */
enum pcmr_bits {
! pcmrFJ = 1 << 15
};
--- 73,130 ----
/* Bit definitions of the SMI Reg */
enum {
! smirDataMask = 0xffff,
! smirPhyAdMask = 0x1f<<16,
! smirPhyAdBit = 16,
! smirRegAdMask = 0x1f<<21,
! smirRegAdBit = 21,
! smirOpCode = 1<<26,
! smirReadValid = 1<<27,
! smirBusy = 1<<28
};
/* Bit definitions of the Port Config Reg */
enum pcr_bits {
! pcrPM = 1,
! pcrRBM = 2,
! pcrPBF = 4,
! pcrEN = 1<<7,
! pcrLPBKMask = 0x3<<8,
! pcrLPBKBit = 8,
! pcrFC = 1<<10,
! pcrHS = 1<<12,
! pcrHM = 1<<13,
! pcrHDM = 1<<14,
! pcrHD = 1<<15,
! pcrISLMask = 0x7<<28,
! pcrISLBit = 28,
! pcrACCS = 1<<31
};
/* Bit definitions of the Port Config Extend Reg */
enum pcxr_bits {
! pcxrIGMP = 1,
! pcxrSPAN = 2,
! pcxrPAR = 4,
! pcxrPRIOtxMask = 0x7<<3,
! pcxrPRIOtxBit = 3,
! pcxrPRIOrxMask = 0x3<<6,
! pcxrPRIOrxBit = 6,
! pcxrPRIOrxOverride = 1<<8,
! pcxrDPLXen = 1<<9,
! pcxrFCTLen = 1<<10,
! pcxrFLP = 1<<11,
! pcxrFCTL = 1<<12,
! pcxrMFLMask = 0x3<<14,
! pcxrMFLBit = 14,
! pcxrMIBclrMode = 1<<16,
! pcxrSpeed = 1<<18,
! pcxrSpeeden = 1<<19,
! pcxrRMIIen = 1<<20,
! pcxrDSCPen = 1<<21
};
/* Bit definitions of the Port Command Reg */
enum pcmr_bits {
! pcmrFJ = 1<<15
};
***************
*** 129,324 ****
/* Bit definitions of the Port Status Reg */
enum psr_bits {
! psrSpeed = 1,
! psrDuplex = 2,
! psrFctl = 4,
! psrLink = 8,
! psrPause = 1 << 4,
! psrTxLow = 1 << 5,
! psrTxHigh = 1 << 6,
! psrTxInProg = 1 << 7
};
/* Bit definitions of the SDMA Config Reg */
enum sdcr_bits {
! sdcrRCMask = 0xf << 2,
! sdcrRCBit = 2,
! sdcrBLMR = 1 << 6,
! sdcrBLMT = 1 << 7,
! sdcrPOVR = 1 << 8,
! sdcrRIFB = 1 << 9,
! sdcrBSZMask = 0x3 << 12,
! sdcrBSZBit = 12
};
/* Bit definitions of the SDMA Command Reg */
enum sdcmr_bits {
! sdcmrERD = 1 << 7,
! sdcmrAR = 1 << 15,
! sdcmrSTDH = 1 << 16,
! sdcmrSTDL = 1 << 17,
! sdcmrTXDH = 1 << 23,
! sdcmrTXDL = 1 << 24,
! sdcmrAT = 1 << 31
};
/* Bit definitions of the Interrupt Cause Reg */
enum icr_bits {
! icrRxBuffer = 1,
! icrTxBufferHigh = 1 << 2,
! icrTxBufferLow = 1 << 3,
! icrTxEndHigh = 1 << 6,
! icrTxEndLow = 1 << 7,
! icrRxError = 1 << 8,
! icrTxErrorHigh = 1 << 10,
! icrTxErrorLow = 1 << 11,
! icrRxOVR = 1 << 12,
! icrTxUdr = 1 << 13,
! icrRxBufferQ0 = 1 << 16,
! icrRxBufferQ1 = 1 << 17,
! icrRxBufferQ2 = 1 << 18,
! icrRxBufferQ3 = 1 << 19,
! icrRxErrorQ0 = 1 << 20,
! icrRxErrorQ1 = 1 << 21,
! icrRxErrorQ2 = 1 << 22,
! icrRxErrorQ3 = 1 << 23,
! icrMIIPhySTC = 1 << 28,
! icrSMIdone = 1 << 29,
! icrEtherIntSum = 1 << 31
};
/* The Rx and Tx descriptor lists. */
-
typedef struct {
! u32 cmdstat;
! u32 byte_cnt;
! u32 buff_ptr;
! u32 next;
! } gt96100_td_t;
!
! #define tdByteCntBit 16
typedef struct {
! u32 cmdstat;
! u32 buff_cnt_sz;
! u32 buff_ptr;
! u32 next;
! } gt96100_rd_t;
!
! #define rdBuffSzBit 16
! #define rdByteCntMask 0xffff
/* Values for the Tx command-status descriptor entry. */
enum td_cmdstat {
! txOwn = 1 << 31,
! txAutoMode = 1 << 30,
! txEI = 1 << 23,
! txGenCRC = 1 << 22,
! txPad = 1 << 18,
! txFirst = 1 << 17,
! txLast = 1 << 16,
! txErrorSummary = 1 << 15,
! txReTxCntMask = 0x0f << 10,
! txReTxCntBit = 10,
! txCollision = 1 << 9,
! txReTxLimit = 1 << 8,
! txUnderrun = 1 << 6,
! txLateCollision = 1 << 5
};
- #define TxReTxCntBit 10
/* Values for the Rx command-status descriptor entry. */
enum rd_cmdstat {
! rxOwn = 1 << 31,
! rxAutoMode = 1 << 30,
! rxEI = 1 << 23,
! rxFirst = 1 << 17,
! rxLast = 1 << 16,
! rxErrorSummary = 1 << 15,
! rxIGMP = 1 << 14,
! rxHashExpired = 1 << 13,
! rxMissedFrame = 1 << 12,
! rxFrameType = 1 << 11,
! rxShortFrame = 1 << 8,
! rxMaxFrameLen = 1 << 7,
! rxOverrun = 1 << 6,
! rxCollision = 1 << 4,
! rxCRCError = 1
};
/* Bit fields of a Hash Table Entry */
enum hash_table_entry {
! hteValid = 1,
! hteSkip = 2,
! hteRD = 4
};
// The MIB counters
typedef struct {
! u32 byteReceived;
! u32 byteSent;
! u32 framesReceived;
! u32 framesSent;
! u32 totalByteReceived;
! u32 totalFramesReceived;
! u32 broadcastFramesReceived;
! u32 multicastFramesReceived;
! u32 cRCError;
! u32 oversizeFrames;
! u32 fragments;
! u32 jabber;
! u32 collision;
! u32 lateCollision;
! u32 frames64;
! u32 frames65_127;
! u32 frames128_255;
! u32 frames256_511;
! u32 frames512_1023;
! u32 frames1024_MaxSize;
! u32 macRxError;
! u32 droppedFrames;
! u32 outMulticastFrames;
! u32 outBroadcastFrames;
! u32 undersizeFrames;
} mib_counters_t;
struct gt96100_private {
! gt96100_rd_t *rx_ring;
! gt96100_td_t *tx_ring;
! // The Rx and Tx rings must be 16-byte aligned
! dma_addr_t rx_ring_dma;
! dma_addr_t tx_ring_dma;
! char *hash_table;
! // The Hash Table must be 8-byte aligned
! dma_addr_t hash_table_dma;
! int hash_mode;
!
! // The Rx buffers must be 8-byte aligned
! char *rx_buff[RX_RING_SIZE];
! // Tx buffers (tx_skbuff[i]->data) with less than 8 bytes
! // of payload must be 8-byte aligned
! struct sk_buff *tx_skbuff[TX_RING_SIZE];
! int rx_next_out; /* The next free ring entry to receive */
! int tx_next_in; /* The next free ring entry to send */
! int tx_next_out; /* The last ring entry the ISR processed */
! int tx_count; /* current # of pkts waiting to be sent in Tx ring */
!
! mib_counters_t mib;
! struct net_device_stats stats;
!
! int io_size;
! int port_num; // 0 or 1
! u32 port_offset;
! int phy_addr; // PHY address
! u32 last_psr; // last value of the port status register
! int options; /* User-settable misc. driver options. */
! int drv_flags;
! unsigned char phys[2]; /* MII device addresses. */
! spinlock_t lock; /* Serialise access to device */
};
--- 132,335 ----
/* Bit definitions of the Port Status Reg */
enum psr_bits {
! psrSpeed = 1,
! psrDuplex = 2,
! psrFctl = 4,
! psrLink = 8,
! psrPause = 1<<4,
! psrTxLow = 1<<5,
! psrTxHigh = 1<<6,
! psrTxInProg = 1<<7
};
/* Bit definitions of the SDMA Config Reg */
enum sdcr_bits {
! sdcrRCMask = 0xf<<2,
! sdcrRCBit = 2,
! sdcrBLMR = 1<<6,
! sdcrBLMT = 1<<7,
! sdcrPOVR = 1<<8,
! sdcrRIFB = 1<<9,
! sdcrBSZMask = 0x3<<12,
! sdcrBSZBit = 12
};
/* Bit definitions of the SDMA Command Reg */
enum sdcmr_bits {
! sdcmrERD = 1<<7,
! sdcmrAR = 1<<15,
! sdcmrSTDH = 1<<16,
! sdcmrSTDL = 1<<17,
! sdcmrTXDH = 1<<23,
! sdcmrTXDL = 1<<24,
! sdcmrAT = 1<<31
};
/* Bit definitions of the Interrupt Cause Reg */
enum icr_bits {
! icrRxBuffer = 1,
! icrTxBufferHigh = 1<<2,
! icrTxBufferLow = 1<<3,
! icrTxEndHigh = 1<<6,
! icrTxEndLow = 1<<7,
! icrRxError = 1<<8,
! icrTxErrorHigh = 1<<10,
! icrTxErrorLow = 1<<11,
! icrRxOVR = 1<<12,
! icrTxUdr = 1<<13,
! icrRxBufferQ0 = 1<<16,
! icrRxBufferQ1 = 1<<17,
! icrRxBufferQ2 = 1<<18,
! icrRxBufferQ3 = 1<<19,
! icrRxErrorQ0 = 1<<20,
! icrRxErrorQ1 = 1<<21,
! icrRxErrorQ2 = 1<<22,
! icrRxErrorQ3 = 1<<23,
! icrMIIPhySTC = 1<<28,
! icrSMIdone = 1<<29,
! icrEtherIntSum = 1<<31
};
/* The Rx and Tx descriptor lists. */
typedef struct {
! #ifdef DESC_BE
! u16 byte_cnt;
! u16 reserved;
! #else
! u16 reserved;
! u16 byte_cnt;
! #endif
! u32 cmdstat;
! u32 next;
! u32 buff_ptr;
! } gt96100_td_t __attribute__ ((packed));
typedef struct {
! #ifdef DESC_BE
! u16 buff_sz;
! u16 byte_cnt;
! #else
! u16 byte_cnt;
! u16 buff_sz;
! #endif
! u32 cmdstat;
! u32 next;
! u32 buff_ptr;
! } gt96100_rd_t __attribute__ ((packed));
/* Values for the Tx command-status descriptor entry. */
enum td_cmdstat {
! txOwn = 1<<31,
! txAutoMode = 1<<30,
! txEI = 1<<23,
! txGenCRC = 1<<22,
! txPad = 1<<18,
! txFirst = 1<<17,
! txLast = 1<<16,
! txErrorSummary = 1<<15,
! txReTxCntMask = 0x0f<<10,
! txReTxCntBit = 10,
! txCollision = 1<<9,
! txReTxLimit = 1<<8,
! txUnderrun = 1<<6,
! txLateCollision = 1<<5
};
/* Values for the Rx command-status descriptor entry. */
enum rd_cmdstat {
! rxOwn = 1<<31,
! rxAutoMode = 1<<30,
! rxEI = 1<<23,
! rxFirst = 1<<17,
! rxLast = 1<<16,
! rxErrorSummary = 1<<15,
! rxIGMP = 1<<14,
! rxHashExpired = 1<<13,
! rxMissedFrame = 1<<12,
! rxFrameType = 1<<11,
! rxShortFrame = 1<<8,
! rxMaxFrameLen = 1<<7,
! rxOverrun = 1<<6,
! rxCollision = 1<<4,
! rxCRCError = 1
};
/* Bit fields of a Hash Table Entry */
enum hash_table_entry {
! hteValid = 1,
! hteSkip = 2,
! hteRD = 4
};
// The MIB counters
typedef struct {
! u32 byteReceived;
! u32 byteSent;
! u32 framesReceived;
! u32 framesSent;
! u32 totalByteReceived;
! u32 totalFramesReceived;
! u32 broadcastFramesReceived;
! u32 multicastFramesReceived;
! u32 cRCError;
! u32 oversizeFrames;
! u32 fragments;
! u32 jabber;
! u32 collision;
! u32 lateCollision;
! u32 frames64;
! u32 frames65_127;
! u32 frames128_255;
! u32 frames256_511;
! u32 frames512_1023;
! u32 frames1024_MaxSize;
! u32 macRxError;
! u32 droppedFrames;
! u32 outMulticastFrames;
! u32 outBroadcastFrames;
! u32 undersizeFrames;
} mib_counters_t;
struct gt96100_private {
! gt96100_rd_t* rx_ring;
! gt96100_td_t* tx_ring;
! // The Rx and Tx rings must be 16-byte aligned
! dma_addr_t rx_ring_dma;
! dma_addr_t tx_ring_dma;
! char* hash_table;
! // The Hash Table must be 8-byte aligned
! dma_addr_t hash_table_dma;
! int hash_mode;
!
! // The Rx buffers must be 8-byte aligned
! char* rx_buff;
! dma_addr_t rx_buff_dma;
! // Tx buffers (tx_skbuff[i]->data) with less than 8 bytes
! // of payload must be 8-byte aligned
! struct sk_buff* tx_skbuff[TX_RING_SIZE];
! int rx_next_out; /* The next free ring entry to receive */
! int tx_next_in; /* The next free ring entry to send */
! int tx_next_out; /* The last ring entry the ISR processed */
! int tx_count; /* current # of pkts waiting to be sent in Tx ring */
! int intr_work_done; /* number of Rx and Tx pkts processed in the isr */
! int tx_full; /* Tx ring is full */
!
! mib_counters_t mib;
! struct net_device_stats stats;
! int io_size;
! int port_num; // 0 or 1
! int chip_rev;
! u32 port_offset;
!
! int phy_addr; // PHY address
! u32 last_psr; // last value of the port status register
! int options; /* User-settable misc. driver options. */
! int drv_flags;
! spinlock_t lock; /* Serialise access to device */
};
|
|
From: James S. <jsi...@us...> - 2001-08-21 17:27:34
|
Update of /cvsroot/linux-mips/linux/arch/mips64/sgi-ip27
In directory usw-pr-cvs1:/tmp/cvs-serv20355
Modified Files:
ip27-berr.c
Log Message:
Support catching data bus errors also from withim modules.
Index: ip27-berr.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/sgi-ip27/ip27-berr.c,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -C2 -d -r1.1.1.1 -r1.2
*** ip27-berr.c 2001/06/22 02:29:32 1.1.1.1
--- ip27-berr.c 2001/08/21 17:27:31 1.2
***************
*** 9,12 ****
--- 9,15 ----
#include <linux/init.h>
#include <linux/kernel.h>
+ #include <linux/module.h>
+
+ #include <asm/module.h>
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
***************
*** 44,47 ****
--- 47,52 ----
}
+ extern spinlock_t modlist_lock;
+
static inline unsigned long
search_dbe_table(unsigned long addr)
***************
*** 49,57 ****
unsigned long ret;
/* There is only the kernel to search. */
ret = search_one_table(__start___dbe_table, __stop___dbe_table-1, addr);
! if (ret) return ret;
! return 0;
}
--- 54,86 ----
unsigned long ret;
+ #ifndef CONFIG_MODULES
/* There is only the kernel to search. */
ret = search_one_table(__start___dbe_table, __stop___dbe_table-1, addr);
! return ret;
! #else
! unsigned long flags;
! /* The kernel is the last "module" -- no need to treat it special. */
! struct module *mp;
! struct archdata *ap;
!
! spin_lock_irqsave(&modlist_lock, flags);
! for (mp = module_list; mp != NULL; mp = mp->next) {
! if (!mod_member_present(mp, archdata_start) ||
! !mp->archdata_start)
! continue;
! ap = (struct archdata *)(mod->archdata_start);
!
! if (ap->dbe_table_start == NULL ||
! !(mp->flags & (MOD_RUNNING | MOD_INITIALIZING)))
! continue;
! ret = search_one_table(ap->dbe_table_start,
! ap->dbe_table_end - 1, addr);
! if (ret)
! break;
! }
! spin_unlock_irqrestore(&modlist_lock, flags);
! return ret;
! #endif
}
|
|
From: James S. <jsi...@us...> - 2001-08-21 17:26:56
|
Update of /cvsroot/linux-mips/linux/arch/mips64/sgi-ip22
In directory usw-pr-cvs1:/tmp/cvs-serv19943
Added Files:
ip22-berr.c
Log Message:
Support catching data bus errors also from withim modules.
--- NEW FILE: ip22-berr.c ---
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1994, 1995, 1996, 1999, 2000 by Ralf Baechle
* Copyright (C) 1999, 2000 by Silicon Graphics
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <asm/module.h>
#include <asm/uaccess.h>
#include <asm/paccess.h>
#include <asm/addrspace.h>
#include <asm/ptrace.h>
extern asmlinkage void handle_ibe(void);
extern asmlinkage void handle_dbe(void);
extern const struct exception_table_entry __start___dbe_table[];
extern const struct exception_table_entry __stop___dbe_table[];
static inline unsigned long
search_one_table(const struct exception_table_entry *first,
const struct exception_table_entry *last,
unsigned long value)
{
while (first <= last) {
const struct exception_table_entry *mid;
long diff;
mid = (last - first) / 2 + first;
diff = mid->insn - value;
if (diff == 0)
return mid->nextinsn;
else if (diff < 0)
first = mid+1;
else
last = mid-1;
}
return 0;
}
extern spinlock_t modlist_lock;
static inline unsigned long
search_dbe_table(unsigned long addr)
{
unsigned long ret = 0;
#ifndef CONFIG_MODULES
/* There is only the kernel to search. */
ret = search_one_table(__start___dbe_table, __stop___dbe_table-1, addr);
return ret;
#else
unsigned long flags;
/* The kernel is the last "module" -- no need to treat it special. */
struct module *mp;
struct archdata *ap;
spin_lock_irqsave(&modlist_lock, flags);
for (mp = module_list; mp != NULL; mp = mp->next) {
if (!mod_member_present(mp, archdata_start) ||
!mp->archdata_start)
continue;
ap = (struct archdata *)(mod->archdata_start);
if (ap->dbe_table_start == NULL ||
!(mp->flags & (MOD_RUNNING | MOD_INITIALIZING)))
continue;
ret = search_one_table(ap->dbe_table_start,
ap->dbe_table_end - 1, addr);
if (ret)
break;
}
spin_unlock_irqrestore(&modlist_lock, flags);
return ret;
#endif
}
void do_ibe(struct pt_regs *regs)
{
printk("Got ibe at 0x%lx\n", regs->cp0_epc);
show_regs(regs);
dump_tlb_addr(regs->cp0_epc);
force_sig(SIGBUS, current);
while(1);
}
void do_dbe(struct pt_regs *regs)
{
unsigned long fixup;
fixup = search_dbe_table(regs->cp0_epc);
if (fixup) {
long new_epc;
new_epc = fixup_exception(dpf_reg, fixup, regs->cp0_epc);
regs->cp0_epc = new_epc;
return;
}
printk("Got dbe at 0x%lx\n", regs->cp0_epc);
show_regs(regs);
dump_tlb_all();
while(1);
force_sig(SIGBUS, current);
}
void __init
bus_error_init(void)
{
int dummy;
set_except_vector(6, handle_ibe);
set_except_vector(7, handle_dbe);
/* At this time nothing uses the DBE protection mechanism on the
Indy, so this here is needed to make the kernel link. */
get_dbe(dummy, (int *)KSEG0);
}
|
|
From: James S. <jsi...@us...> - 2001-08-21 17:25:39
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv19122
Modified Files:
traps.c
Log Message:
Support catching data bus errors also from withim modules.
Index: traps.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/traps.c,v
retrieving revision 1.10
retrieving revision 1.11
diff -C2 -d -r1.10 -r1.11
*** traps.c 2001/08/18 18:04:54 1.10
--- traps.c 2001/08/21 17:25:35 1.11
***************
*** 15,18 ****
--- 15,19 ----
#include <linux/init.h>
#include <linux/mm.h>
+ #include <linux/module.h>
#include <linux/sched.h>
#include <linux/smp.h>
***************
*** 26,29 ****
--- 27,31 ----
#include <asm/inst.h>
#include <asm/jazz.h>
+ #include <asm/module.h>
#include <asm/pgtable.h>
#include <asm/io.h>
***************
*** 246,261 ****
}
! #define search_dbe_table(addr) \
! search_one_table(__start___dbe_table, __stop___dbe_table - 1, (addr))
static void default_be_board_handler(struct pt_regs *regs)
{
unsigned long new_epc;
! unsigned long fixup = search_dbe_table(regs->cp0_epc);
! if (fixup) {
! new_epc = fixup_exception(dpf_reg, fixup, regs->cp0_epc);
! regs->cp0_epc = new_epc;
! return;
}
--- 248,303 ----
}
! extern spinlock_t modlist_lock;
!
! static inline unsigned long
! search_dbe_table(unsigned long addr)
! {
! unsigned long ret = 0;
!
! #ifndef CONFIG_MODULES
! /* There is only the kernel to search. */
! ret = search_one_table(__start___dbe_table, __stop___dbe_table-1, addr);
! return ret;
! #else
! unsigned long flags;
!
! /* The kernel is the last "module" -- no need to treat it special. */
! struct module *mp;
! struct archdata *ap;
!
! spin_lock_irqsave(&modlist_lock, flags);
! for (mp = module_list; mp != NULL; mp = mp->next) {
! if (!mod_member_present(mp, archdata_start) ||
! !mp->archdata_start)
! continue;
! ap = (struct archdata *)(mp->archdata_start);
!
! if (ap->dbe_table_start == NULL ||
! !(mp->flags & (MOD_RUNNING | MOD_INITIALIZING)))
! continue;
! ret = search_one_table(ap->dbe_table_start,
! ap->dbe_table_end - 1, addr);
! if (ret)
! break;
! }
! spin_unlock_irqrestore(&modlist_lock, flags);
! return ret;
! #endif
! }
static void default_be_board_handler(struct pt_regs *regs)
{
unsigned long new_epc;
! unsigned long fixup;
! int data = regs->cp0_cause & 4;
! if (data && !user_mode(regs)) {
! fixup = search_dbe_table(regs->cp0_epc);
! if (fixup) {
! new_epc = fixup_exception(dpf_reg, fixup,
! regs->cp0_epc);
! regs->cp0_epc = new_epc;
! return;
! }
}
***************
*** 263,266 ****
--- 305,312 ----
* Assume it would be too dangerous to continue ...
*/
+ printk(KERN_ALERT "%s bus error, epc == %08lx, ra == %08lx\n",
+ data ? "Data" : "Instruction",
+ regs->cp0_epc, regs->regs[31]);
+ die_if_kernel("Oops", regs);
force_sig(SIGBUS, current);
}
***************
*** 738,742 ****
void __init trap_init(void)
{
! extern char except_vec0_nevada, except_vec0_r4000, except_vec0_vr41xx;
extern char except_vec0_r4600, except_vec0_r2300;
extern char except_vec1_generic, except_vec2_generic;
--- 784,788 ----
void __init trap_init(void)
{
! extern char except_vec0_nevada, except_vec0_r4000;
extern char except_vec0_r4600, except_vec0_r2300;
extern char except_vec1_generic, except_vec2_generic;
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