Re: [Linux-fbdev-devel] Possible Bug in radeonfb (?)

[Antonino D. <ad...@po...>]

On Wed, 2003-02-26 at 02:21, Andrea Mazzoleni wrote:
> In radeonfb (2.4.20) I have found a possible inconsistency.
> 
> In the PLL clock computation the initial range check compares the
> requested clock with the value pll_min/12. But immeditially later
> I see that the higher PLL post divider is 16 and not 12.
> 
> Is it correct ? Or the check should use 16 instead of 12 ?
> 

Probably does not matter, unless you intend to use very, very low
dotclocks (< 10MHz).

Tony