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CVS: 2.3/arch/ppc/kernel apus_setup.c,1.15,1.16 head.S,1.19,1.20 irq.c,1.8,1.9 pci.c,1.11,1.12 ppc-stub.c,1.6,1.7 ppc_ksyms.c,1.20,1.21 setup.c,1.14,1.15 time.c,1.11,1.12 hashtable.S,1.1.1.8,NONE
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From: Roman Z. <zi...@us...> - 2001-07-08 17:00:27
|
Update of /cvsroot/linux-apus/2.3/arch/ppc/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv11606/arch/ppc/kernel
Modified Files:
apus_setup.c head.S irq.c pci.c ppc-stub.c ppc_ksyms.c setup.c
time.c
Removed Files:
hashtable.S
Log Message:
conflict fixes from import bitkeeper (2.4.6)
Index: apus_setup.c
===================================================================
RCS file: /cvsroot/linux-apus/2.3/arch/ppc/kernel/apus_setup.c,v
retrieving revision 1.15
retrieving revision 1.16
diff -u -r1.15 -r1.16
--- apus_setup.c 2001/06/10 00:17:27 1.15
+++ apus_setup.c 2001/07/08 16:59:54 1.16
@@ -1,5 +1,5 @@
/*
- * BK Id: SCCS/s.apus_setup.c 1.11 05/17/01 18:14:21 cort
+ * BK Id: SCCS/s.apus_setup.c 1.13 06/05/01 21:22:02 paulus
*/
/*
* linux/arch/ppc/kernel/apus_setup.c
Index: head.S
===================================================================
RCS file: /cvsroot/linux-apus/2.3/arch/ppc/kernel/head.S,v
retrieving revision 1.19
retrieving revision 1.20
diff -u -r1.19 -r1.20
--- head.S 2001/06/10 00:17:27 1.19
+++ head.S 2001/07/08 16:59:54 1.20
@@ -1,5 +1,5 @@
/*
- * BK Id: SCCS/s.head.S 1.21 05/23/01 00:38:42 cort
+ * BK Id: SCCS/s.head.S 1.24 07/03/01 15:00:30 paulus
*/
/*
* PowerPC version
@@ -25,11 +25,12 @@
*
*/
+#include <linux/config.h>
#include "ppc_asm.h"
#include <asm/processor.h>
#include <asm/page.h>
-#include <linux/config.h>
#include <asm/mmu.h>
+#include <asm/pgtable.h>
#ifdef CONFIG_APUS
#include <asm/amigappc.h>
@@ -179,7 +180,7 @@
mtspr SDR1,r4
slbia
lis r5,0x2000 /* set pseudo-segment reg 12 */
- ori r5,r5,12
+ ori r5,r5,0x0ccc
mtsr 12,r5
#endif /* CONFIG_POWER4 */
@@ -314,9 +315,8 @@
mfspr r20,DSISR
andis. r0,r20,0xa470 /* weird error? */
bne 1f /* if not, try to put a PTE */
- mfspr r3,DAR /* into the hash table */
- rlwinm r4,r23,32-13,30,30 /* MSR_PR -> _PAGE_USER */
- rlwimi r4,r20,32-23,29,29 /* DSISR_STORE -> _PAGE_RW */
+ mfspr r4,DAR /* into the hash table */
+ rlwinm r3,r20,32-15,21,21 /* DSISR_STORE -> _PAGE_RW */
#ifndef CONFIG_APUS
bl hash_page
#else
@@ -364,9 +364,8 @@
#endif /* CONFIG_PPC64BRIDGE */
andis. r0,r23,0x4000 /* no pte found? */
beq 1f /* if so, try to put a PTE */
- mr r3,r22 /* into the hash table */
- rlwinm r4,r23,32-13,30,30 /* MSR_PR -> _PAGE_USER */
- mr r20,r23 /* SRR1 has reason bits */
+ li r3,0 /* into the hash table */
+ mr r4,r22 /* SRR0 is fault address */
#ifndef CONFIG_APUS
bl hash_page
#else
@@ -519,10 +518,13 @@
lis r1,KERNELBASE@h /* check if kernel address */
cmplw 0,r3,r1
mfspr r2,SPRG3
+ li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
lwz r2,PGDIR(r2)
blt+ 112f
lis r2,swapper_pg_dir@ha /* if kernel address, use */
addi r2,r2,swapper_pg_dir@l /* kernel page table */
+ mfspr r1,SRR1 /* and MSR_PR bit from SRR1 */
+ rlwinm r1,r1,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
112: tophys(r2,r2)
rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
lwz r2,0(r2) /* get pmd entry */
@@ -530,21 +532,23 @@
beq- InstructionAddressInvalid /* return if no mapping */
tophys(r2,r2)
rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */
- lwz r1,0(r2) /* get linux-style pte */
- /* setup access flags in r3 */
- mfmsr r3
- rlwinm r3,r3,32-13,30,30 /* MSR_PR -> _PAGE_USER */
- ori r3,r3,1 /* set _PAGE_PRESENT bit in access */
- andc. r3,r3,r1 /* check access & ~permission */
+ lwz r3,0(r2) /* get linux-style pte */
+ andc. r1,r1,r3 /* check access & ~permission */
bne- InstructionAddressInvalid /* return if access not permitted */
- ori r1,r1,0x100 /* set _PAGE_ACCESSED in pte */
- stw r1,0(r2) /* update PTE (accessed bit) */
+ ori r3,r3,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */
+ /*
+ * NOTE! We are assuming this is not an SMP system, otherwise
+ * we would need to update the pte atomically with lwarx/stwcx.
+ */
+ stw r3,0(r2) /* update PTE (accessed bit) */
/* Convert linux-style PTE to low word of PPC-style PTE */
- /* this computation could be done better -- Cort */
- rlwinm r3,r1,32-9,31,31 /* _PAGE_HWWRITE -> PP lsb */
- rlwimi r1,r1,32-1,31,31 /* _PAGE_USER -> PP (both bits now) */
- ori r3,r3,0xe04 /* clear out reserved bits */
- andc r1,r1,r3 /* PP=2 or 0, when _PAGE_HWWRITE */
+ rlwinm r1,r3,32-10,31,31 /* _PAGE_RW -> PP lsb */
+ rlwinm r2,r3,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */
+ and r1,r1,r2 /* writable if _RW and _DIRTY */
+ rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */
+ rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */
+ ori r1,r1,0xe14 /* clear out reserved bits and M */
+ andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */
mtspr RPA,r1
mfspr r3,IMISS
tlbli r3
@@ -569,7 +573,6 @@
mfmsr r0 /* Restore "normal" registers */
xoris r0,r0,MSR_TGPR>>16
mtcrf 0x80,r3 /* Restore CR0 */
- SYNC /* Some chip revs have problems here... */
mtmsr r0
b InstructionAccess
@@ -590,10 +593,13 @@
lis r1,KERNELBASE@h /* check if kernel address */
cmplw 0,r3,r1
mfspr r2,SPRG3
+ li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
lwz r2,PGDIR(r2)
blt+ 112f
lis r2,swapper_pg_dir@ha /* if kernel address, use */
addi r2,r2,swapper_pg_dir@l /* kernel page table */
+ mfspr r1,SRR1 /* and MSR_PR bit from SRR1 */
+ rlwinm r1,r1,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
112: tophys(r2,r2)
rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
lwz r2,0(r2) /* get pmd entry */
@@ -601,22 +607,23 @@
beq- DataAddressInvalid /* return if no mapping */
tophys(r2,r2)
rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */
- lwz r1,0(r2) /* get linux-style pte */
- /* setup access flags in r3 */
- mfmsr r3
- rlwinm r3,r3,32-13,30,30 /* MSR_PR -> _PAGE_USER */
- ori r3,r3,1 /* set _PAGE_PRESENT bit in access */
- /* save r2 and use it as scratch for the andc. */
- andc. r3,r3,r1 /* check access & ~permission */
+ lwz r3,0(r2) /* get linux-style pte */
+ andc. r1,r1,r3 /* check access & ~permission */
bne- DataAddressInvalid /* return if access not permitted */
- ori r1,r1,0x100 /* set _PAGE_ACCESSED in pte */
- stw r1,0(r2) /* update PTE (accessed bit) */
+ ori r3,r3,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */
+ /*
+ * NOTE! We are assuming this is not an SMP system, otherwise
+ * we would need to update the pte atomically with lwarx/stwcx.
+ */
+ stw r3,0(r2) /* update PTE (accessed bit) */
/* Convert linux-style PTE to low word of PPC-style PTE */
- /* this computation could be done better -- Cort */
- rlwinm r3,r1,32-9,31,31 /* _PAGE_HWWRITE -> PP lsb */
- rlwimi r1,r1,32-1,31,31 /* _PAGE_USER -> PP (both bits now) */
- ori r3,r3,0xe04 /* clear out reserved bits */
- andc r1,r1,r3 /* PP=2 or 0, when _PAGE_HWWRITE */
+ rlwinm r1,r3,32-10,31,31 /* _PAGE_RW -> PP lsb */
+ rlwinm r2,r3,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */
+ and r1,r1,r2 /* writable if _RW and _DIRTY */
+ rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */
+ rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */
+ ori r1,r1,0xe14 /* clear out reserved bits and M */
+ andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */
mtspr RPA,r1
mfspr r3,DMISS
tlbld r3
@@ -639,7 +646,6 @@
mfmsr r0 /* Restore "normal" registers */
xoris r0,r0,MSR_TGPR>>16
mtcrf 0x80,r3 /* Restore CR0 */
- SYNC /* Some chip revs have problems here... */
mtmsr r0
b DataAccess
@@ -660,10 +666,13 @@
lis r1,KERNELBASE@h /* check if kernel address */
cmplw 0,r3,r1
mfspr r2,SPRG3
+ li r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */
lwz r2,PGDIR(r2)
blt+ 112f
lis r2,swapper_pg_dir@ha /* if kernel address, use */
addi r2,r2,swapper_pg_dir@l /* kernel page table */
+ mfspr r1,SRR1 /* and MSR_PR bit from SRR1 */
+ rlwinm r1,r1,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
112: tophys(r2,r2)
rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
lwz r2,0(r2) /* get pmd entry */
@@ -671,22 +680,19 @@
beq- DataAddressInvalid /* return if no mapping */
tophys(r2,r2)
rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */
- lwz r1,0(r2) /* get linux-style pte */
- /* setup access flags in r3 */
- mfmsr r3
- rlwinm r3,r3,32-13,30,30 /* MSR_PR -> _PAGE_USER */
- ori r3,r3,0x5 /* _PAGE_PRESENT|_PAGE_RW */
- /* save r2 and use it as scratch for the andc. */
- andc. r3,r3,r1 /* check access & ~permission */
+ lwz r3,0(r2) /* get linux-style pte */
+ andc. r1,r1,r3 /* check access & ~permission */
bne- DataAddressInvalid /* return if access not permitted */
- ori r1,r1,0x384 /* set _PAGE_ACCESSED|_PAGE_DIRTY|_PAGE_RW|_PAGE_HWWRITE in pte */
- stw r1,0(r2) /* update PTE (accessed bit) */
+ ori r3,r3,_PAGE_ACCESSED|_PAGE_DIRTY
+ /*
+ * NOTE! We are assuming this is not an SMP system, otherwise
+ * we would need to update the pte atomically with lwarx/stwcx.
+ */
+ stw r3,0(r2) /* update PTE (accessed/dirty bits) */
/* Convert linux-style PTE to low word of PPC-style PTE */
- /* this computation could be done better -- Cort */
- rlwinm r3,r1,32-9,31,31 /* _PAGE_HWWRITE -> PP lsb */
- rlwimi r1,r1,32-1,31,31 /* _PAGE_USER -> PP (both bits now) */
- ori r3,r3,0xe04 /* clear out reserved bits */
- andc r1,r1,r3 /* PP=2 or 0, when _PAGE_HWWRITE */
+ rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */
+ li r1,0xe15 /* clear out reserved bits and M */
+ andc r1,r3,r1 /* PP = user? 2: 0 */
mtspr RPA,r1
mfspr r3,DMISS
tlbld r3
@@ -915,7 +921,6 @@
*/
mfmsr r5
oris r5,r5,MSR_VEC@h
- SYNC
mtmsr r5 /* enable use of AltiVec now */
isync
/*
@@ -1042,6 +1047,7 @@
ori r5,r5,MSR_FP
SYNC
mtmsr r5 /* enable use of fpu now */
+ SYNC
isync
cmpi 0,r3,0
beqlr- /* if no previous owner, done */
@@ -1342,7 +1348,7 @@
lis r3,0x2000 /* Ku = 1, VSID = 0 */
li r4,0
3: mtsrin r3,r4
- addi r3,r3,1 /* increment VSID */
+ addi r3,r3,0x111 /* increment VSID */
addis r4,r4,0x1000 /* address of next segment */
bdnz 3b
#ifndef CONFIG_POWER4
@@ -1449,7 +1455,8 @@
* Set up the segment registers for a new context.
*/
_GLOBAL(set_context)
- rlwinm r3,r3,4,8,27 /* VSID = context << 4 */
+ mulli r3,r3,897 /* multiply context by skew factor */
+ rlwinm r3,r3,4,8,27 /* VSID = (context & 0xfffff) << 4 */
addis r3,r3,0x6000 /* Set Ks, Ku bits */
li r0,12 /* TASK_SIZE / SEGMENT_SIZE */
mtctr r0
@@ -1459,7 +1466,8 @@
slbie r4
#endif /* CONFIG_PPC64BRIDGE */
mtsrin r3,r4
- addi r3,r3,1 /* next VSID */
+ addi r3,r3,0x111 /* next VSID */
+ rlwinm r3,r3,0,8,3 /* clear out any overflow from VSID field */
addis r4,r4,0x1000 /* address of next segment */
bdnz 3b
SYNC
Index: irq.c
===================================================================
RCS file: /cvsroot/linux-apus/2.3/arch/ppc/kernel/irq.c,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -r1.8 -r1.9
--- irq.c 2001/06/10 00:17:27 1.8
+++ irq.c 2001/07/08 16:59:54 1.9
@@ -1,5 +1,5 @@
/*
- * BK Id: SCCS/s.irq.c 1.23 05/17/01 18:14:21 cort
+ * BK Id: SCCS/s.irq.c 1.29 07/03/01 15:00:30 paulus
*/
/*
* arch/ppc/kernel/irq.c
@@ -531,26 +531,25 @@
{
int cpu = smp_processor_id();
int irq;
- hardirq_enter( cpu );
+ hardirq_enter(cpu);
/* every arch is required to have a get_irq -- Cort */
- irq = ppc_md.get_irq( regs );
+ irq = ppc_md.get_irq(regs);
- if ( irq < 0 )
- {
+ if (irq >= 0) {
+ ppc_irq_dispatch_handler( regs, irq );
+ } else if (irq != -2) {
/* -2 means ignore, already handled */
- if (irq != -2)
- {
+ if (ppc_spurious_interrupts < 10)
printk(KERN_DEBUG "Bogus interrupt %d from PC = %lx\n",
irq, regs->nip);
- /* That's not SMP safe ... but who cares ? */
- ppc_spurious_interrupts++;
- }
- goto out;
+ /* That's not SMP safe ... but who cares ? */
+ ppc_spurious_interrupts++;
}
- ppc_irq_dispatch_handler( regs, irq );
-out:
hardirq_exit( cpu );
+
+ if (softirq_pending(cpu))
+ do_softirq();
return 1; /* lets ret_from_int know we can do checks */
}
Index: pci.c
===================================================================
RCS file: /cvsroot/linux-apus/2.3/arch/ppc/kernel/pci.c,v
retrieving revision 1.11
retrieving revision 1.12
diff -u -r1.11 -r1.12
--- pci.c 2001/06/10 00:17:27 1.11
+++ pci.c 2001/07/08 16:59:54 1.12
@@ -1,5 +1,5 @@
/*
- * BK Id: SCCS/s.pci.c 1.21 05/21/01 01:31:30 cort
+ * BK Id: SCCS/s.pci.c 1.27 07/03/01 15:00:30 paulus
*/
/*
* Common pmac/prep/chrp pci routines. -- Cort
@@ -40,11 +40,10 @@
unsigned long isa_mem_base = 0;
unsigned long pci_dram_offset = 0;
-static u8* pci_to_OF_bus_map;
-
static void pcibios_fixup_resources(struct pci_dev* dev);
#ifdef CONFIG_ALL_PPC
static void pcibios_fixup_cardbus(struct pci_dev* dev);
+static u8* pci_to_OF_bus_map;
#endif
/* By default, we don't re-assign bus numbers. We do this only on
@@ -73,8 +72,13 @@
u32 new, check;
int reg;
struct pci_controller* hose = dev->sysdata;
+ unsigned long io_offset;
new = res->start;
+ if (hose && res->flags & IORESOURCE_IO) {
+ io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
+ new -= io_offset;
+ }
if (hose && res->flags & IORESOURCE_MEM)
new -= hose->pci_mem_offset;
new |= (res->flags & PCI_REGION_FLAG_MASK);
@@ -98,40 +102,43 @@
}
static void
-pcibios_fixup_resources(struct pci_dev* dev)
+pcibios_fixup_resources(struct pci_dev *dev)
{
- struct pci_controller* hose =
- (struct pci_controller *)dev->sysdata;
+ struct pci_controller* hose = (struct pci_controller *)dev->sysdata;
int i;
+ unsigned long offset;
+
if (!hose) {
- printk("No hose for PCI dev %x.%x !\n", dev->bus->number, dev->devfn >> 3);
+ printk(KERN_ERR "No hose for PCI dev %s!\n", dev->slot_name);
return;
}
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
struct resource *res = dev->resource + i;
- if (!res->start)
+ if (!res->start || !res->flags)
+ continue;
+ if (res->end == 0xffffffff) {
+ DBG("PCI:%s Resource %d [%08lx-%08lx] is unassigned\n",
+ dev->slot_name, i, res->start, res->end);
+ res->end -= res->start;
+ res->start = 0;
continue;
- if ((res->flags & IORESOURCE_MEM) && hose->pci_mem_offset) {
- res->start += hose->pci_mem_offset;
- res->end += hose->pci_mem_offset;
+ }
+ offset = 0;
+ if (res->flags & IORESOURCE_MEM) {
+ offset = hose->pci_mem_offset;
+ } else if (res->flags & IORESOURCE_IO) {
+ offset = (unsigned long) hose->io_base_virt
+ - isa_io_base;
+ }
+ if (offset != 0) {
+ res->start += offset;
+ res->end += offset;
#ifdef DEBUG
- printk("Fixup mem res, dev: %x.%x, res_start: %lx->%lx\n",
- dev->bus->number, dev->devfn>>3, res->start-hose->pci_mem_offset,
- res->start);
+ printk("Fixup res %d (%lx) of dev %s: %lx -> %lx\n",
+ i, res->flags, dev->slot_name,
+ res->start - offset, res->start);
#endif
}
-
- if ((res->flags & IORESOURCE_IO)
- && (unsigned long) hose->io_base_virt != isa_io_base) {
- unsigned long offs;
-
- offs = (unsigned long)hose->io_base_virt - isa_io_base;
- res->start += offs;
- res->end += offs;
- printk("Fixup IO res, dev: %x.%x, res_start: %lx->%lx\n",
- dev->bus->number, dev->devfn>>3,
- res->start - offs, res->start);
- }
}
}
@@ -228,22 +235,27 @@
{
struct list_head *ln;
struct pci_bus *bus;
- struct pci_dev *dev;
- int idx;
- struct resource *r, *pr;
+ int i;
+ struct resource *res, *pr;
/* Depth-First Search on bus tree */
- for (ln=bus_list->next; ln != bus_list; ln=ln->next) {
+ for (ln = bus_list->next; ln != bus_list; ln=ln->next) {
bus = pci_bus_b(ln);
- if ((dev = bus->self)) {
- for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
- r = &dev->resource[idx];
- if (!r->start)
- continue;
- pr = pci_find_parent_resource(dev, r);
- if (!pr || request_resource(pr, r) < 0)
- printk(KERN_ERR "PCI: Cannot allocate resource region %d of bridge %s\n", idx, dev->slot_name);
- }
+ for (i = 0; i < 4; ++i) {
+ if ((res = bus->resource[i]) == NULL || !res->flags)
+ continue;
+ if (bus->parent == NULL)
+ pr = (res->flags & IORESOURCE_IO)?
+ &ioport_resource: &iomem_resource;
+ else
+ pr = pci_find_parent_resource(bus->self, res);
+
+ if (pr && request_resource(pr, res) == 0)
+ continue;
+ printk(KERN_ERR "PCI: Cannot allocate resource region "
+ "%d of PCI bridge %d\n", i, bus->number);
+ DBG("PCI: resource is %lx..%lx (%lx), parent %p\n",
+ res->start, res->end, res->flags, pr);
}
pcibios_allocate_bus_resources(&bus->children);
}
@@ -253,13 +265,15 @@
{
struct resource *pr, *r = &dev->resource[idx];
- DBG("PCI:%x:%x:%x: Resource %08lx-%08lx (f=%lx)\n",
- dev->bus->number, dev->devfn >> 3, dev->devfn & 7,
- r->start, r->end, r->flags);
+ DBG("PCI:%s: Resource %d: %08lx-%08lx (f=%lx)\n",
+ dev->slot_name, idx, r->start, r->end, r->flags);
pr = pci_find_parent_resource(dev, r);
if (!pr || request_resource(pr, r) < 0) {
printk(KERN_ERR "PCI: Cannot allocate resource region %d"
" of device %s\n", idx, dev->slot_name);
+ if (pr)
+ DBG("PCI: parent is %p: %08lx-%08lx (f=%lx)\n",
+ pr, pr->start, pr->end, pr->flags);
/* We'll assign a new address later */
r->end -= r->start;
r->start = 0;
@@ -276,20 +290,12 @@
pci_for_each_dev(dev) {
pci_read_config_word(dev, PCI_COMMAND, &command);
- for(idx = 0; idx < 6; idx++) {
+ for (idx = 0; idx < 6; idx++) {
r = &dev->resource[idx];
if (r->parent) /* Already allocated */
continue;
if (!r->start) /* Not assigned at all */
continue;
- if (r->end == 0xffffffff) {
- /* LongTrail OF quirk: unassigned */
- DBG("PCI: Resource %08lx-%08lx was unassigned\n", r->start, r->end);
- r->end -= r->start;
- r->start = 0;
- continue;
- }
-
if (r->flags & IORESOURCE_IO)
disabled = !(command & PCI_COMMAND_IO);
else
@@ -306,7 +312,8 @@
DBG("PCI: Switching off ROM of %s\n", dev->slot_name);
r->flags &= ~PCI_ROM_ADDRESS_ENABLE;
pci_read_config_dword(dev, dev->rom_base_reg, ®);
- pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE);
+ pci_write_config_dword(dev, dev->rom_base_reg,
+ reg & ~PCI_ROM_ADDRESS_ENABLE);
}
}
}
@@ -325,21 +332,14 @@
if (!class || class == PCI_CLASS_BRIDGE_HOST)
continue;
- for(idx=0; idx<6; idx++) {
+ for (idx = 0; idx < 6; idx++) {
r = &dev->resource[idx];
-#if 0 /* we don't need this PC-ism */
- /*
- * Don't touch IDE controllers and I/O ports of video cards!
- */
- if ((class == PCI_CLASS_STORAGE_IDE && idx < 4) ||
- (class == PCI_CLASS_DISPLAY_VGA && (r->flags & IORESOURCE_IO)))
- continue;
-#endif
/*
- * We shall assign a new address to this resource, either because
- * the BIOS (sic) forgot to do so or because we have decided the old
- * address was unusable for some reason.
+ * We shall assign a new address to this resource,
+ * either because the BIOS (sic) forgot to do so
+ * or because we have decided the old address was
+ * unusable for some reason.
*/
if (!r->start && r->end &&
(!ppc_md.pcibios_enable_device_hook ||
@@ -347,13 +347,13 @@
pci_assign_resource(dev, idx);
}
- if (0) { /* don't assign ROMs */
- r = &dev->resource[PCI_ROM_RESOURCE];
- r->end -= r->start;
- r->start = 0;
- if (r->end)
- pci_assign_resource(dev, PCI_ROM_RESOURCE);
- }
+#if 0 /* don't assign ROMs */
+ r = &dev->resource[PCI_ROM_RESOURCE];
+ r->end -= r->start;
+ r->start = 0;
+ if (r->end)
+ pci_assign_resource(dev, PCI_ROM_RESOURCE);
+#endif
}
}
@@ -496,10 +496,15 @@
&& ((reg[0] >> 16) & 0xff) == bus)
return node;
- /* For PCI<->PCI bridges or CardBus bridges, we go down */
+ /* For PCI<->PCI bridges or CardBus bridges, we go down
+ * Note: some OFs create a parent node "multifunc-device" as
+ * a fake root for all functions of a multi-function device,
+ * we go down them as well.
+ */
class_code = (unsigned int *) get_property(node, "class-code", 0);
- if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
- (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
+ if ((!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
+ (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) &&
+ strcmp(node->name, "multifunc-device"))
continue;
sub_node = scan_OF_childs_for_device(node->child, bus, dev_fn);
if (sub_node)
@@ -682,9 +687,9 @@
{
struct pci_controller *hose;
struct pci_bus *bus;
- int next_busno, i;
+ int next_busno;
- printk("PCI: Probing PCI hardware\n");
+ printk(KERN_INFO "PCI: Probing PCI hardware\n");
/* Scan all of the recorded PCI controllers. */
for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
@@ -692,18 +697,6 @@
hose->first_busno = next_busno;
hose->last_busno = 0xff;
bus = pci_scan_bus(hose->first_busno, hose->ops, hose);
- if (hose->io_resource.flags) {
- unsigned long offs;
-
- offs = (unsigned long)hose->io_base_virt - isa_io_base;
- hose->io_resource.start += offs;
- hose->io_resource.end += offs;
- bus->resource[0] = &hose->io_resource;
- }
- for (i = 0; i < 3; ++i)
- if (hose->mem_resources[i].flags)
- bus->resource[i+1] = &hose->mem_resources[i];
- hose->bus = bus;
hose->last_busno = bus->subordinate;
if (pci_assign_all_busses || next_busno <= hose->last_busno)
next_busno = hose->last_busno+1;
@@ -728,28 +721,8 @@
pcibios_allocate_resources(0);
pcibios_allocate_resources(1);
pcibios_assign_resources();
-
-#ifdef CONFIG_BLK_DEV_IDE
- /* OF fails to initialize IDE controllers on macs
- * (and maybe other machines)
- *
- * Ideally, this should be moved to the IDE layer, but we need
- * to check specifically with Andre Hedrick how to do it cleanly
- * since the common IDE code seem to care about the fact that the
- * BIOS may have disabled a controller.
- *
- * -- BenH
- */
- if (_machine == _MACH_Pmac) {
- struct pci_dev *dev;
- pci_for_each_dev(dev)
- {
- if ((dev->class >> 16) == PCI_BASE_CLASS_STORAGE)
- pci_enable_device(dev);
- }
- }
-#endif /* CONFIG_BLK_DEV_IDE */
+ /* Call machine dependent post-init code */
if (ppc_md.pcibios_after_init)
ppc_md.pcibios_after_init();
}
@@ -777,21 +750,62 @@
void __init pcibios_fixup_bus(struct pci_bus *bus)
{
- struct pci_controller *hose;
+ struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
+ unsigned long io_offset;
+ struct resource *res;
+ int i;
- pci_read_bridge_bases(bus);
+ io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
+ if (bus->parent == NULL) {
+ /* This is a host bridge - fill in its resources */
+ hose->bus = bus;
- hose = pci_bus_to_hose(bus->number);
+ bus->resource[0] = res = &hose->io_resource;
+ if (!res->flags) {
+ if (io_offset)
+ printk(KERN_ERR "I/O resource not set for host"
+ " bridge %d\n", hose->index);
+ res->start = 0;
+ res->end = IO_SPACE_LIMIT;
+ res->flags = IORESOURCE_IO;
+ }
+ res->start += io_offset;
+ res->end += io_offset;
- /* Apply pci_mem_offset to bridge mem resource */
- if (hose->first_busno != bus->number)
- if (bus->resource[1]->start && (bus->resource[1]->end != -1))
- {
- bus->resource[1]->start += hose->pci_mem_offset;
- bus->resource[1]->end += hose->pci_mem_offset;
+ for (i = 0; i < 3; ++i) {
+ res = &hose->mem_resources[i];
+ if (!res->flags) {
+ if (i > 0)
+ continue;
+ printk(KERN_ERR "Memory resource not set for "
+ "host bridge %d\n", hose->index);
+ res->start = hose->pci_mem_offset;
+ res->end = ~0U;
+ res->flags = IORESOURCE_MEM;
+ }
+ bus->resource[i+1] = res;
}
+ } else {
+ /* This is a subordinate bridge */
+ pci_read_bridge_bases(bus);
- if ( ppc_md.pcibios_fixup_bus )
+ for (i = 0; i < 4; ++i) {
+ if ((res = bus->resource[i]) == NULL)
+ continue;
+ if (!res->flags)
+ continue;
+ if (io_offset && (res->flags & IORESOURCE_IO)) {
+ res->start += io_offset;
+ res->end += io_offset;
+ } else if (hose->pci_mem_offset
+ && (res->flags & IORESOURCE_MEM)) {
+ res->start += hose->pci_mem_offset;
+ res->end += hose->pci_mem_offset;
+ }
+ }
+ }
+
+ if (ppc_md.pcibios_fixup_bus)
ppc_md.pcibios_fixup_bus(bus);
}
@@ -883,26 +897,17 @@
return hose->pci_mem_offset;
}
-#ifdef CONFIG_POWER4
-extern unsigned long pci_address_offset(int, unsigned int);
-#endif /* CONFIG_POWER4 */
-
unsigned long
pci_resource_to_bus(struct pci_dev *pdev, struct resource *res)
{
/* Hack alert again ! See comments in chrp_pci.c
*/
-#ifdef CONFIG_POWER4
- unsigned long offset = pci_address_offset(pdev->bus->number, res->flags);
- return res->start - offset;
-#else /* CONFIG_POWER4 */
struct pci_controller* hose =
(struct pci_controller *)pdev->sysdata;
if (hose && res->flags & IORESOURCE_MEM)
return res->start - hose->pci_mem_offset;
/* We may want to do something with IOs here... */
return res->start;
-#endif
}
/*
@@ -1074,27 +1079,19 @@
unsigned long
pci_phys_to_bus(unsigned long pa, int busnr)
{
-#ifdef CONFIG_POWER4
- return pa - pci_address_offset(busnr, IORESOURCE_MEM);
-#else /* CONFIG_POWER4 */
struct pci_controller* hose = pci_bus_to_hose(busnr);
if (!hose)
return pa;
return pa - hose->pci_mem_offset;
-#endif
}
unsigned long
pci_bus_to_phys(unsigned int ba, int busnr)
{
-#ifdef CONFIG_POWER4
- return ba + pci_address_offset(dev->bus->number, IORESOURCE_MEM);
-#else /* CONFIG_POWER4 */
struct pci_controller* hose = pci_bus_to_hose(busnr);
if (!hose)
return ba;
return ba + hose->pci_mem_offset;
-#endif
}
/* Provide information on locations of various I/O regions in physical
Index: ppc-stub.c
===================================================================
RCS file: /cvsroot/linux-apus/2.3/arch/ppc/kernel/ppc-stub.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -r1.6 -r1.7
--- ppc-stub.c 2001/06/10 00:17:27 1.6
+++ ppc-stub.c 2001/07/08 16:59:54 1.7
@@ -1,5 +1,5 @@
/*
- * BK Id: SCCS/s.ppc-stub.c 1.6 05/17/01 18:14:21 cort
+ * BK Id: SCCS/s.ppc-stub.c 1.8 06/05/01 21:22:03 paulus
*/
/*
* ppc-stub.c: KGDB support for the Linux kernel.
Index: ppc_ksyms.c
===================================================================
RCS file: /cvsroot/linux-apus/2.3/arch/ppc/kernel/ppc_ksyms.c,v
retrieving revision 1.20
retrieving revision 1.21
diff -u -r1.20 -r1.21
--- ppc_ksyms.c 2001/06/10 00:17:27 1.20
+++ ppc_ksyms.c 2001/07/08 16:59:54 1.21
@@ -1,5 +1,5 @@
/*
- * BK Id: SCCS/s.ppc_ksyms.c 1.31 05/18/01 08:18:10 patch
+ * BK Id: SCCS/s.ppc_ksyms.c 1.37 07/03/01 15:00:30 paulus
*/
#include <linux/config.h>
#include <linux/module.h>
@@ -366,14 +366,12 @@
#endif /* CONFIG_8xx */
EXPORT_SYMBOL(ret_to_user_hook);
-EXPORT_SYMBOL(do_softirq);
EXPORT_SYMBOL(next_mmu_context);
EXPORT_SYMBOL(set_context);
-EXPORT_SYMBOL(mmu_context_overflow);
-EXPORT_SYMBOL(flush_hash_page); /* For MOL */
EXPORT_SYMBOL(handle_mm_fault); /* For MOL */
EXPORT_SYMBOL_NOVERS(disarm_decr);
#if !defined(CONFIG_8xx) && !defined(CONFIG_4xx)
+EXPORT_SYMBOL(flush_hash_page); /* For MOL */
extern long *intercept_table;
EXPORT_SYMBOL(intercept_table);
#endif
Index: setup.c
===================================================================
RCS file: /cvsroot/linux-apus/2.3/arch/ppc/kernel/setup.c,v
retrieving revision 1.14
retrieving revision 1.15
diff -u -r1.14 -r1.15
--- setup.c 2001/06/10 00:17:27 1.14
+++ setup.c 2001/07/08 16:59:54 1.15
@@ -1,5 +1,5 @@
/*
- * BK Id: SCCS/s.setup.c 1.32 05/23/01 00:38:42 cort
+ * BK Id: SCCS/s.setup.c 1.45 07/03/01 15:00:30 paulus
*/
/*
* Common prep/pmac/chrp boot and setup code.
@@ -36,14 +36,14 @@
#include <asm/mpc8260.h>
#include <asm/immap_8260.h>
#endif
+#ifdef CONFIG_4xx
+#include <asm/ppc4xx.h>
+#endif
#include <asm/bootx.h>
#include <asm/machdep.h>
#include <asm/feature.h>
#include <asm/uaccess.h>
-#ifdef CONFIG_OAK
-#include "oak_setup.h"
-#endif /* CONFIG_OAK */
extern void apus_init(unsigned long r3,
unsigned long r4,
@@ -337,7 +337,7 @@
* Assume here that all clock rates are the same in a
* smp system. -- Cort
*/
-#if !defined(CONFIG_4xx) && !defined(CONFIG_8xx) && !defined(CONFIG_8260)
+#if defined(CONFIG_ALL_PPC)
if ( have_of )
{
struct device_node *cpu_node;
@@ -361,7 +361,7 @@
len += sprintf(len+buffer, "clock\t\t: %dMHz\n",
*fp / 1000000);
}
-#endif /* !CONFIG_4xx && !CONFIG_8xx */
+#endif /* CONFIG_ALL_PPC */
if (ppc_md.setup_residual != NULL)
{
@@ -384,11 +384,12 @@
break;
}
- len += sprintf(len+buffer, "revision\t: %hd.%hd\n", maj, min);
+ len += sprintf(len+buffer, "revision\t: %hd.%hd (pvr %04x %04x)\n",
+ maj, min, PVR_VER(pvr), PVR_REV(pvr));
len += sprintf(buffer+len, "bogomips\t: %lu.%02lu\n",
- (CD(loops_per_jiffy)+2500)/(500000/HZ),
- (CD(loops_per_jiffy)+2500)/(5000/HZ) % 100);
+ CD(loops_per_jiffy)/(500000/HZ),
+ CD(loops_per_jiffy)/(5000/HZ) % 100);
bogosum += CD(loops_per_jiffy);
}
@@ -396,8 +397,8 @@
if ( i )
len += sprintf(buffer+len, "\n");
len += sprintf(buffer+len,"total bogomips\t: %lu.%02lu\n",
- (bogosum+2500)/(500000/HZ),
- (bogosum+2500)/(5000/HZ) % 100);
+ bogosum/(500000/HZ),
+ bogosum/(5000/HZ) % 100);
#endif /* CONFIG_SMP */
/*
@@ -451,6 +452,10 @@
* We're called here very early in the boot. We determine the machine
* type and call the appropriate low-level setup functions.
* -- Cort <co...@fs...>
+ *
+ * Note that the kernel may be running at an address which is different
+ * from the address that it was linked at, so we must use RELOC/PTRRELOC
+ * to access static data (including strings). -- paulus
*/
__init
unsigned long
@@ -483,8 +488,8 @@
* for now, don't use bootinfo because it breaks yaboot 0.5
* and assume that if we didn't find a magic number, we have OF
*/
- phys = prom_init( r3, r4, (prom_entry)r5);
-#endif
+ phys = prom_init(r3, r4, (prom_entry)r5);
+#endif
return phys;
}
@@ -798,7 +803,7 @@
ppc_md.setup_arch();
if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
-#ifdef CONFIG_PCI
+#if defined(CONFIG_PCI) && defined(CONFIG_ALL_PPC)
/* We create the "pci-OF-bus-map" property now so it appear in the
* /proc device tree
*/
@@ -814,7 +819,7 @@
prom_add_property(find_path_device("/"), of_prop);
}
}
-#endif /* CONFIG_PCI */
+#endif /* CONFIG_PCI && CONFIG_ALL_PPC */
paging_init();
sort_exception_table();
Index: time.c
===================================================================
RCS file: /cvsroot/linux-apus/2.3/arch/ppc/kernel/time.c,v
retrieving revision 1.11
retrieving revision 1.12
diff -u -r1.11 -r1.12
--- time.c 2001/06/10 00:17:27 1.11
+++ time.c 2001/07/08 16:59:54 1.12
@@ -1,5 +1,5 @@
/*
- * BK Id: SCCS/s.time.c 1.15 05/17/01 18:14:22 cort
+ * BK Id: SCCS/s.time.c 1.19 06/09/01 12:06:37 paulus
*/
/*
* Common time routines among all ppc machines.
@@ -211,6 +211,10 @@
ppc_md.heartbeat();
hardirq_exit(cpu);
+
+ if (softirq_pending(cpu))
+ do_softirq();
+
return 1; /* lets ret_from_int know we can do checks */
}
--- hashtable.S DELETED ---
|
