Re: APUS bus access

[Geert U. <ge...@li...>]

On Mon, 17 Jul 2000, Arno Griffioen wrote:
> > > The reason I ask, is that when the driver puts the  "pc" value into the
> > > DSP register it is bf2fe50, but when the value  is read back out it is
> > > "bf2".
> > 
> > Weird ... 16 bit reversed in a DWORD + 16 bit lost.
> > Or the BUS access reads 16 bits instead of 32 bits.
> 
> Can't imagine that to be true. The CV-PPC (also on the turboboard 
> bus directly) works just fine except for some strange 640e related
> problem in the XAA code in the X server.
> 
> Timing? Have you tried adding a delay-loop before reading the data again?
> The chip may not like being hit again too quickly. 
> 
> We know Phase5 liked to cut a few corners here and there in the design,
> so they may not have made it self-regulating. You may need to poll
> some sort of 'status' bit to see if the chip is ready to accept
> new read/write requests. 

Anyone who disassembled the AmigaOS driver?

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@li...

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds