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From: Tim R. <ti...@pr...> - 2009-02-23 19:20:48
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jeffp wrote: > I am having a strange problem where I reboot my device (Digital Input to > USB) streamer, I can send 1 packet less than 512 bytes (USB pkt size) but > then cannot send any others. I do see the 2nd packet on the sniffer but it > never gets past the USB part (using logic scope) on the device. > If you see the packet on the bus with a sniffer, then it should be obvious that libusb is not at fault. > The USB device is a fx2 processor which uses EZ-USB. The fx2 has an internal > FIFO which feeds an external FIFO on the device whenever there is data in > the internal fx2 FIFO. It seems the pkts do not get into the internal fx2 > FIFO (past the USB PHY). > So, are you using the FX2 FIFOs in slave mode? Do you have AUTOOUT set? How is your device deciding when to pull data from the FX2 FIFOs? Remember, the FX2 does not "push" data out of the FIFOs. An external device has to "pull" the data, based on the empty/full flags. Have you checked your empty/full flags to make sure you have the polarity correct? Are you, in fact, using the "FIFO empty" flag to decide when to pull more data? > Has anyone seen anything similar to this or have any ideas of what may be > going on or what I can check ? Unfortunately I have no visibility inside the > fx2. > That's not true! YOU control the firmware, and the firmware has 100% visibility of and control over the internal state. -- Tim Roberts, ti...@pr... Providenza & Boekelheide, Inc. |