libLCS is a hardware description library in C++ aiming to be as powerfull and easy as the Verilog HDL. It currently supports logic gates, flipflops, clock, and facilitates delays, continuous assignments and variable value dumping into VCD files.

Project Activity

See All Activity >

License

GNU Library or Lesser General Public License version 2.0 (LGPLv2), GNU General Public License version 2.0 (GPLv2)

Follow Logic Circuit Simulation in C++

Logic Circuit Simulation in C++ Web Site

You Might Also Like
Automated quote and proposal software for IT solution providers. | ConnectWise CPQ Icon
Automated quote and proposal software for IT solution providers. | ConnectWise CPQ

Create IT quote templates, automate workflows, add integrations & price catalogs to save time & reduce errors on manual data entry & updates.

ConnectWise CPQ, formerly ConnectWise Sell, is a professional quote and proposal automation software for IT solution providers. ConnectWise CPQ offers a wide range of tools that enables IT solution providers to save time, quote more, and win big. Top features include professional quote or proposal templates, product catalog and sourcing, workflow automation, sales reporting, and integrations with best-in-breed solutions like Cisco, Dell, HP, and Salesforce.
Rate This Project
Login To Rate This Project

User Reviews

Be the first to post a review of Logic Circuit Simulation in C++!

Additional Project Details

Languages

English

Intended Audience

Science/Research, Education, Telecommunications Industry

Programming Language

C++

Related Categories

C++ Simulation Software, C++ Electronic Design Automation (EDA) Software, C++ Computer Aided Instruction (CAI) Software

Registered

2006-09-18