[libdv-dev] 9bit -> 16bit sign extension

[Stefan L. <lu...@sn...>]

Hi,

9 bit signed value range is -256 .. 255,
so unsigned value 256 translates to -256 and 511 to 255

C code should be corrected by:
----- cut -----
--- parse.c.orig        Fri Nov 10 00:46:39 2000
+++ parse.c     Fri Nov 10 15:51:41 2000
@@ -478,5 +478,5 @@
        memset(bl->coeffs, 0, sizeof(bl->coeffs));
        dc = bitstream_get(bs,9);  // DC coefficient (twos complement)
-       if(dc > 256) dc -= 513;
+       if(dc > 255) dc -= 512;
        bl->coeffs[0] = dc;
        vlc_trace("DC [%d,%d,%d,%d] = %d\n",mb->i,mb->j,mb->k,b,dc);
@@ -493,5 +493,5 @@
        // Get DC coeff, mode, and class from start of block
        dc = bitstream_get(bs,9);  // DC coefficient (twos complement)
-       if(dc > 256) dc -= 513;
+       if(dc > 255) dc -= 512;
        bl->coeffs[0] = dc;
        vlc_trace("DC [%d,%d,%d,%d] = %d\n",mb->i,mb->j,mb->k,b,dc);
----- cut -----

Assembly code of vlc_x86.S could be simplified by just
a word arithmetric shift right.
----- cut -----
--- vlc_x86.S.orig      Sun Jul 16 12:49:39 2000
+++ vlc_x86.S   Fri Nov 10 19:16:04 2000
@@ -454,14 +454,9 @@
        orl     %ecx,%eax

-       movl    %eax,%edx
-       shrl    $7,%edx                 /* dc in %edx */
-
-       /* if(dc > 256) dc -= 513; */
-       movl    $257,%ecx
-       subl    %edx,%ecx
-       sarl    $31,%ecx
-       andl    $-513,%ecx
-       addl    %edx,%ecx
-       movw    %ecx,dv_block_t_coeffs(%ebp)
+       movl    %ax,%dx
+       /* if(dc > 255) dc -= 512;
+          just do an arithmetric shift right 7bits*/
+       sar     $7,%dx                  /* dc in %dx */
+       movw    %dx,dv_block_t_coeffs(%ebp)

        /* bl->class_no = bitstream_get(bs,2); */ 
----- cut -----
-- 

mfg

  Stefan Lucke (lu...@sn...)