[L4alpha-cvscommit] CVS: L4Alpha/pal int_handler.mar,1.2,1.3 ipc.mar,1.24,1.25

[Daniel P. <dp...@us...>]

Update of /cvsroot/l4alpha/L4Alpha/pal
In directory usw-pr-cvs1:/tmp/cvs-serv4834/pal

Modified Files:
	int_handler.mar ipc.mar 
Log Message:
Interrupt mask and unmask functionality

When you do a l4_ipc_receive on your registered interrupt, it will enable the interrupt pin to the cpu. When the kernel recieves this and passes it on to you, it will disable (mask) this interrupt and pass it on to you.
This prevents some race conditions that were occuring.

Breaks the Ruffian port.




Index: int_handler.mar
===================================================================
RCS file: /cvsroot/l4alpha/L4Alpha/pal/int_handler.mar,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** int_handler.mar	13 Apr 2001 05:45:51 -0000	1.2
--- int_handler.mar	13 Feb 2002 06:42:07 -0000	1.3
***************
*** 64,67 ****
--- 64,69 ----
  	addq	p1, p3, p1				; P1 = queue pointer
  	
+ 	mask_int pp4, pp7				; turn off interrupt
+ 
  	IF	p0			
  		probe_int_src pp3, pp2, pp5, pp7	; pp3 is int src result (dunno what this does really)

Index: ipc.mar
===================================================================
RCS file: /cvsroot/l4alpha/L4Alpha/pal/ipc.mar,v
retrieving revision 1.24
retrieving revision 1.25
diff -C2 -d -r1.24 -r1.25
*** ipc.mar	12 Feb 2002 23:40:08 -0000	1.24
--- ipc.mar	13 Feb 2002 06:42:07 -0000	1.25
***************
*** 766,770 ****
  			krn_addr pp2, interrupt_queue	; start of irq list
  
- 		;; FIXME - needs shadow THIS WONT WORK
  			clr	t0
  			subq	pp1, pp2, pv		; offset int list
--- 766,769 ----
***************
*** 831,839 ****
  		beq	pp4, ipc_intr_pending	; Yes, then take the INT
  	
  		insbl	pp3, #1, pp3		; No, then insert wait-request interrupt into queue
  		stq_a	pp3, TCB_THREAD_STATE(pp0)
  
  		;; new timeout code here
! 	
  		extll	a3, #0, pp2
  		IF	pp2				; timeout != never
--- 830,840 ----
  		beq	pp4, ipc_intr_pending	; Yes, then take the INT
  	
+ 		unmask_int pp3, pp2
+ 
  		insbl	pp3, #1, pp3		; No, then insert wait-request interrupt into queue
  		stq_a	pp3, TCB_THREAD_STATE(pp0)
  
  		;; new timeout code here
! 
  		extll	a3, #0, pp2
  		IF	pp2				; timeout != never
***************
*** 854,858 ****
  			stl_a	pp3, TCB_LIST_STATE(pp0)
  		ENDIF
! 	
  		;;  end new code
  	
--- 855,859 ----
  			stl_a	pp3, TCB_LIST_STATE(pp0)
  		ENDIF
! 
  		;;  end new code