[L4alpha-cvscommit] CVS: L4Alpha/pal ipc.mar,1.22,1.23

[Daniel P. <dp...@us...>]

Update of /cvsroot/l4alpha/L4Alpha/pal
In directory usw-pr-cvs1:/tmp/cvs-serv3750/pal

Modified Files:
	ipc.mar 
Log Message:
Interrupt handler now allows threads waiting in an interrupt to have a timeout other than FOREVER.


Index: ipc.mar
===================================================================
RCS file: /cvsroot/l4alpha/L4Alpha/pal/ipc.mar,v
retrieving revision 1.22
retrieving revision 1.23
diff -C2 -d -r1.22 -r1.23
*** ipc.mar	10 Feb 2002 12:37:58 -0000	1.22
--- ipc.mar	12 Feb 2002 05:49:11 -0000	1.23
***************
*** 833,836 ****
--- 833,860 ----
  		insbl	pp3, #1, pp3		; No, then insert wait-request interrupt into queue
  		stq_a	pp3, TCB_THREAD_STATE(pp0)
+ 
+ 		;; new timeout code here
+ 	
+ 		extll	a3, #0, pp2
+ 		IF	pp2				; timeout != never
+ 
+ 			timeout2us  pp2, pp4, pp3, pp5			
+ 	
+ 			ldl_a	pp3, TCB_LIST_STATE(pp0)
+ 			stq_a	pp4, TCB_TIMEOUT(pp0)
+ 			and	pp3, #LLS_SOON_WAKEUP_QUEUE, AT
+ 			IFZ	AT
+ 				bis	pp3, #<LLS_SOON_WAKEUP_QUEUE!LLS_WAKEUPS_VALID>, pp5
+ 				stl_a	pp5, TCB_LIST_STATE(pp0)
+ 				insert_soon_wakeup_timeout pp0, pp4, pp3, pp5
+ 			ENDIF
+ 		ELSE
+ 			ldl_a	pp3, TCB_LIST_STATE(pp0)
+ 			bic	pp3, #LLS_WAKEUPS_VALID, pp3
+ 			stl_a	pp3, TCB_LIST_STATE(pp0)
+ 		ENDIF
+ 	
+ 		;;  end new code
+ 	
  		switch_dispatcher pp0, ipc_wait_interrupt, AT, pp2
  	ELSE
***************
*** 844,852 ****
  		bne	pp3, ipc_not_exist
  
- 	;; FIXME for deceit.
- 	;; We should actually check the SEND_ROOT queue for viable senders.
- 
- 	;; New code NEW CODE
- 
  		lda	pp2, TCB_SEND_ROOT(pp0)
  		GET_16CONS AT, TCB_MASK
--- 868,871 ----
***************
*** 1592,1595 ****
--- 1611,1617 ----
  										; t3 virtual address
  					mov	s0, t3
+ 
+ 					khex	t3, 64
+ 
  					PVC_JSR mem_translate_address bsr=1
  					bsr	ra, mem_translate_address