[L4alpha-cvscommit] CVS: L4Alpha/pal/21164/macros ruffian.mar,NONE,1.1
Status: Beta
Brought to you by:
dpotts
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From: Daniel P. <dp...@us...> - 2001-12-10 00:52:25
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Update of /cvsroot/l4alpha/L4Alpha/pal/21164/macros In directory usw-pr-cvs1:/tmp/cvs-serv12390/macros Added Files: ruffian.mar Log Message: Ruffian support file based on Miata (generic) 21164 support files. --- NEW FILE: ruffian.mar --- ;+ ; $Id: ruffian.mar,v 1.1 2001/12/10 00:52:19 dpotts Exp $ ; ; Copyright (C) 1999 - 2001, Daniel Potts, University of New South Wales. ; ; Copyright (C) 1995, 1996, Sebastian Schoenberg, University of ; Technology Dresden, Department of Computer Science. ; ; This file is part of the L4/Alpha micro-kernel distribution. ; ; This program is free software; you can redistribute it and/or ; modify it under the terms of the GNU General Public License ; as published by the Free Software Foundation; either version 2 ; of the License, or (at your option) any later version. ; ; This program is distributed in the hope that it will be useful, ; but WITHOUT ANY WARRANTY; without even the implied warranty of ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ; GNU General Public License for more details. ; ; You should have received a copy of the GNU General Public License ; along with this program; if not, write to the Free Software ; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ; ;- ;+ -*- asm -*- ; ruffian.mar - PYXIS chipset support ;- ;+ ; CPU: 21164 ; CPU config: Uniprocessor (PYXIS) ; Written By: Daniel Potts ; Creation: 2000 03 07 ; Last Edit: 2000 03 07 ; Description: PYXIS (2117x) ; ; Defines: ; ; Edit History ; Who When What ; --- ---- ---- ; DP 2000 03 07 Initial implementation ; ; These defines are taken from the 21174 TRM ; ; Defines for Interrupt related stuff ;- ; We want interrupts to be initialised for the timer interrupt in particular .iif ndf interrupts, interrupts = 1 P_INT_BASEADDR = ^x87a0000000 P_INT_BASE_B = ^x87a P_INT_BASE_S = 28 PO_INT_REQ = ^x000 PO_INT_MASK = ^x040 PO_INT_HILO = ^x0C0 PO_INT_ROUTE = ^x140 PO_GPO = ^x180 PO_INT_CNFG = ^x1C0 PO_RT_COUNT = ^x200 PO_IIC_CTRL = ^x2C0 ; Defines for other PYXIS related stuff P_IACK_SC = ^x8720000000 P_IACK_SC_B = ^x872 P_IACK_SC_S = 28 .macro probe_int_src res, tmp1, tmp2, tmp3 bis zero, zero, res ; not implemented .endm |